Texas Instruments UCC3890N, UCC3890DTR, UCC3890D Datasheet
3/97
DESCRIPTION
• Transformerless Off-Line
Operation
• Low Voltage Operation to 0.8V
• Ideal for Battery Trickle Charger
Applications
• Current Mode Operation With
100mV Shunt
• Voltage Mode Operation With
Fixed 1.25V Output or Resistor
Adjustable Output
• Efficient BiCMOS Design
• Inherent Short Circuit Protection
The UCC3890 controller is optimized for use as an off-line, low power, low
voltage, regulated current supply, ideally suited for battery trickle charger
applications. The unique circuit topology used in this device can be visualized as two cascaded flyba ck converters; each operating in the discontinuous mode, and both driven from a si ngle external power switch. The
significant benefit of this approach is the ability to charge low voltage batteries in off-line applications with no transformer, and low internal losses.
The control algorithm used by the UCC3890 forces a switch on time inversely pr oportional to t he input line v oltage, whil e the switch off time is
inversely proportional to the output voltage. This action is automatically
controlled by a n i n te r na l fe ed ba c k loo p and reference. The cascaded configuration al lows a large voltage con version ratio with r easonable switch
duty cycle.
While the UCC3890 is ideally suited for control of constant current battery
chargers, provision is also made to operate as a fixed 1.25V regulated
supply, or to use a resistor v o l tage di vi der to obtain output vol tages hi gher
than 1.25V.
UCC1890
UCC2890
UCC3890
Off-Line Battery Charger Circuit
FEATURES
BLOCK DIAGRAM
UDG-96052
Note: This device incorporates patented technology used under license from
Lambda Electronics, Inc.
UCC1890
UCC2890
UCC3890
IDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5mA
Current into TON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5mA
Voltage on V
OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20V
Current into TOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250µA
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
CONNECTION DIAGRAMS
Currents are positive into, negative out of the specified terminal.
Consult Packaging Section of Databook for thermal limitations
and considerations of packages.
ABSOLUTE MAXIMUM RATINGS
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
General
VDD Zener Voltage I
DD
= 4.75mA,I
TON
= 0mA 8.3 9.0 9.4 V
Minimum Operat in g C urre nt I
TON
IDD = –1mA, F = 150kHz 1.65 2.0 mA
Undervoltage Lockout
Minimum Voltage to Start FB = 0 7.8 8.6 9.2 V
Minimum Voltage after Start FB = 0 5.75 6.3 6.65 V
Hysteresis FB = 0 1.8 2.3 2.6 V
VDD – V
START
FB = 0 0.2 0.4 0.7 V
Oscillator
Amplitude I
TON
= 3mA; I
TOFF
= 50µA; VFB = 0V CT = 100pF 3.1 3.4 3.7 V
CT to DRIVE High Delay Overdrive = 200mV 80 200 ns
CT to DRIVE Low Delay Overdrive = 200mV 50 100 ns
Charge Coefficient I
CT/ITON
I
TON
= 3mA; V
CT
= 3.0V 0.135 0.15 0.165µA/µA
Discharge Coefficent I
CT/ITOFF
I
TOFF
= 50µA; VCT = 3.0V 0.95 1.00 1.05µA/µA
Driver
V
OL
I = 100mA (Note 1) 0.7 1.8 V
V
OH
I = –100mA referred to VDD (Note 1) –2.9 –1.5 V
Rise Time C
L
= 1nF 35 70 ns
Fall Time C
L
= 1nF 30 60 ns
Line Voltage Detection
Minimum I
TON
for Fault 1.0 1.5 2.0 mA
I
TON
Detector Hysteresis 110
µ
A
On Time During Fault 0.5
µ
s
V
OUT
Error Amplifier
Reference Level I
TOFF
= 50µA, ICT = 25µA, TJ = 25°C 1.20 1.25 1.30 V
I
TOFF
= 50µA, ICT = 25µA, Over Temperature 1.15 1.25 1.35 V
Voltage at TOFF I
TOFF
= 50µA 0.3 0.4 0.5 V
Regulation gm I
TOFF
= 50µA (Note 2) 2.0 4.0 7.7 mA/V
Current Sense Amplifier
Gain VCS = 90 – 110mV 11.8 12.5 13.0 V/V
Input Offset Voltage V
CS
= 90 – 110mV –5 0 5 mV
Input Voltage for CS Amplifier Enabled I
TON
= 3mA, Referred to VDD –1.5 –0.8 V
Input Voltage for CS Amplifier Disabled I
TON
= 3mA, Referred to VDD –0.8 –0.3 V
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated, these specifications apply for TA = –55°C to 125°C for
UCC1890, –40°C to 85°C for the UCC2890, and 0°C to 70°C for the UCC3890. No load at DRIVE pin (C
LOAD
= 0), TA = TJ.
DIL-8, SOIC-8 (Top View)
J, N, or D Packages
Note 1: VDD forced to 100mV below VDD Zener Voltage
Note 2: gm is defined as
∆
I
CT
∆
V
FB
for the values of VFB where the error amp is in regulation. The two points used to calculate gm
are for I
CT
at 65% amd 35% of its maximum value.
2
UCC1890
UCC2890
UCC3890
PIN DESCRIPTIONS
CS:
The high side of the current sense shunt is connected to this pi n. Short CS to VDD for voltage feedback
operation.
CT:
Oscillator timing capacitor is connected to this pin.
DRIVE:
Gate drive to external power switch.
FB:
Output of current sense amplifier. This pin can be
used for direct output voltage feedback if the current
sense amp input pin CS is shorted to the VDD pin.
GND:
Ground pin.
TOFF:
Resistor R
OFF
connects from voltage output to
this pin to provide a maximum capacitor discharge current proportional to output voltage.
TON:
Resistor R
ON
connects f rom lin e in put to this pin to
provide capacitor charge current proportional to line voltage. The current in R
ON
also provides power for the 9V
shunt regulator at VDD.
VDD:
Output of 9V shunt regulator.
APPLICATION INFORMATION
OPERATION (VOLTAGE OUTPUT)
Figure 1 shows a typical voltage mode application.
When input voltage is first applied, all of the current
through R
DD
and 80% of the current through R
ON,
charge the ext ernal ca paci tor C3 conn ected to VDD. As
the voltage builds on VDD, u ndervoltage lockout holds
the circuit off and the output DRIVE low until VDD
reaches 8.4 V. At this time, DRIV E go es h igh, turning on
the external power switch Q1, and 15% of the current
into TON is directed to the timing capacitor C
T
. The volt-
age at TON is fixed at approximately 11V, so C
T
charges to a fixed threshold with current
I = 0.2 •
V
IN
– 11V
R
ON
Since the input line is much greater than 11V, the
charge current is approximately proportional to the input
line voltage. DRIVE is only high while C
T
is charging, so
the power swi tc h on time i s inver sely pr oportional to l ine
voltage. Thi s provides a constant line voltage-switch on
time product.
At the end of the switc h on time, Q1 i s turned off, and
the 15% of the R
ON
current which was charging CT is
diverted to ground. The power swi tch off time is controlled by discharge of C
T
, which is determined by the outut
voltage as described here:
Figure 1. Typical Voltage Mode Application
UDG-96053
UDG-96054
3
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