1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SYNC
CT
RT
FB1
COMP1
CS1
OUT1
GND
VCC
REF
ENABLE2
FB2
COMP2
CS2
OUT2
PWRGND
N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SYNC
CT
RT
FB1
COMP1
CS1
OUT1
GND
VCC
REF
ENABLE2
FB2
COMP2
CS2
OUT2
PWRGND
PW PACKAGE
(TOP VIEW)
UCC2810
UCC3810
SLUS162D – FEBRUARY 1999 – REVISED FEBRUARY 2007
DUAL CHANNEL SYNCHRONIZED CURRENT-MODE PWM
FEATURES DESCRIPTION
• Single Oscillator Synchronizes Two PWMs
• 150-µA Startup Supply Current
• 2-mA Operating Supply Current
• Operation to 1 MHz
• Internal Soft-Start The oscillator’s sawtooth waveform can be used for
• Full-Cycle Fault Restart
• Internal Leading-Edge Blanking of the Current
Sense Signal
• 1-A Totem Pole Outputs
• 75-ns Typical Response from Current Sense
to Output
• 1.5% Tolerance Voltage Reference
The UCC3810 is a high-speed BiCMOS controller
integrating two synchronized pulse width modulators
for use in off-line and dc-to-dc power supplies. The
UCC3810 family provides perfect synchronization
between two PWMs by usin g the same oscillator.
slope compensation if required.
Using a toggle flip-flop to alternate between
modulators, the UCC3810 ensures that one PWM
does not slave, interfere, or otherwise affect the
other PWM. This toggle flip- flop also ensures that
each PWM is limited to 50% maximum duty cycle,
insuring adequate off-time to reset magnetic
elements. This device contains many of the same
elements of the UC3842 current mode controller
family, combined with the enhancements of the
UCC3802. This minimizes power supply parts count.
Enhancements include leading edge blanking of the
current sense signals, full cycle fault restart, CMOS
output drivers, and outputs which remain low even
when the supply voltage is removed.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2007, Texas Instruments Incorporated
REF
15
FB115COMP15CS1
6
CS2
11
V
CC
16
Over-Current
Comparator
1.5 V
VCC OK
V
CC
2.5 V
Error
Amp 1
1 V
100 kW
55 kW
12.5 V
Leading
Edge
Blanking
Leading
Edge
Blanking
S Q
R
7
OUT1
Voltage
Ref
REF OK
S
Q
R
S
Q
R
4 V
0.5 V
τ − 5ms
Full Cycle
Soft Start
Error
Amp 2
2.5 V
+
−
55 kW
100 kW
1 V
10
OUT2
35 mA
VDG−92062−1
8
GND
9
PWRGND
14
ENABLES
S
Q
R
R
Oscillator
2
R
TCT
SYNCCOMP2FB2
3211213
UCC2810
UCC3810
SLUS162D – FEBRUARY 1999 – REVISED FEBRUARY 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
T
J
–40°C to 85°C UCC2810DW (16) UCC2810N (16)
0°C to 70°C UCC3810DW (16) UCC3810N (16)
(1) All packages are available taped and reeled (indicated by the R suffix on the device type e.g.,
UCC2810JR)
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
V
CC
I
CC
Supply voltage
Supply current 20mA
Output peak current, OUT1, OUT2, 5% duty cycle ±1A
Output energy, OUT1, OUT2, capacitive load 20 µJ 20µJ
Analog inputs, FB1, FB2, CS1, CS2, SYNC –0.3 to 6.3V
T
J
T
stg
Operating junction temperature 150°C
Storage temperature range –65 to 150°C
Lead temperature (soldering, 10 sec) 300°C
(3)
PACKAGED DEVICES
SOP (DW) PDIP (N)
(1) (2)
(1)
UNIT
11V
(1) Currents are positive into, negative out of the specified terminal. All voltages are with respect to GND.
(2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(3) In normal operation, V
impedance such that the V
is powered through a current-limiting resistor. Absolute maximum of 11 V applies when driven from a low
CC
current does not exceed 20 mA.
CC
BLOCK DIAGRAM
2
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SLUS162D – FEBRUARY 1999 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS
All parameters are the same for both channels, –40°C ≤ TA≤ 85°C for the UCC2810, 0°C ≤ TA≤ 70°C for the UCC3810,
V
CC
REFERENCE
V
CC
I
O(SC)
OSCILLATOR
f
OSC
ERROR AMPLIFIER
V
FB
I
FB
f
GAIN
I
SINK
I
SRCE
CURRENT SENSE
I
CS
(1)
= 10 V
; RT= 150 k Ω , CT= 120 pF; no load; TA= TJ;(unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output voltage V
Load regulation 0 mA ≤ I
Line regulation
Output noise voltage
Long term stability
(2)
(2)
TJ= 25°C 4.925 5.000 5.075
TJ= full range, 0 mA ≤ I
≤ 5 mA 5 30
REF
≤ 5 mA 4.85 5.00 5.10
REF
UVLO stop threshold voltage, 12
0.5 V ≤ V
≤ V
CC
SHUNT
10Hz <f< 10 kHz, TJ= 25°C 235 µV
TA = 125°C, 1000 hours 5 mV
Output short circuit current -8 -25 mA
Oscillator frequency
Temperature stability
(3)
(2)
RT= 30 k Ω , CT= 120 pF 860 980 1100
RT= 150 k Ω , CT= 120 pF 190 220 250
Peak voltage 2.5
Valley voltage 0.05
Peak-to-peak amplitude 2.25 2.45 2.65
SYNC threshold voltage 0.80 1.65 2.20
SYNC input current SYNC = 5 V 30 µA
FB input voltage COMP = 2.5 V 2.44 2.50 2.56 V
FB input bias current ±1 µA
Open loop voltage gain 60 73 dB
Unity gain bandwidth
(2)
Sink current, COMP FB = 2.7 V, COMP = 1 V 0.3 1.4 3.5
Source current, COMP FB = 1.8 V, COMP = 4 V -0.2 -0.5 -0.8 mA
Minimum duty cycle COMP = 0 V 0%
Soft-start rise time, COMP ms
(4)
Gain
Maximum input signal
(5)
FB = 1.8 V, 5
Rise from 0.5 V to (REF – 1.5 V)
1.20 1.55 1.80 V/V
COMP = 5 V 0.9 1.0 1.1 V
Input bias current, CS ±200 nA
Propagation delay time (CS to OUT)
Blank time, CS
(6)
CS steps from 0 V to 1.2 V, 75
COMP = 2.5 V
Overcurrent threshold voltage, CS 1.35 1.55 1.85
COMP-to-CS offset voltage CS = 0 V 0.45 0.90 1.35
UCC2810
UCC3810
mV
kHz
2.5%
V
2 MHz
ns
55
V
(1) For UCC3810, adjust V
(2) Ensured by design. Not production tested.
above the start threshold before setting at 10 V.
CC
(3) Oscillator frequency is twice the output frequency.
(4) Current sense gain A is defined by:
(5) Parameter measured at trip point of latch with FB = 0 V.
, 0 V ≤ V
≤ 0.8 V.
CS
(6) CS blank time is measured as the difference between the minimum non-zero on-time and the CS-to-OUT delay.
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3
UCC2810
UCC3810
SLUS162D – FEBRUARY 1999 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS (continued)
All parameters are the same for both channels, –40°C ≤ TA≤ 85°C for the UCC2810, 0°C ≤ TA≤ 70°C for the UCC3810,
V
= 10 V ; RT= 150 k Ω , CT= 120 pF; no load; TA= TJ;(unless otherwise specified)
CC
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PWM
Maximum duty cycle
Minimum on-time CS = 1.2 V, COMP = 5 V 130 ns
OUTPUT
V
V
t
R
t
F
Low-level output voltage I
OL
High-level output voltage (V
OH
Rise time, OUT C
Fall time, OUT C
UNDERVOLTAGE LOCKOUT (UVLO)
Start threshold voltage 9.6 11.3 13.2
Stop threshold voltage 7.1 8.3 9.5 V
Start-to-stop hysteresis 1.7 3.0 4.7
ENABLE2 input bias current ENABLE2 = 0 V -20 -35 -55 µA
ENABLE2 input threshold voltage 0.80 1.53 2.00 V
OVERALL
Startup current V
Operating supply current, outputs off VCC = 10 V, FB = 2.75 V 2 3
Operating supply current, outputs on
VCC internal zener voltage ICC= 10 mA 11.0 12.9 14.0
VCC internal zener voltage minus start 0.4 1.2
threshold voltage
(2)
– OUT)
CC
RT= 150 k Ω , CT= 120 pF 45% 49% 50%
RT= 30 k Ω , CT= 120 pF 40% 45% 48%
I
= 20 mA 0.12 0.42
OUT
= 200 mA 0.48 1.10
OUT
I
= 20 mA, V
OUT
I
= –20 mA 0.15 0.42
OUT
I
= –200 mA 1.2 2.3
OUT
= 1 nF 20 50
OUT
= 1 nF 30 60
OUT
< Start threshold voltage 0.15 0.25
CC
= 0 V 0.7 1.2 V
CC
VCC = 10 V, FB = 0 V, 3.2 5.1
CS = 0 V, RT = 150 k Ω
VCC = 10 V, FB = 0 V, 8.5 14.5
CS = 0 V, RT = 30 k Ω
ns
mA
V
4
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