UCC1913
UCC2913
UCC3913
DESCRIPTION
The UCC1913 family of negative voltage circuit breakers provides complete power management, hot swap, and fault handling capability. The IC is
referenced to the negative input voltage and is driven through an external
resistor connected to ground, which is essentially a current drive as opposed to the traditional voltage drive. The on-board 10V shunt regulator
protects the IC from excess voltage and serves as a reference for programming the maximum allowable output sourcing current during a fault. All
control and housekeeping functions are integrated, and externally programmable. These include the fault current level, maximum output sourcing current, maximum fault time, soft start time, and average power limiting. In the
event of a constant fault, the internal timer will limit the on-time from less
than 0.1% to a maximum of 3%. The duty cycle modulates depending on
the current into the PL pin, which is a function of the voltage across the
FET, and will limit average power dissipation in the FET. The fault level is
fixed at 50mV across the current sense amplifier to minimize total dropout.
The fault current level is set with an external current sense resistor. The
maximum allowable sourcing current is programmed with a voltage divider
from VDD to generate a fixed voltage on the IMAX pin. The current level,
when the output appears as a current source, is equal to V
IMAX/RSENSE
.If
desired, a controlled current startup can be programmed with a capacitor
on the IMAX pin.
When the output current is below the fault level, the output device is
switched on. When the output current exceeds the fault level, but is less
than the maximum sourcing level programmed by the IMAX pin, the output
remains switched on, and the fault timer starts charging CT. Once CT
charges to 2.5V, the output device is turned off and performs a retry some
time later. When the output current reaches the maximum sourcing current
level, the output appears as a current source, limiting the output current to
the set value defined by IMAX.
Other features of the UCC1913 family include undervoltage lockout, and
8-pin small outline (SOIC) and Dual-In-Line (DIL) packages.
Negative Voltage Hot Swap Power Manager
FEATURES
• Precision Fault Threshold
• Programmable Average Power
Limiting
• Programmable Linear Current Control
• Programmable
• Overcurrent Limit
• Programmable Fault Time
• Fault Output Indication
• Shutdown Control
• Undervoltage Lockout
• 8-Pin SOIC
SLUS274 - JANUARY 1999
1
2
LINEAR
CURRENT
AMPLIFIER
PL
7OUT
IMAX
+
V
DD
50Ω
8
V
DD
6 SENSE
5 VSS
4CT
ON-TIME
CONTROL
3
VDD
UVLO
5.0V
REF
LOGIC
SUPPLY
9.5V SHUNT REGULATOR
+
20µA
1=
UNDERVOLTAGE
SOURCE
ONLY
SD/FLT
V
DD
0.2V
OVERCURRENT
COMPARATOR
DISABLE
5.0V
OVERLOAD COMPARATOR
50mV
BLOCK DIAGRAM
UDG-99001
2
UCC1913
UCC2913
UCC3913
ABSOLUTE MAXIMUM RATINGS
I
VCC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
SHUTDOWN Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
PL Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
IMAX Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.). . . . . . . . . . . . . +300°C
All voltages are with respect to VSS (The most negative voltage). All currents are positive into, negative out of the specified
terminal. Consult Packaging Section of Databook for thermal
limitations and considerations of packages.
ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications apply for T
A
= –55°C to +125°C for
UCC1913; –40°C to +85°C for UCC2913; 0°C to +70°C for UCC3913; I
VDD
= 2mA, CT = 4.7pF, TA= T
J
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
VDD Section
IDD 1.0 2.0 mA
Regulator Voltage I
SOURCE
= 2mA to 10mA 8.5 9.5 10.5 V
UVLO Off Voltage 678V
Fault Timing Section
Overcurrent Threshold T
J
= 25°C 47.5 50 53 mV
Over Operating Temperature 46 50 53.5 mV
Overcurrent Input Bias 50 500 nA
CT Charge Current VCT= 1.0V, IPL= 0 –50 –36 –22 µA
Overload Condition, V
SENSE
– V
IMAX
= 300mV –1.7 –1.2 –0.7 mA
CT Discharge Current VCT= 1.0V, IPL= 0 0.6 1 1.5 µA
CT Fault Threshold 2.2 2.4 2.6 V
CT Reset Threshold 0.32 0.5 0.62 V
Output Duty Cycle Fault Condition, IPL= 0 1.7 2.7 3.7 %
Output Section
Output High Voltage I
OUT
= 0A 8.5 10 V
I
OUT
= –1mA 6 8 V
Outut Low Voltage I
OUT
= 0A; V
SENSE
– V
IMAX
= 100mV 0 0.01 V
I
OUT
= 2mA; V
SENSE
– V
IMAX
= 100mV 0.2 0.6 V
Linear Amplifier Section
Sense Control Voltage IMAX = 100mV 85 100 115 mV
IMAX = 400mV 370 400 430 mV
Input Bias 50 500 nA
Shutdown/Fault Section
Shutdown Threshold 1.4 1.7 2.0 V
Input Current Shutdown = 5V 15 25 45 µA
Fault Output High 6 7.5 9 V
Fault Output Low 0 0.01 V
Delay to Output (Note 1) 150 300 ns
SENSE
OUT
PL
VSS
IMAX
SD/FLT
VDD
CT
1
2
3
4
8
7
6
5
CONNECTION DIAGRAMS
DIL-8, SOIC-8 (Top View)
N or J, D Package
3
UCC1913
UCC2913
UCC3913
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated these specifications apply for TA= –55°C to +125°C for
UCC1913; –40°C to +85°C for UCC2913; 0°C to +70°C for UCC3913; I
VDD
= 2mA, CT = 4.7pF, TA= T
J
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Power Limiting Section
V
SENSE
Regulator Voltage IPL= 64 A 4.35 4.85 5.35 V
Duty Cycle Control IPL= 64µA 0.6 1.2 1.7 %
I
PL
= 1mA 0.045 0.1 0.17 %
Overload Section
Delay to Output (Note 1) 300 500 ns
Output Sink Current V
SENSE
= V
IMAX
= 300mV 40 100 mA
Threshold Relative to IMAX 140 200 260 mV
Note 1: Guaranteed by design. Not 100% tested in production.
CT: A capacitor is connected to this pin in order to set the
maximum fault time. The maximum fault time must be
more than the time to charge external load capacitance.
The maximum fault time is defined as:
()
T
CT
I
FAULT
CH
=
•2
where
IAI
CH PL
=+36µ
,
and I
PL
is the current into the power limit pin. Once the
fault time is reached the output will shutdown for a time
given by:
TCT
SD
=• •2 106
IMAX: This pin programs the maximum allowable sour-
cing current. Since VDD is a regulated voltage, a voltage
divider can be derived from VDD to generate the program level for the IMAX pin. The current level at which
the output appears as a current source is equal to the
voltage on the IMAX pin over the current sense resistor.
If desired, a controlled current startup can be programmed with a capacitor on the imax pin, and a programmed start delay can be achieved by driving the
shutdown with an open collector/drain device into an RC
network.
OUT: Output drive to the MOSFET pass element.
PL: This feature ensures that the average MOSFET
power dissipation is controlled. A resistor is connected
from this pin to the drain of the NMOS pass element.
When the voltage across the NMOS exceeds 5V, current
will flow into the PL pin which adds to the fault timer
charge current, reducing the duty cycle from the 3%
level. When I
PL
>>36µA then the average MOSFET
power dissipation is given by:
PIMAX R
FET avg PL
()
=•••
−
110
6
SENSE: Input voltage from the current sense resistor.
When there is greater than 50mV across this pin with respect to VSS, then a fault is sensed, and CT starts to
charge.
SD/FLT: This pin provides fault output indication and
shutdown control. Interface into and out of this pin is usually performed through level shift transistors. When 20µA
is sourced into this pin, shutdown drives high causing the
output to disable the NMOS pass device. When opened,
and under a non-fault condition, the SD/FLT pin will pull
to a low state. When a fault is detected by the fault timer,
or undervoltage lockout, this pin will drive to a high state,
indicating the output FET is off.
VDD: Current driven with a resistor to a voltage at least
10V more positive than VSS. Typically a resistor is connected to ground. The 10V shunt regulator clamps VDD
at 10V above the VSS pin, and is also used as an output
reference to program the maximum allowable sourcing
current.
VSS: Ground reference for the IC and the most negative
voltage available.
PIN DESCRIPTIONS
4
UCC1913
UCC2913
UCC3913
8
5
6
4
OVERCURRENT
COMPARATOR
R
PL
PL
R
S
SENSE
VSS
VSS
INPUT VOLTAGE
OUTPUT
LOAD
V
DD
I1
36µA
+
SQ
QR
H=CLOSE
I2
1µA
I3
1mA
+
SENSE
IMAX
H=CLOSE
0.5V
2.5V
C
T
VSS
TO OUTPUT
DRIVE
H=OFF
OVERLOAD COMPARATOR
CT
FAULT TIMING CIRCUITRY
0.2V
5.0V
50mV
APPLICATION INFORMATION
Figure 1. Fault timing circuitry for the UCC1913, including power limit overload.
Figure 1 shows the detailed circuitry for the fault timing
function of the UCC1913. For the time being, we will discuss a typical fault mode, therefore, the overload comparator, and current source I3 does not work into the
operation. Once the voltage across the current sense resistor, R
S
, exceeds 50mV, a fault has occurred. This
causes the timing capacitor to charge with a combination
of 36µA plus the current from the power limiting amplifier.
The PL amplifier is designed to only source current into
the CT pin and to begin sourcing current once the voltage across the output FET exceeds 5V. The current I
PL
is related to the voltage across the FET with the following
expression:
I
VV
R
PL
FET
PL
=
−5
Where V
FET
is the voltage across the NMOS pass de-
vice.
Later it will be shown how this feature will limit average
power dissipation in the pass device. Note that under a
condition where the output current is more than the fault
level, but less than the max level, V
OUT
~ VSS (input
voltage), IPL= 0, the CT charging current is 36µA.
During a fault, CT will charge at a rate determined by the
internal charging current and the external timing capacitor. Once CT charges to 2.5V, the fault comparator
switches and sets the fault latch. Setting of the fault latch
causes both the output to switch off and the charging
switch to open. CT must now discharge with the 1µA current source, I2, until 0.5V is reached. Once the voltage at
CT reaches 0.5V, the fault latch resets, which re-enables
the output and allows the fault circuitry to regain control
of the charging switch. If a fault is still present, the fault
comparator will close the charging switch causing the cycle to begin. Under a constant fault, the duty cycle is
given by:
DutyCycle
A
IA
PL
=
+136µµ
Average power dissipation in the pass element is given
by:
PVIMAX
A
IA
FET avg FET
PL
()
=• •
+136µµ
where V
FET
>> 5V IPLcan be approximated as :
V
R
FET
PL
and where IPL>>36µA, the duty cycle can be approximated as :
UDG-99004
5
UCC1913
UCC2913
UCC3913
IOUT
IMAX
IFAULT
Io(nom)
0A
V
CT
2.5V
0.5V
0V
0V
V
OUT
VSS
t
0
t1 t2 t3 t4 t5 t6 t7 t8 t9 t10
t
t
t
Output
Current
C
T
Voltage
(w/respectto VSS)
Output
Voltage
(w/respectt oGND)
APPLICATION INFORMATION (cont.)
Figure 2. Typical timing diagram.
t0: safe condition – output current is nominal, output
voltage is at the negative rail, VSS.
t1: fault control reached – output current rises above
the programmed fault value, CT begins to charge at
≅ 36µA.
t2: max current reached – output current reaches the
programmed maximum level and becomes a constant current with value I
MAX
.
t3: fault occurs – CT has charged to 2.5V, fault output
goes high, the FET turns off allowing no output current to flow, V
OUT
floats up to ground.
t4: retry – CT has discharged to 0.5V, but fault current
is still exceeded, CT begins charging again, FET is
on, V
OUT
pulled down to VSS.
t5: t5 = t3: illustrates 3%duty cycle.
t6: t6 = t4
t7: output short circuit - if V
OUT
is short circuited to
ground, CT charges at a higher rate depending
upon the values for VSS and R
PL
.
t8: fault occurs – output is still short circuited, but the
occurrence of a fault turns the FET off so no current
is conducted.
t9: t9 = t4; output short circuit released, still in fault
mode.
t10: t10 = t0; fault released, safe condition – return to
normal operaton of the circuit breaker.
6
UCC1913
UCC2913
UCC3913
1µ
AR
V
PL
FET
•
Therefore, the maximum average power dissipation in
the MOSFET can be approximated by:
P
VIMAX
AR
V
IMAX A R
FET avg
FET
PL
FET
PL
()
=
••
•
=••
11µ
µ
Notice that in the approximation, V
FET
cancels. therefore,
average power dissipation is limited in the NMOS pass
element.
Overload Comparator
The linear amplifier in the UCC1913 ensures that the
output NMOS does not pass more than I
MAX
(which is
V
IMAX/RS
). In the event the output current exceeds the
programmed I
MAX
by 0.2V/RS, which can only occur if
the output FET is not responding to a command from the
IC, the CT pin will begin charging with I3, 1mA, and continue to charge to approximately 8V. This allows a constant fault to show up on the SD/FLT pin, and also since
the voltage on CT will only charge past 2.5V in an overload fault mode, it can be used for detection of output
FET failure or to build in redundancy in the system.
Determining External Component Values
Referring now to Figure 3. To set R
VDD
the following
must be achieved:
()
()
V
R
V
RR
mA
IN
VDD
min
>
+
+
10
12
2
In order to estimate the minimum timing capacitor, CT,
several things must be taken into account. For example,
given the schematic below as a possible (and at this
point, a standard) application, certain external component values must be known in order to estimate C
T(min)
.
Now, given the values of C
OUT
, Load, R
SENSE
, VSS, and
the resistors determining the voltage on the IMAX pin,
the user can calculate the approximate startup time of
the node V
OUT
. This startup time must be faster than the
time it takes for CT to charge to 2.5V (relative to VSS),
and is the basis for estimating the minimum value of CT.
In order to determine the value of the sense resistor,
R
SENSE
, assuming the user has determined the fault cur-
rent, R
SENSE
can be calculated by:
R
mV
I
SENSE
FAULT
=
50
APPLICATION INFORMATION (cont.)
Figure 3.
∞
Figure 4. Plot average power vs. FET voltage for
increasing values of R
PL
.
SHUTDOWN
SD/FLT7
R4
R3
VSS
LEVEL SHIFT
LOCAL VDD
LOCAL GND
FAULT OUT
Figure 5. Possible level shift circuitry to interface to
the UCC1913.
7
UCC1913
UCC2913
UCC3913
1
2
LINEAR
CURRENT
AMPLIFIER
PL
7
OUT
IMAX
+
V
DD
50Ω
8
V
DD
6
SENSE
5
VSS
4
CT
ON-TIME
CONTROL
3
VDD
UVLO
5.0V
REF
LOGIC
SUPPLY
9.5V SHUNT REGULATOR
+
20µA
1=
UNDERVOLTAGE
SOURCE
ONLY
SD/FLT
V
DD
CSS
R2
VSS
C
VDD
R1
R
VDD
R
T
OUTPUT
R
S
C
T
VSS
FAULT=
50mV
DISABLE
Figure 6. Typical application diagram.
Next, the variable I
MAX
must be calculated. I
MAX
is the
maximum current that the UCC1913 will allow through
the transistor, M1, and it can be shown that during
startup with an output capacitor the power MOSFET, M1,
can be modeled as a constant current source of value
I
MAX
where:
I
V
R
MAX
IMAX
SENSE
=
where V
IMAX
= voltage on pin IMAX.
Given this information, calculation of the startup time is
now possible via the following:
Current Source Load:
T
CVSS
II
START
OUT
MAX LOAD
=
•
−
Resistive Load:
TCRn
IR
IRVSS
START OUT OUT
MAX OUT
MAX OUT
=••
•
•−
Once T
START
is calculated, the power limit feature of the
UCC1913 must be addressed and component values derived. Assuming the user chooses to limit the maximum
allowable average power that will be associated with the
circuit breaker, the power limiting resistor, R
PL
, can be
easily determined by the following:
APPLICATION INFORMATION (cont.)
UDG-99002
8
UCC1913
UCC2913
UCC3913
Although the UCC3913 is designed to provide system
protection for all fault conditions, all integrated circuits
can ultimately fail short. For this reason, if the UCC3913
is intended for use in safety critical applications where
UL or some other safety rating is required, a redundant
safety device such as a fuse should be placed in series
with the device. The UCC3913 will prevent the fuse from
blowing for virtually all fault conditions, increasing system
reliability and reducing maintenance cost, in addition to
providing the hot swap benefits of the device.
SAFETY RECOMENDATION
()
R
P
AI
PL
FET avg
MAX
=
•1µ
where a minimum R
PL
exists defined by
()
R
VSS
mA
PL
min
=
5
Finally, after computing the aforementioned variables,
the minimum timing capacitor can be derived as such:
Current Source Load:
()
()
C
TARVSSV
R
T
START PL
PL
min
=
•••+−
•
362 10
10
µ
Resistive Load:
()
()
C
TARVSSVIR
R
R
T
START PL MAX OUT
PL
OU
min
=
••+−−•
•
+
•
331 5
5
3
µ
TOUT
PL
VSS C
R
••
•5
APPLICATION INFORMATION (cont.)
UNITRODE CORPORATION
7 CONTINENTALBLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 FAX (603) 424-3460
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