Texas Instruments UC3845N, UC3845DTR, UC3845D8TR, UC3845D8, UC3845D Datasheet

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UC1842/3/4/5 UC2842/3/4/5 UC3842/3/4/5
Current Mode PWM Controller
FEATURES
Optimized For Off-line And DC To DC Converters
Low Start Up Current (<1mA)
Pulse-by-pulse Current Limiting
Enhanced Load Response Characteristics
Under-voltage Lockout With Hysteresis
Double Pulse Suppression
High Current Totem Pole Output
Internally Trimmed Bandgap Reference
500khz Operation
Low R
O
Error Amp
DESCRIPTION
The UC1842/3/4/5 family of control ICs provides the necessary features to im­plement off-line or DC to DC fixed frequency cur rent mode control schemes with a minimal external parts count . Interna l l y impleme nt ed circuits include un­der-voltage lockout featuring start up current less than 1mA, a precision refer­ence trimmed for accuracy at the error amp input, logic to insure latched operation, a PW M com parator whic h also provides current limit contr ol, and a totem pole output stage designed to source or sink high peak current. The out­put stage, suitable for driving N Channel MOSFETs, is low in the off state.
Differences between members of this family are the under-voltage lockout thresholds and maximum du ty cycle ranges. The UC1842 and UC1844 have UVLO thresholds of 16V (on) and 10V (off), ideally suited to off-line applic a­tions. The correspondin g thresholds for the UC 1843 and UC1845 are 8.4V and 7.6V. The UC1842 and UC1843 c an operate to duty cyc les approaching 100%. A range of zero t o 50 % i s o bt ain ed by t he UC 1844 and UC1845 by the addition of an i nternal toggle flip flop which blanks the output off every other clock cycle.
BLOCK DIAGRAM
A/B
Note 1: A = DIL-8 Pin Number. B = SO-14 Pin Number. Note 2: Toggle flip flop used only in 1844 and 1845.
4/97
UC1842/3/4/5 UC2842/3/4/5 UC3842/3/4/5
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Supply Voltage (ICC <30mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Self Limiting
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A
Output Energy (Capacitive Load). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5µJ
Analog Inputs (Pins 2, 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.3V
Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Power Dissipation at TA ≤ 25°C (DIL-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
Power Dissipation at TA ≤ 25°C (SOIC-14). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 725mW
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Note 1: All voltages are with respect to Pin 5.
All currents are positive into the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations
of packages.
CONNECTION DIAGRAMS
DIL-8, SOIC-8 (TOP VIEW) N or J Package, D8 Package
PLCC-20 (TOP VIEW) Q Package
SOIC-14 (TOP VIEW) D Package
PACKAGE PIN FUNCTION
FUNCTION PIN
N/C 1 COMP 2 N/C 3 N/C 4 V
FB
5 N/C 6 I
SENSE
7 N/C 8 N/C 9 R
T/CT
10 N/C 11 PWR GND 12 GROUND 13 N/C 14 OUTPUT 15 N/C 16 V
C
17 V
CC
18 N/C 19 V
REF
20
2
PARAMETER TEST CONDITIONS
UC1842/3/4/5 UC2842/3/4/5
UC3842/3/4/5 UNITS
MIN TYP MAX MIN TYP MAX
Reference Section
Output Voltage TJ = 25°C, IO = 1mA 4.95 5.00 5.05 4.90 5.00 5.10 V Line Regulation 12 ≤ V
IN
25V 6 20 6 20 mV
Load Regulation 1 ≤ I
0
≤ 20mA 6 25 6 25 mV Temp. Stability (Note 2) (Note 7) 0.2 0.4 0.2 0.4 mV/°C Total Output Variation Line, Load, Temp. (Note 2) 4.9 5.1 4.82 5.18 V Output Noise Voltage 10Hz ≤ f ≤ 10kHz, T
J
= 25°C (Note2) 50 50
µ
V
Long Term Stability T
A
= 125°C, 1000Hrs. (Not e 2) 5 25 5 25 mV
Output Short Circuit -30 -100 -180 -30 -100 -180 mA
Oscillator Section
Initial Accuracy T
J
= 25°C (Note 6) 47 52 57 47 52 57 kHz
Voltage Stability 12 ≤ V
CC
≤ 25V 0.2 1 0.2 1 %
Temp. Stability T
MIN
≤ T
A
T
MAX
(Note 2) 5 5 %
Amplitude V
PIN 4
peak to peak (Note 2) 1.7 1.7 V
Error Amp Section
Input Voltage V
PIN 1
= 2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V
Input Bias Current -0.3 -1 -0. 3 -2
µ
A
A
VOL
2 ≤ V
O
4V 65 90 65 90 dB Unity Gain Bandwidth (Note 2) TJ = 25°C 0.7 1 0.7 1 MHz PSRR 12 ≤ V
CC
25V 6070 6070 dB
Output Sink Current V
PIN 2
= 2.7V, V
PIN 1
= 1.1V 2 6 2 6 mA
Output Source Current V
PIN 2
= 2.3V, V
PIN 1
= 5V -0.5 -0.8 -0.5 -0.8 mA
V
OUT
High V
PIN 2
= 2.3V, RL = 15k to ground 5 6 5 6 V
V
OUT
Low V
PIN 2
= 2.7V, RL = 15k to Pin 8 0.7 1.1 0.7 1.1 V
Current Sense Section
Gain (Notes 3 and 4) 2.85 3 3.15 2.85 3 3.15 V/V Maximum Input Signal V
PIN 1
= 5V (Note 3) 0.9 1 1.1 0.9 1 1.1 V
PSRR 12 ≤ V
CC
≤ 25V (Note 3) (Note 2) 70 70 dB
Input Bias Current -2 -10 -2 -10
µ
A
Delay to Output V
PIN 3
= 0 to 2V (Note 2) 150 300 150 300 ns
UC1842/3/4/5 UC2842/3/4/5 UC3842/3/4/5
ELECTRICAL CHARACTERISTICS:
Unless otherwise st ated, these specific at ions apply for -55°C ≤ TA ≤ 125°C for the UC184X; -40°C ≤ TA ≤ 85°C for the UC284X; 0°C ≤ TA ≤ 70°C for the 384X; VCC = 15V (Note 5); RT = 10k; CT =3.3nF, TA=T
J.
Note 2: These parameters, although guaranteed, are not 100% tested in production. Note 3: Parameter measured at trip point of latch with V
PIN 2
= 0.
Note 4: Gain defined as A
=
V
PIN
1
V
PIN
3
, 0 ≤
V
PIN
3
≤ 0.8
V
Note 5: Adjust V
CC
above the start thre sh old before setting at 15V.
Note 6: Output frequenc y eq ua ls osc il la t o r fr eq ue nc y fo r the UC1842 and UC1843.
Output frequency is one half oscillator frequency for the UC1844 and UC1845.
Note 7: Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation:
Temp
Stability
=
V
REF
(
max
) −
V
REF
(
min
)
T
J
(
max
) −
T
J
(
min
)
V
REF
(max) and V
REF
(min) are the maximum and minimum r eference voltages measured over the appropriate
temperature range. Note that the ex tremes in voltage do not necessarily occur at the extremes in temperature.
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