Texas Instruments UC2633N, UC1633J883B, UC1633J Datasheet
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• Precision Phase Locked Frequency
Control System
• Crystal Oscillator
• Programmable Reference Frequency
Dividers
• Phase Detector with Absolute Frequency
Steering
• Digital Lock Indicator
• Double Edge Option on the Frequency
Feedback Sensing Amplifier
• Two High Current Op-Amps
• 5V Reference Output
Phase Locked Frequency Controller
UC1633
UC2633
UC3633
FEATURES
The UC1633 family of integrated circuits was designed for use in phase
locked frequency control loops. While optimized for precision speed
control of DC m ot ors, t hes e devices are u niversal en ough for most applications that require phase locked control. A precise reference frequency can be generated us ing the device’s high frequency oscillator
and programma ble frequency dividers. The oscillator operates using a
broad range of crystals, or, can function as a buffer stage to an external
frequency source.
The phase detector on these integrated circuits compares the reference freque ncy with a f requenc y/phase feedback signal. In the case of
a motor, feedback is obtained at a hall ou tput of other speed detection
device. This signal is buffered by a sense ampilfier that squares up the
signal as it goes into the digital phase detector. The phase detector responds propor tionally to the phase error between the reference and the
sense amplifier output. This phase detector includes absolute frequency steering to provide maximum drive signals when any frequency
error exists. This feature allows optimum start-up and lock times to be
realized.
Two op-amps are included that can be configured to provide necessary
loop filtering. The outputs of the op-amps will source or sink in excess
of 16mA, so they can provide a low impedence control signal to driving
circuits.
Additional featur es i nc l ud e a do uble edge option on the sense amplifier
that can be use d to double the loop reference frequency for increased
loop bandwidths. A digital lock signal is provided that indicates when
there is zero fr equen cy erro r, and a 5V reference output allows DC operating levels to be accurately set.
DESCRIPTION
BLOCK DIAGRAM
1
PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNITS
Supply Current +VIN = 15V 20 28 mA
Reference
Output Voltage (V
REF
) 4.75 5.0 5.25 V
Load Regulation I
OUT
= 0V to 7mA 5.0 20 mV
Line Regulation +V
IN
= 8V to 15V 2.0 20 mV
Short Circuit Current V
OUT
= 0V 12 30 mA
Oscillator
DC Voltage Gain Oscillator Input to Oscillator Output 12 16 20 dB
Input DC Level (V
IB
) Oscillator Input Pin Open, TJ = 25°C 1.15 1.3 1.45 V
Input Impedance (Not e 3) V
IN
= VIB ±0.5V, TJ = 25°C 1.3 1.6 1.9 k
Ω
Output DC Level Oscillator Input Pin Open, TJ = 25°C 1.2 1.4 1.6 V
Maximum Operating Frequency 10 MHz
Dividers
Maximum Input Frequency Input = 1VPP at Oscillator Input 10 MHz
Div. 4/5 Input Current Input = 5V (Div. by 4) 150 500
µ
A
Input = 0V (Div. by 5) -5.0 0.0 5.0
µ
A
Div. 4/5 Threshold 0.5 1.6 2.2 V
Note 3: These impedence levels will vary with TJ at about 1700ppm/°C
UC1633
UC2633
UC3633
Input Supply Voltage (+VIN) . . . . . . . . . . . . . . . . . . . . . . . . +20V
Reference Output Current . . . . . . . . . . . . . . . . . . . . . . . . -30mA
Op-Amp Output Currents . . . . . . . . . . . . . . . . . . . . . . . . ±30mA
Op-Amp Input Voltages . . . . . . . . . . . . . . . . . . . . . -.3V to +20V
Phase Detector Output Current . . . . . . . . . . . . . . . . . . . ±10mA
Lock Indicator Output Current . . . . . . . . . . . . . . . . . . . . +15mA
Lock Indicator Output Voltage . . . . . . . . . . . . . . . . . . . . . . +20V
Divide Select Input Voltages . . . . . . . . . . . . . . . . . -.3V to +10V
Double Edge Disable Input Voltage . . . . . . . . . . . . -.3V to +10V
Oscillator Input Voltage . . . . . . . . . . . . . . . . . . . . . . -.3V to +5V
Sense Amplifier Input Voltage . . . . . . . . . . . . . . . . .3V to +20V
Power Dissipation at TA = 25°C (Note 2 . . . . . . . . . . . 1000mW
Power dissipation at TC = 25°C (Note 2) . . . . . . . . . . . 2000mW
Operating Junction Temperature . . . . . . . . . . . -55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300°C
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAMS
PACKAGE PIN FUNCTION
FUNCTION PIN
N/C
1
Div 4/5 Input
2
Div 2/4/8 Input
3
Lock Indicator Output
4
Phase Detector Output
5
N/C
6
Dbl Edge Disable Input
7
Sense Amp Input
8
5V Ref Output
9
Loop Amp Inv Input
10
N/C
11
Loop Amp Output
12
Aux Amp Non-Inv Input
13
Aux Amp Inv Input
14
Aux Amp Output
15
N/C
16
+V
IN
17
OSC Output
18
OSC Input
19
Ground
20
PLCC-20 (T OP VI EW)
Q Package
Note1: V oltages are referenced to ground, (Pin 16). Currents
are positive into, negative out of, the specified terminals.
Note 2: Consult Packaging Section of Databook for thermal limitations and considerations of package.
DIL-16 (TOP VIEW)
J or N Package
ELECTRICAL CHARACTERISTICS:
(Unless otherwise stated, these specifications apply for TA = 0°C to +70°C for the
UC3633, -25°C to +85°C for the UC2633, -55°C to +125°C for the UC1633, +VIN =
12V; TA=TJ.)
2
PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNITS
Dividers (cont.)
Div. 2/4/8 Input Curre nt Input = 5V (Div. by 8) 150 500
µ
A
Input = 0V (Div. by 2) -500 -150
µ
A
Div. 2/4/8 Open Circui t Vol tage Input Current = 0µA (Div. by 4) 1.5 2.5 3.5 V
Div. by 2 Threshold 0.20 0.8 V
Div. by 4 Threshold 1.5 3.5 V
Div. by 8 Threshold Volts Below V
REF
0.20 0.8 V
Sense Amplifier
Threshold Voltage Percent of V
REF
27 30 33 %
Threshold Hysteresis 10 mV
Input Bias Current Input = 1.5V -1.0 -0.2
µ
A
Double Edge Disable Input
Input Current Input = 5V (Disabled) 150 500
µ
A
Input = 0V (Enabled) -5.0 0.0 5.0
µ
A
Threshold Voltage 0.5 1.6 2.2 v
Phase Detector
High Output Level Positive Phase/Freq. Error, Volts Below V
REF
0.2 0.5 V
Low Output Level Negative Phase/Freq. Error 0.2 0.5 V
Mid Output Level Zero Phase/Freq. Error, Percen t of V
REF
47 50 53 %
High Level Maxi mum Source Current V
OUT
= 4.3V 2.0 8.0 mA
Low Level Maximum Sink Current V
OUT
= 0.7V 2.0 5.0 mA
Mid Level Output Im pe da nc e (Note 3) I
OUT
= -200 to +200µA, TJ = 25°C 4.5 6.0 7.5 k
Ω
Lock Indicator Output
Saturation Voltage Freq. Error, I
OUT
= 5mA 0.3 0.45 V
Leakage Current Zero Freq. Error, V
OUT
= 15V 0.1 1.0
µ
A
Loop Amplifier
NON INV. Reference Voltage Percent of V
REF
47 50 53 %
Input Bias Current Input = 2.5V -0.8 -0.2
µ
A
AVOL 60 75 dB
PSRR +V
IN
= 8V to 15V 70 100 dB
Short Circuit Current Source, V
OUT
= 0V 16 35 mA
Sink, V
OUT
= 5V 16 30 mA
Auxiliary Op-Amp
Input Offset Voltage V
CM
= 2.5V 8 mV
Input Bias Current VCM = 2.5V -0.8 -0.2
µ
A
Input Offset Current V
CM
= 2.5V .01 0.1
µ
A
AVOL 70 120 dB
PSRR +V
IN
= 8V to 15V 70 100 dB
CMRR VCM = 0V to 10V 70 100 dB
Short Circuit Current Source, V
OUT
= 0V 16 35 mA
Sink, V
OUT
= 5V 16 30 mA
Note 3: These impedence levels will vary with TJ at about 1700pp m/ °C
UC1633
UC2633
UC3633
ELECTRICAL
CHARACTERISTICS (cont.):
(Unless otherwise stated, these specifications apply for TA = 0°C to +70°C for t he UC3 633,
-25°C to +85°C for the UC2633, -55°C to +125°C for the UC1633, +VIN = 12V; TA=TJ.)
3
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