The UC1526A Series are improved-performance pulse-width modulator circuits intended for direct replacement of equivalent non- “A”
versions in all a pplications. Higher frequency ope ration has been
enhanced by several significant improvements including: a more accurate oscillator with less minimum dead time, reduced circuit delays (particularly i n current limiting), and an improved output stage
with negligible cross-condu ction current. Additional improvements
include the incorporation of a precisi on, band-g ap reference generator, reduced overall supply current, and the addition of thermal
shutdown protection.
Along with these improvements, the UC1526A Series retains the
protective features of under-voltage lockou t, soft-start, digital current limiting, double pulse suppression logic, and adjustable
deadtime. For ease of interfacing, all digital control ports are TTL
compatible with active low logic.
Five volt (5V) operation is possible for “logic level” applications by
connecting V
factory for additional information.
IN, VC and VREF to a precision 5V input supply. Consult
Note 3: Range over which the device is functional and
parame te r limit s are guar ant eed .
PACKAGE PIN FUNCTION
FUNCTIONPIN
N/C1
+ERROR2
-ERROR3
COMP.4
SS5
C
RESET6
- CURRENT SENSE7
+ CURRENT SENSE8
SHUTDOWN9
TIMING10
R
T11
C
D12
R
SYNC13
OUTPUT A14
C15
V
N/C16
GROUND17
OUTPUT B18
IN19
+V
REF20
V
2
UC1526A
UC2526A
UC3526A
+V
ELECTRICAL CHARACTERISTICS:
PARAMETERTEST CONDITIONS
Reference Sec tion (Note 4)
Output Volt ageT
Line Regulatio n+V
Load RegulationI
Temperature StabilityOver Operating T
Total Output Voltage
Range
Short Circuit CurrentV
Under-Voltage Lockout
RESET Output VoltageVREF = 3.8V0.20.40.20.4V
Oscillato r Sect io n (Note 6)
Initial AccuracyT
Voltage Stability+V
Temperature StabilityOver Operating T
Minimum FrequencyR
Maximum FrequencyR
Sawtooth Peak Voltage+ V
Sawtooth Valley Voltage+V
SYNC Pulse WidthTJ = 25°C, RL = 2.7kΩ to V
Error Ampl i fier Section (Note 7)
Input Offs et Vo lta geR
Input Bias Cur rent-350-1000-350-2000nA
Input Offs et Cu rr ent3510035200nA
DC Open Loop Gai nR
HIGH Output VoltageV
LOW Output VoltageV
Common Mode Rejec tionR
Supply Voltage Rejection+V
PWM Comparator (Note 6)
Minimum Duty CycleV
Maximum Duty CycleV
Digi tal Ports (
SYNC, SHUTDOWN, and RESET)
HIGH Output VoltageI
LOW Output VoltageI
HIGH Input CurrentV
LOW Input CurrentV
Shutdown DelayFrom Pin 8, T
Current Limit Compar ato r (Note 8)
Sense VoltageR
Input Bias Cur rent-3-10-3-10µA
Shutdown DelayFrom pin 7, 100m V Over driv e, T
Note 4: I
L =
0mA.
Note 5: Guaranteed by design, not 100% tested in product ion.
Note 6: F
OSC
= 40kHz, (RT = 4.12 kΩ ± 1%, CT = 0.01µF± 1%,
D
= 0 Ω).
R
J = +25°C4.955.005.054.905.005.10V
IN = 7 to 35V210215mV
L = 0 to 20mA520520mV
Over Recomme nded Opera ting
Conditio ns
REF = 0V25501002550100mA
VREF = 4.7V2.44.72.44.8V
J = +25°C±3±8±3±8%
IN = 7 to 35V0.510.51%
T = 150kΩ, CT = 20µF (Note 5)11Hz
T = 2kΩ, CT = 470pF5 50650kHz