TEXAS INSTRUMENTS UC1526, UC2526, UC3526 Technical data

UC1526 UC2526 UC3526
DESCRIPTION
The UC1526 is a high performance monolithic pulse width modulator circuit designed for fixed-frequency switching regulators and other power control appl ications. Included in an 18-pin dual-in-line pack­age are a temperature compensated voltage reference, sawtooth os­cillator, error amplifier, pulse width modulator, pulse metering and setting logic, and two low impedance power drivers. Also included are protective features such as soft-start and under-voltage lockout, digital current limiting, double pulse inhibit, a data latch for single pulse metering, adjustable deadtime, and provision for symmetry cor­rection inputs. For ease of interface, all digital control ports are TTL and B-series CMOS compatible. Active LOW logic design allows wired-OR connections for maximum flexibilit y. This versatile device can be used to impl ement single-ende d or push-p ull switching regu­lators of either polarity, both transformerless and transformer cou­pled. The UC1526 is characterized for operation over the full military temperature range of -55°C to +125°C. The UC2526 is characterized for operation from -25°C to +85°C, and the UC3526 is characterized for operation from 0° to +70°C.
查询UC3526DWTRG4供应商
Regulating Pulse Width Modulat or
FEATURES
8 To 35V Operation
5V Reference Trimmed To ±1%
1Hz To 400kHz Oscillator Range
Dual 100mA Source/Sink Outputs
Digital Current Limiting
Double Pulse Suppression
Programmable Deadtime
Under-Voltage Lockout
Single Pulse Metering
Programmable Soft-Start
Wide Current Limit Common Mode Range
TTL/CMOS Compatible Logic Ports
Symmetry Correction Capability
Guaranteed 6 Unit Synchronization
BLOCK DIAGRA M
6/93
ABSOLUTE MAXI MUM RATING S (Note 1, 2)
UC1526 UC2526 UC3526
PACKAGE PIN FUNCTION
FUNCTION PIN
N/C 1 +Error 2
-Error 3 Comp. 4 CSS 5 Reset
______
6
- Current Sense 7 + Current Sense 8 Shutdown
_________
9 RTIMING 10 CT 11 RD 12 Sync 13 Output A 14 VC 15 N/C 16 Ground 17 Output B 18 +VIN 19 VREF 20
+VIN = 15V, and over operating ambient temperature, unles s ot herwise specified, TA = TJ.
Input Voltage (+VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Collector Supply Voltage (+V
C) . . . . . . . . . . . . . . . . . . . . . +40V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +5.5V
Analog Input s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3V to +V
Source/S ink Load Current (ea ch out pu t) . . . . . . . . . . . . . 200mA
Referen ce Loa d Curr ent. . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Logic Sink Curren t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA
Power Dissipation at T Power Dissipation at T
A = +25°C (Note 2). . . . . . . . . . 1000mW
C = +25°C (Note 2). . . . . . . . . . 3000mW
Operating Junct ion Te mp era tu re . . . . . . . . . . . . . . . . . . +150°C
Storage Tem per ature Range . . . . . . . . . . . . . . -65°C to +150°C
Lead Temp era tu re (solder ing, 10 seconds ). . . . . . . . . . +300°C
Note 1: Values beyo nd which da mage may occ ur. Note 2: Consult packaging section of databo ok for ther m al
limitations and co nsider ations of pac kage .
CONNECTION DIAGRAMS
RECOMMENDED OPERATING CONDITIONS (Note 3)
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8V to +35V
Collector Supply Voltage . . . . . . . . . . . . . . . . . . . +4.5V to +35V
Sink/Source Lo ad Cur ren t (each out put ). . . . . . . . . 0 to 100mA
Reference Load Cur re nt . . . . . . . . . . . . . . . . . . . . . . 0 to 20mA
IN
Oscillator Frequency Range . . . . . . . . . . . . . . . . 1Hz to 400kHz
Oscillator Timing Resistor . . . . . . . . . . . . . . . . . . . 2k to 150k
Oscillator Timing Capacito r . . . . . . . . . . . . . . . . . . . 1nF to 20µF
Available Deadtime Range at 40kHz. . . . . . . . . . . . . 3% to 50%
Operating Am bient Temperature Range
UC1526 . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
UC2526 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25°C to +85°C
UC3526 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0°C to +70°C
Note 3: Range over which the device is funct ional and
parameter lim its are guarant eed.
DIL-18, SOIC- 18 (T O P VIEW) J or N Package, DW Package
PLCC-20, LCC-20 (TOP VIEW ) Q and L Packages
ELECTRICAL CHARACTERISTICS:
Reference Sec tio n (Note 4)
Output Volt age T Line Regulatio n +V Load Regulation I Temperature Stability Over Operating T Total Output
Voltage Range Short Circuit Current V
Under -Voltage Lockout
_______
RESET
Note 4: IL = 0mA.
PARAMETER TEST CONDITIONS UC1526 / UC2526 UC3526 UNITS
J = + 25°C 4.95 5.00 5.05 4.90 5.00 5.10 V
IN = 8 to 35V 10 20 10 30 mV
L = 0 to 20mA 10 30 10 50 mV
J 15 50 15 50 mV
Over Recommended Operating Con dition s
REF = 0V 25 50 100 25 50 100 mA
Output Volt age V
REF = 3.8V 0.2 0.4 0.2 0.4 V
V
REF = 4.8V 2.4 4.8 2.4 4.8 V
MIN TYP MAX MIN TYP MAX
4.90 5.00 5.10 4.85 5.00 5.15 V
2
ELECTRICAL CHARACTERIST ICS :
+VIN = 15V, and over operating ambient temper at ure, unless othe rwise specified, TA = TJ.
UC1526 UC2526 UC3526
PARAMETER TEST CONDI TIO NS UC1526 / UC2526 UC3526 UNITS
MIN TYP MAX MIN TYP MAX
Oscillator Section (Note 5)
Initial Accuracy T Voltage Sta bi lity +V Temperature Stability Over Operating T Minimum Frequency R Maximum Fr equency R Sawtooth Peak Volt age +V Sawtooth Valley Voltage +V
Err or Am p lifier Section ( Note 6)
Input Offset Voltage R Input Bias Current -350 -1000 -350 -2000 nA Input Offset Current 35 100 35 200 nA DC Open Loop Gain R HIGH Output Volt age V
LOW Outpu t Voltage V Common Mode Rejection Rs 12k 70 94 70 94 dB Supply Voltage Rejec tion +V
PWM Compar ator (Note 5)
Minimum Duty Cycle V Maximum Duty Cycle V
Digital Ports (
SYNC, SHUTDOWN, and RESET)
HIGH Output Volt age I LOW Outpu t Voltage I HIGH Input Curren t V LOW Input Current V
Current LImit Comparator ( Not e 7)
Sense Voltage R Input Bias Current -3 -10 -3 -10 µA
Soft-Start Sect ion
Error Clamp Voltage Cs Charging Current
Output Dri ve rs (Each Out put ) ( Note 8)
HIGH Output Volt age I
LOW Outpu t Voltage I
Collector Leakage V Rise Time CL = 1000pF 0.3 0.6 0.3 0.6 µs Fall Time CL = 1000pF 0.1 0.2 0.1 0.2 µ s
Power Consumption (Note 9)
Standby Curre nt SHUTDOW N
J = + 25°C ±3 ±8 ±3 ±8%
IN = 8 to 35V 0.5 1 0.5 1 %
J 710 3 5% T = 150kΩΩ, CT = 20µµF11Hz T = 2kΩΩ, CT = 1.0nF 400 400 kHz
IN = 35V 3.0 3.5 3.0 3.5 V IN = 8V 0.5 1.0 0.5 1.0 V
S ≤≤ 2kΩΩ 25 210mV
L 10MΩΩ 64 72 60 72 dB
PIN1-VPIN2 ≥≥ 150m V, ISOURCE =
3.6 4.2 3.6 4.2 V
100µµA
PIN2-VPIN1 ≥≥ 150mV, ISINK = 100µµA 0.2 0.4 0.2 0.4 V
IN = 12 to 18V 66 80 66 80 dB
COMPENSATION = +0.4V 0 0 % COMPENSATION = +3.6V 45 49 45 49 %
SOURCE =40µµA 2.4 4.0 2.4 4.0 V SINK = 3.6mA 0.2 0.4 0.2 0.4 V
IH = +2.4V -125 -200 -125 -200 µA IL = +0.4V -225 -360 -225 -360 µA
S ≤≤ 50ΩΩ 90 100 110 80 100 120 mV
RESET = +0.4V 0.1 0.4 0.1 0.4 V RESET =+2.4V 50 100 150 50 100 150 µA
SOURCE = 20mA 12.5 13.5 12.5 13.5 V
I
SOURCE = 100mA 12 1 3 12 13 V SINK = 20mA 0.2 0.3 0.2 0.3 V
I
SINK = 100mA 1.2 2.0 1.2 2.0 V
C = 40V 50 150 50 150 µA
____________
=
+0.4V 18 30 18 30 mA
Note 4: IL = 0mA.
OSC
Note 5: F
R
= 40kHz (RT = 4.12k
D
= 0Ω)
Ω ±
1%, CT = 0.1µF ± 1%,
Note 6: V Note 8: V Note 9: +V
3
CM
= 0 to +5.2 V
C
= +15V
IN
= +35V, RT = 4.12k
UC1526 UC2526 UC3526
APPLICATIONS INFORMATION
Voltage Referenc e
The reference regulator of the UC1526 is based on a tem-
perature compensated ze ner diode. The circuitry is fully active at supply voltag es above +8V, and provides up to 20mA of load current to external circuitry at +5.0V. In sys­tems where additional current is required, an external PNP transistor can be used to boost the available current. A rugged low frequency audio-type transistor should be used, and lead lengths between the PWM and transistor should be as sho rt as possible to minimize the risk of os­cillations. Even so, some types of transistors may require collector-base capacitance for stability. Up to 1 amp of load current can b e obtained with excellent regulati on if the device selected maintains high current gain.
Figure 1. Extending Referen ce O ut put Current Under-Voltage Lockout
The under-voltage lockout circuit protects the UC1526 and the power devices it controls from inadequate supply voltage, If +V
drivers and holds the RESET spurious output pulses w hile the control circuitry is stabi­lizing, and holds the soft-start timing capacitor in a dis­charged state.
IN is too low, the circuit disables the output
_______
pin LOW. This prevents
Figure 2. U n der -Voltag e Lock out Schem ati c
Soft-Start Circuit
The soft-start circuit protects the power transistors and rectifier diodes from high current surges during power supply turn-on. When supply voltage is first applied to the
_______
UC1526, the unde r-voltage lockout circuit holds RESET LOW with Q
3. Q1 is turned on, which holds the soft-start
capacitor voltage at zero. The second collector of Q clamps the output of the error amplifier to ground, guaran­teeing zero duty cycle at the driver outputs. When the
_______
supply voltage reache s normal operating range, RESET will go HIGH. Q current source to charge C fier output to 1V
1 turns off, allowing the internal 100mA
S. Q2 clamps the error ampli-
BE above the voltage on CS. As the soft-
start voltage ramps up to +5V, the duty cycle of the PWM linearly increases to whatever value the voltage regula­tion loop requires for an error null.
1
The circuit consists of a +1.2V bandgap reference and comparator circuit which is active when the reference voltage has risen to 3V erence voltage rises to approximately +4.4V, the circuit
enables the output drivers an d releases the RESET
BE or +1.8V at 25°C. When the ref-
_______
pin, allowing a normal soft-start. The comparator has 200mV of hysteresis to minimize oscillation at the trip point. When +V
IN to the PWM is removed and the reference
_______
drops to +4.2V, the under-voltage circuit pulls RESET LOW again. The soft-start capacitor is immediately dis­charged, and the PWM is ready for another soft-start cy­cle.
The UC1526 can operate from a +5V supply by connect­ing the V ply between +4.8 and +5.2V.
REF pin to the +VIN pin and maintaining the sup-
Figure 3. Soft-Start Circuit Schemati c Digital Control Ports
The three digital control ports of the UC1526 are bi-direc­tional. Each p in can drive TTL and 5V CMOS logic di­rectly, up to a fan-out of 10 low-power Schottky gates. Each pin can also be directly driven by open-collector
4
APPLICATIONS INFORMATION (cont.)
TTL, open-drain CMOS, and open-collector voltage com­parators; fan-in is equivalent to 1 low-power Schottky gate. Each port is no rmally HIGH; the pin is pulled LOW
to activate the particular function. Driving SYNC itiates a discharge cycle in the oscillator. Pulling
____________
SHUTDOWN pulses. Holding RESET
LOW immediately inhibits all PWM output
_______
LOW discharges the soft-start capacitor. The logic threshold is +1.1V at +25°C. Noise immunity can be gained at the expense of fan-out with an external 2k pull-up resistor to +5V.
Figure 4. Digital Control Port Schem at ic Oscillator
The oscillator is programmed for frequency and dead time with three components: R
T, CT and RD. Two waveforms
are generated: a sawtooth wa veform at pin 10 for p ulse width modulation, and a logic clock at pin 12. The follow­ing procedure is recommended for choosing timing val­ues:
1. With R for R
D = 0 (pin 11 shorted to ground) select values
T and CT from Figure 7 to give the desired oscillator
period. Remember that the frequency at each driver out­put is half the oscillator freq uency, and the frequency at the +V
C terminal is the same as the oscillator frequency .
2. If more dead ti me is required , select a larg e value of
D. At 40kHz dead time increases by 400ns/ .
R
______
LOW in-
UC1526 UC2526 UC3526
Multiple devices can be synchronized together by pro­gramming one master unit for the desi red frequency and then sharing its sawtoo th and clock waveforms with the slave units. All C
of the master, and all SYNC nected to the SYNC
nals are left open or connected to V terminals may be either left open or grounded.
Error Amplifier
The error ampl ifi er is a transconductance design, with an output impedance of 2M . Since all vol tage gain takes place at the output pin, the open-loop gain/frequency characteristics can be controlled with shunt reactance to ground. When compensated for unity-gain stability with 100pF, the amplifier has an open-loop pole at 800Hz.
The input connections to the error amplifier are deter­mined by the polarity of the switchi ng supply output volt­age. For positi ve supplies, the common-mode voltage is +5.0V and the feedback connections in Figure 6A are used. With negative supplies, the common-mode voltage is ground and the fee dback divider is connected between the negative output and the +5.0V reference voltage, as shown in Figure 6B.
Output Drivers
The totem-pole output drivers of the UC1526 are de­signed to source and sink 100mA continuously and 200mA peak. Loads can be driven either from the output pins 13 and 16, or from the +V
Since the bottom transistor of the totem-pole is allowed to saturate, there is a momentary condu ction path from the +V
C terminal to g round during switching. To limit the re-
sulting current spikes a small resistor in series with pin 14 is always recommended. The resistor value is deter­mined by the driver supply voltage, and should be chosen for 200mA peak currents .
T terminals are connected to the CT pin
______
______
terminals a re likewise con-
pin of the master. Slave R
REF. Slave RD
C, as required.
T termi-
3. Increasin g the dead time will cause the oscillator fre­quency to decrea se slightly. Go back and decrease the value of R
T slightly to bring the frequency back to the
nominal design value. The UC1526 can be synchronized to an external logic
clock by programming the oscil lator to free-run at a fre­quency 10% slower than the sync frequ ency. A periodic
______
LOW logic pulse approximately 0.5µs wide at the SYNC pin will then lock the oscillator to the external frequency.
Figure 5. O sc illator Connec tion s and W aveforms
5
UC1526 UC2526 UC3526
Figure 6. Er ror Ampl ifier Connections
Figure 7. Push-Pull Configuration
TYPICAL CHARACTERIS TICS
Figure 8. Single-En ded Co n figu ration
Figure 9. Driving N-channel Power Mos fets
Oscillator Period vs RT and CT
Oscillatio n Perio d
6
TYPICAL CHARACTERIS TICS
UC1526 UC2526 UC3526
Output Driver Deadtime vs R
D Value Under Voltage Lockout Characteristic
Error Amplifier Open Loop Gai n vs Freq uen c y Current Limit Tran sfer Fu n ctio n
Shutdow n Delay Out put Driver Satu ration Voltag e
UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BLVD. MERRIMACK, NH 03054 TEL. (603) 424-2410 FAX (603) 424-3460
7
PACKAGE OPTION ADDENDUM
www.ti.com
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
27-Sep-2005
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2005
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package Drawing
Pins Package
Qty
Eco Plan
85515012A ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC 8551501VA ACTIVE CDIP J 18 1 TBD A42 SNPB Level-NC-NC-NC
UC1526J ACTIVE CDIP J 18 1 TBD A42SNPB Level-NC-NC-NC
UC1526J883B ACTIVE CDIP J 18 1 TBD A42 SNPB Level-NC-NC-NC
UC1526L ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
UC1526L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
UC2526J ACTIVE CDIP J 18 1 TBD A42 SNPB Level-NC-NC-NC
UC2526N ACTIVE PDIP N 18 20 Green(RoHS &
no Sb/Br)
UC2526NG4 ACTIVE PDIP N 18 20 Green (RoHS &
no Sb/Br)
UC3526DW ACTIVE SOIC DW 18 40 Green (RoHS &
no Sb/Br)
UC3526DWG4 ACTIVE SOIC DW 18 40 Green(RoHS &
no Sb/Br)
UC3526DWTR ACTIVE SOIC DW 18 2000 Green (RoHS &
no Sb/Br)
UC3526DWTRG4 ACTIVE SOIC DW 18 2000 Green (RoHS &
no Sb/Br)
UC3526J ACTIVE CDIP J 18 1 TBD A42 SNPB Level-NC-NC-NC
UC3526N ACTIVE PDIP N 18 20 Green(RoHS &
no Sb/Br)
UC3526NG4 ACTIVE PDIP N 18 20 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-2-260C-1YEAR
CU NIPDAU Level-2-260C-1YEAR
CU NIPDAU Level-2-260C-1YEAR
CU NIPDAU Level-2-260C-1YEAR
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-NC-NC-NC
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
18-Oct-2005
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty . Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security
Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless
Mailing Address: Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
Copyright © Each Manufacturing Company.
All Datasheets cannot be modified without permission.
This datasheet has been download from :
www.AllDataSheet.com
100% Free DataSheet Search Site.
Free Download.
No Register.
Fast Search System.
www.AllDataSheet.com
Loading...