15
7
6
16
V
IN
REFERENCE
V
REF
+5V TO ALL
INTERNAL
R
T
C
T
OSC
(RAMP)
3
OSC OUT
Q
Q
R
+5V
12
11
C
A
E
A
13
14
C
B
E
B
9
+5V
5
4
–SENSE
+SENSE
C L
COMPENSATION
10k
1k
10
8
GROUND
+
–
+5V
E A
1
2
INV INPUT
NI INPUT
COMPARATOR
SHUTDOWN
ADVANCED REGULATING PULSE WIDTH MODULATORS
FEATURES DESCRIPTION
• Complete PWM Power Control Circuitry
• Uncommitted Outputs for Single-Ended or
Push-Pull Applications
• Low Standby Current . . . 8 mA Typical
• Interchangeable With SG1524, SG2524 and
SG3524, Respectively
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
The UC1524, UC2524 and UC3524 incorporate on a
single monolithic chip all the functions required for the
construction of regulating power supplies, inverters or
switching regulators. They can also be used as the
control element for high-power-output applications.
The UC1524 family was designed for switching
regulators of either polarity, transformer-coupled
dc-to-dc converters, transformerless voltage doublers
and polarity converter applications employing fixedfrequency, pulse-width modulation techniques. The
dual alternating outputs allow either single-ended or
push-pull applications. Each device includes an
on-chip reference, error amplifier, programmable
oscillator, pulse-steering flip-flop, two uncommitted
output transistors, a high-gain comparator, and
current-limiting and shut-down circuitry. The UC1524
is characterized for operation over the full military
temperature range of –55 ° C to 125 ° C. The UC2524
and UC3524 are designed for operation from –25 ° C
to 85 ° C and 0 ° C to 70 ° C, respectively.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
BLOCK DIAGRAM
Copyright © 1999–2005, Texas Instruments Incorporated
+
–
+
–
OSCILLATOR
S/D
REFERENCE
REGULATOR
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
ERROR
AMP
CURRENT
AMP
V
REF
V
IN
E
B
C
B
C
A
E
A
S/D COMP
INV INPUT
NON INV
INPUT
OSC OUT
CL
SENSE(+)
CL
SENSE (–-)
R
T
GND
C
T
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
CONNECTION DIAGRAM
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
V
Supply voltage
CC
Collector output current 100 mA
Reference output current 50 mA
Current through CTterminalg –50 mA
Power dissipation
Operating junction temperature range –55 ° C to 150 ° C
Storage temperature range –65 ° C to +150 ° C
(1) All voltage values are with respect to the ground terminal, pin 8.
(2) The reference regulator may be bypassed for operation from a fixed 5 V supply by connecting the V
the supply voltage. In this configuration the maximum supply voltage is 6 V.
(3) Consult packaging section of data book for thermal limitations and considerations of package.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
V
CC
R
T
C
T
Supply voltage 8 40 V
Reference output current 0 20 mA
Current through CTterminal –0.03 –2 mA
Timing resistor 1.8 100 k Ω
Timing capacitor 0.001 0.1 µ F
Operating ambient temperature range UC2524 –25 85 ° C
(1) (2)
(3)
(3)
UC1524 –55 125
UC3524 0 70
TA= 25 ° C
TC= 25 ° C
UNIT
40 V
1000 mW
2000 mW
and reference output pins both to
CC
MIN NOM MAX UNIT
2
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
ELECTRICAL CHARACTERISTICS
these specifications apply for TA= –55 ° C to 125 ° C for the UC1524, –25 ° C to 85 ° C for the UC2524, and 0 ° C to 70 ° C for the
UC3524, V
REFERENCE SECTION
Output voltage 4.8 5.0 5.2 4.6 5.0 5.4 V
Line regulation VIN= 8 V to 40 V 10 20 10 30 mV
Load regulation IL= 0 mA to 20 mA 20 50 20 50 mV
Ripple rejection f = 120 Hz, TJ= 25 ° C 66 66 dB
Short circuit current limit V
Temperature stability Over operating temperature range 0.3% 1% 0.3% 1%
Long term stability TJ= 125 ° C, t = 1000 Hrs 20 20 mV
OSCILLATOR SECTION
Maximum frequency CT= 1 nF, RT= 2 k Ω 300 300 kHz
Initial accuracy RTand CTconstant 5% 5%
Voltage stability VIN= 8 V to 40 V, TJ= 25 ° C 1% 1%
Temperature stability Over operating temperature range 5% 5%
Output amplitude Pin 3, TJ= 25 ° C 3.5 3.5 V
Output pulse width CT= 0.01 mfd, TJ= 25 ° C 0.5 0.5 µ s
ERROR AMPLIFIER SECTION
Input offset voltage V
Input bias current V
Open loop voltage gain 72 80 60 80 dB
Common mode voltage TJ= 25 ° C 1.8 3.4 1.8 3.4 V
Common mode rejection ratio TJ= 25 ° C 70 70 dB
Small signal bandwidth AV= 0 dB, TJ= 25 ° C 3 3 MHz
Output voltage TJ= 25 ° C 0.5 3.8 0.5 3.8 V
COMPARATOR SECTION
Duty-cycle % Each output on 0% 45% 0% 45%
Input threshold V
Input bias current 1 1 µ A
CURRENT LIMITING SECTION
Sense voltage Pin 9 = 2 V with error amplifier set for 190 200 210 180 200 220 mV
Sense voltage T.C. 0.2 0.2 mV/ ° C
Common mode voltage V
OUTPUT SECTION (EACH OUTPUT)
Collector-emitter voltage 40 40 V
Collector leakage current V
Saturation voltage IC= 50 mA 1 2 1 2 V
Emitter output voltage VIN= 20 V 17 18 17 18 V
Rise Time RC= 2 k Ω , TJ= 25 ° C 0.2 0.2 µ s
Fall Time RC= 2 k Ω , TJ= 25 ° C 0.1 0.1 µ s
Total standby current (Note) VIN= 40 V 8 10 8 10 mA
= 20 V, and f = 20 kHz, TA= TJ, over operating free-air temperature range (unless otherwise noted)
IN
PARAMETER TEST CONDITIONS UNIT
= 0, TJ= 25 ° C 100 100 mA
REF
= 2.5 V 0.5 5 2 10 mV
CM
= 2.5 V 2 10 2 10 µ A
CM
Zero duty-cycle 1 1
Maximum duty-cycle 3.5 3.5
maximum out, TJ= 25 ° C
TJ= –55 ° C to 85 ° C for the –1 V to 1 V limit –1 1 –1 1
TJ= 25 ° C –0.3 1
= 40 V 0.1 50 0.1 50 µ A
CE
UC1524/UC2524 UC3524
MIN TYP MAX MIN TYP MAX
3
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
PRINCIPLES OF OPERATION
The UC1524 is a fixed-frequency pulse-width-modulation voltage regulator control circuit. The regulator
operates at a frequency that is programmed by one
timing resistor (R
establishes a constant charging current for CT. This
results in a linear voltage ramp at CT, which is fed to
the comparator providing linear control of the output
pulse width by the error amplifier. The UC1524
contains an on-board 5 V regulator that serves as a
reference as well as powering the UC1524’s internal
control circuitry and is also useful in supplying
external support functions. This reference voltage is
lowered externally by a resistor divider to provide a
reference within the common-mode range of the error
amplifier or an external reference may be used. The
power supply output is sensed by a second resistor
divider network to generate a feedback signal to the
error amplifier. The amplifier output voltage is then
compared to the linear voltage ramp at CT. The
resulting modulated pulse out of the high-gain
comparator is then steered to the appropriate output
pass transistor (Q
), and one timing capacitor (C
T
or Q2) by the pulse-steering
1
), R
T
flip-flop, which is synchronously toggled by the
oscillator output. The oscillator output pulse also
serves as a blanking pulse to assure both outputs are
never on simultaneously during the transition times.
T
The width of the blanking pulse is controlled by the
valve of CT. The outputs may be applied in a
push-pull configuration in which their frequency is half
that of the base oscillator Note that for buck regulator
topologies, the two outputs can be wire-ORed for an
effective 0-90% duty cycle range. With this
connection, the output frequency is the same as the
oscillator frequency. The output of the error amplifier
shares a common input to the comparator with the
current limiting and shutdown circuitry and can be
overridden by signals from either of these inputs. This
common point is also available externally and may be
employed to control the gain of, or to compensate,
the error amplifier or to provide additional control to
the regulator.
4
40
30
10
−10
100 1 k 10 k 100 k
Open-Loop Voltage Amplification − dB
60
70
f − Frequency − Hz
90
1 M 10 M
0
20
50
80
RF=
VIN= 20 V
T
J
= 25 C
RF= 1M
RF= 300 k
RF= 100 k
RF= 30 k
RFis Resistance From
Pin 9 to Ground
NOTE: Value of RFBelow 30 kW
Will Began to Limit Maximum Duty-Cycle
10 k
1 k
100
1 2 5 10 20
Osscilator Frequency − Hz
100 k
1 M
50 100
R
T
− Timing Resistor − kW
VIN= 20 V
T
J
= 25 C
CT= 0.001
mF
CT= 0.003
mF
CT= 0.01
mF
CT= 0.003
mF
CT= 0.1
mF
1
0.4
0.1
0.001 0.004 0.01
Output Dead Time −
4
10
0.04 0.1
µ s
CT− Capacitance − F
VIN= 20 V
T
J
= 25 C
NOTE: Dead Time = Blanking Pulse Width
Plus Outplay Delay
2
1.5
0.5
0
0 20 40 60
Collector-To-Emitter Voltage − V
2.5
3.5
Load Current − mA
4
80 100
1
3
VCC= 20 V
TJ= 125 C
TJ= 25 C
TJ= −55 C
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS
OPEN-LOOP VOLTRAGE AMPLIFICATION OSCILLATOR FREQUENCY
OF ERROR AMPLIFIER vs
vs TIMING COMPONENTS
FREQUENCY
Figure 1. Figure 2.
OUTPUT DEAD TIME OUTPUT SATURATION VOLTAGE
vs vs
TIMING CAPACITANCE VALUE LOAD CURRENT
Figure 3. Figure 4.
5