Texas Instruments TVP5154EVM User Manual

TVP5154EVM

User's Guide

Literature Number: SLEU069A

February 2006 – Revised July 2006

2 SLEU069A – February 2006 – Revised July 2006

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Contents

1 Functional Description ................................................................................................. 6

1.1 Description Overview ............................................................................................ 6

2 Board Level Description .............................................................................................. 7

2.1 Test Points and Jumpers ........................................................................................ 7

2.2 Common Board Interface ....................................................................................... 8

2.3 Video Input Description .......................................................................................... 8

2.4 Video Output Description ....................................................................................... 8

3 System-Level Description ............................................................................................ 9

4 Required Hardware and Equipment ............................................................................... 9

5 Hardware Setup .......................................................................................................... 9

6 Software Installation .................................................................................................. 10

7 WinVCC Quick Start ................................................................................................... 10

8 WinVCC in Depth ....................................................................................................... 13

8.1 Starting WinVCC ................................................................................................ 13

8.2 WinVCC Configuration Dialog Box ........................................................................... 14

8.3 I

8.4 Real-Time Polling ............................................................................................... 15

8.5 Main Menu ....................................................................................................... 16

8.6 TVP5154 Property Sheets ..................................................................................... 23

9 Programming the TMS320DM642 ................................................................................. 25

9.1 Development and Purpose of DM642 Code ................................................................ 25

9.2 Details of the DM642 Code and Control Registers ........................................................ 26

10 Troubleshooting ........................................................................................................ 33

10.1 Troubleshooting Guide ......................................................................................... 33

10.2 Corrective Action Dialogs ...................................................................................... 35

11 TVP5154EVM Schematics ........................................................................................... 37

2

C System Test................................................................................................. 14

SLEU069A – February 2006 – Revised July 2006 Table of Contents 3

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List of Figures

1 TVP5154EVM Block Diagram .............................................................................................. 7

2 Anti-Aliasing Filter Selection ................................................................................................ 8

3 TVP5154EVM System-Level Block Diagram ............................................................................. 9

4 WinVCC – I

5 Real-Time Polling Dialog .................................................................................................. 12

6 Decoder I

7 WinVCC – Main Screen ................................................................................................... 12

8 WinVCC – System Initialization .......................................................................................... 13

9 WinVCC Multiple Occurrences Error Message ......................................................................... 13

10 WinVCC I
11 I

2

C System Failure ......................................................................................................... 15

12 Real-Time Polling Dialog .................................................................................................. 16

13 WinVCC – Main Screen ................................................................................................... 16

14 Decoder I

15 System Initialization ........................................................................................................ 18

16 TVP5154 Register Map Editor ............................................................................................ 20

17 7311 Encoder Module Register Map Editor ............................................................................ 21

18 Generic I

19 Memory Map Editor ........................................................................................................ 22

20 TVP5154 Property Sheets ................................................................................................ 24

21 DM642 Control Window ................................................................................................... 26

22 I

2

C System Failure Dialog Box ........................................................................................... 35

23 Corrective Action Dialog Box ............................................................................................. 35

24 Corrective Action Required ............................................................................................... 36

25 Corrective Action Required ............................................................................................... 36

26 I

2

C Error ..................................................................................................................... 37

2

C Configuration Screen .................................................................................... 11

2

C Write and Read Enable .................................................................................... 12

2

C Address Configuration ..................................................................................... 14

2

C Write and Read Enable .................................................................................... 17

2

C Register Map Editor ......................................................................................... 22

4 List of Figures SLEU069A – February 2006 – Revised July 2006

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List of Tables

1 I

2 Power-Down-Mode Selection Jumper (PDN, JP11) .................................................................... 7

3 Main Menu Summary ...................................................................................................... 16

4 TVP5154 Register Map Editor Controls ................................................................................. 21

5 Memory Map Editor Controls ............................................................................................. 23

6 Use of Property Sheet Controls .......................................................................................... 25

7 Property Sheet Button Controls .......................................................................................... 25

8 DM642 Control Window Controls ........................................................................................ 27

9 DM642 Virtual I

10 Decoder 1 Register ........................................................................................................ 28

11 Decoder 2 Register ........................................................................................................ 29

12 Decoder 3 Register ........................................................................................................ 30

13 Decoder 4 Register ........................................................................................................ 30

14 Decoder 1 Input Format Register ........................................................................................ 31

15 Decoder 2 Input Format Register ........................................................................................ 31

16 Decoder 3 Input Format Register ........................................................................................ 32

17 Decoder 4 Input Format Register ........................................................................................ 32

18 LED Control Register ...................................................................................................... 32

19 Flash Major Version Register ............................................................................................. 32

20 Flash Minor Version Register ............................................................................................. 32

21 TVP5154EVM Troubleshooting........................................................................................... 33

2

C Address Selection Jumpers (I2CSEL1, JP9 and I2CSEL2, JP10) ................................................ 7

2

C Register Map ......................................................................................... 27

SLEU069A – February 2006 – Revised July 2006 List of Tables 5

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1 Functional Description

The TVP5154EVM evaluation module is a printed circuit board designed for evaluation of the TVP5154
quad video decoder. The board includes the TMS320DM642 digital signal processor (DSP) and is
designed with a 120-pin connector, which allows a connection to multiple backends; the evaluation module
(EVM) is shipped with a professional encoder module. The board is designed to provide ease of use, while
allowing full evaluation of the video decoder.

1.1 Description Overview

The TVP5154EVM uses the PC parallel port to emulate the I2C bus, which provides communication with
the TVP5154 video decoder, DM642, and the video encoder. The Windows™ Video Control Center
(WinVCC) application software that communicates with the devices via the I2C is provided on the EVM
CD-ROM.

The analog video inputs supported by the TVP5154EVM include composite video and S-video. More detail
about the video inputs is discussed in section 2.3 Video Input Description. In general, the video decoder
converts the analog video input signal into digital component data. This data and the associated clocks
from the video decoder are sent to the DM642, which provides various image capture and display modes.
The DM642 is setup in I2C slave mode and is controlled through virtual I2C registers. The video encoder
then converts the digital data from the DM642 back into analog video. The analog video outputs supported
by the EVM include composite video, S-video, and component video. These are all output simultaneously.

To experiment with the programmable features of the TVP5154 video decoder and the video encoder, the
parallel port of the TVP5154 is connected to the parallel port of a PC. WinVCC, a Windows-compatible
application provides the user interface for performing register-level and high-level control of the TVP5154
video decoder and the video encoder.

User's Guide

SLEU069A – February 2006 – Revised July 2006

TVP5154EVM User's Guide

Code Composer Studio is a trademark of Texas Intruments.
All other trademarks are the property of their respective owners.

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2 Board Level Description

Board Level Description

The TVP5154EVM consists of the TVP5154EVM module and the encoder EVM module. A 4-row 120-pin
connector connects the boards. The block diagram of the EVM set is shown in Figure 1 .

2.1 Test Points and Jumpers

The TVP5154EVM was designed with test points and jumpers to help in evaluation and troubleshooting.
Each jumper is set by default in its preferred state for the TVP5154EVM. There are test points for SCL,
SDA, 3.3 V, and 1.8 V. All digital video data for each decoder core are brought out to a dual-row header,
which allows easy hookup to test equipment. The I2C address selection is made with two shunt jumpers,
which are only read after a reset or at power up. The default address is 0xB8. If the address needs to be
changed, the TVP5154 must receive a reset.

Figure 1. TVP5154EVM Block Diagram

Table 1. I2C Address Selection Jumpers

(I2CSEL1, JP9 and I2CSEL2, JP10)

JP9 JP10 I2C ADDRESS

2-3 2-3 0xB8
1-2 2-3 0xBA
2-3 1-2 0xBC
1-0 1-2 0xBE

Table 2. Power-Down-Mode Selection Jumper

(PDN, JP11)

PWDN

1-2 Normal operation
2-3 Power down

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Board Level Description

Note: If the I2C address is changed on either the TVP5154 board or the encoder board while the

2.2 Common Board Interface

The TVP5154EVM uses a 4-row 120-pin connector to share common signals and the 5-V power supply
between the boards. This connection allows multiple backends to be connected to the TVP5154EVM. The
EVM package is shipped with an encoder module. This connector shares all digital video bits (Y[7:0]), all
video clocks (VS, HS, GLCO/FID, and DATACLK), 5 V, ground, I2C bus (SCL and SDA), and reset.

2.3 Video Input Description

The TVP5154EVM decoder has an analog input channel that accepts two video inputs for each decoder
core. The decoder supports a maximum input voltage range of 0.75 V, therefore, an attenuation of
one-half is needed for most input signals with a peak-to-peak variation of 1.5 V. The parallel termination
before the input to the device is 75 Ω . The two analog inputs can be connected as either two selectable
composite video inputs, or one S-video input.

The TVP5154EVM allows the user to have up to two composite inputs or one S-video input for each of the
four-channels. The EVM software sets up and controls this input selection. The S-video input uses two
connectors, one for the luma channel and one for the chroma channel.

The EVM has a resistor network on each of the inputs. These networks attenuate the signal and allow a
75- Ω resistor to ground to be placed after the anti-alias filter for termination.

Each input has an anti-alias filter that can be in-circuit or bypassed by jumpers (JP1–JP8). To select the
filter, the shunts need to be positioned to short positions 1-3 and 2-4. To bypass the filter, the shunts need
to be moved to short positions 1-2 and 3-4 as shown in Figure 2 . The boards are shipped with the filter
bypassed.

TVP5154EVM is powered up, that device will not recognize the new I2C address. The reset
button on the TVP5154EVM must be pressed and WinVCC must be reconfigured for the new
I2C address.

Figure 2. Anti-Aliasing Filter Selection

2.4 Video Output Description

The 8-bit digital video outputs of the TVP5154 are routed to the four 32-pin headers (H2–H5), the DM642,
and finally to the 120-pin edge connector along with all video clocks on the TVP5154 module. The
encoder module connects to the 120-pin connector, and is capable of receiving digital video with or
without embedded syncs. The analog outputs of the encoder module are composite, S-video, and
component. For the user’s convenience, all of these outputs come out of the encoder module
simultaneously.

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3 System-Level Description

A system-level block diagram incorporating the TVP5154 is shown in Figure 3 . Typical
commercially-available test equipment is also shown. The primary features of this configuration are:

• Power is provided by a single 5-V power supply provided with the EVM and is shared between both

• Supported analog inputs include composite video and S-video.

• Re-encoded composite video and S-video are output via the encoder module.

• Component (YPbPr) video is output via the encoder module.

• I2C bus initializes the video devices via a PC parallel port.

• The TVP5154 video decoder performance parameters may be measured with a video analyzer.

System-Level Description

modules via the 120-pin connector.

4 Required Hardware and Equipment

The required hardware and equipment necessary to use the TVP5154EVM are:

• TVP5154EVM (provided)

• Universal 5-V power supply (provided)

• Parallel cable (provided)

• Windows-based PC with CD-ROM drive and Win95™ or later

• Composite or S-video cables for inputs

• Composite, S-video, or component cable for output

• Video sources (security camera, pattern generator, Quantum generator, DVD player, etc.)

• Display monitor that supports composite, S-video, or component video input

5 Hardware Setup

Figure 1 shows the TVP5154EVM layout and indicates the location of the power supply and the

appropriate connectors. All connectors are labeled according to their function. To prepare the EVM for
evaluation, connect the following:

1. TVP5154 module to encoder module

2. Parallel port cable from TVP5154EVM to the PC

3. Analog video sources to TVP5154EVM inputs

4. Analog video out from TVP5154EVM to monitor

5. 5-V power supply to the dc jack on the TVP5154 board. A green LED on each board should now be lit.

Figure 3. TVP5154EVM System-Level Block Diagram

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Software Installation

6 Software Installation

The system comes with the anti-alias filters bypassed. To connect the filters, you must rotate the
appropriate jumpers (JP1–JP8) as described in section 2.3.

The I2C slave address can be selected with jumpers JP9 and JP10. There are four possible addresses:
B8, BA, BC, and BE. The default setting for these jumpers is for the shunt to short pins 2-3, which selects
0xB8. These are connected to pins 117 and 118, which are read at power up. If you move both the
jumpers to positions 1-2 and reset the board, the video decoder now responds to I2C slave address 0xBE.
If you choose to change the address, you must exit, restart WinVCC, and configure the software to use
the new I2C slave address.

WinVCC is a Windows application that uses the PC parallel port to emulate I2C, providing access to each
device on the I2C bus. WinVCC makes use of CMD files, a text editable file that allows preset video
setups to be programmed easily.

This feature allows the user to easily set multiple I2C registers with the press of a button. WinVCC also
has property sheets for the TVP5154, which allows the user to control the I2C registers with a GUI.

All necessary software for the TVP5154EVM is provided on the enclosed CD. Perform the following steps
to install WinVCC:

1. Explore the provided TVP5154EVM Software CD.

2. Install Port95NT.exe. This is the parallel port driver used by WinVCC. This driver must be installed and

the PC must be rebooted before WinVCC operates correctly. This does not affect normal parallel port
operation.

3. Install Setup.exe. Click Next at all prompts and click Finish to complete the installation process. This

installs WinVCC onto the PC. No reboot is required.

4. Run WinVCC.exe.

Note: A shortcut to WinVCC should now be available on the desktop. WinVCC and additional

7 WinVCC Quick Start

Perform the following steps in order to see a video output from the TVP5154EVM.

1. Once WinVCC is executed, the WinVCC Configuration screen appears, as shown in Figure 4 . This

dialog box configures the I2C bus. Next to VID_DEC, select the TVP5154 and ensure the I2C address
is set to 0xB8 (default setting on EVM.) This must match the I2C ADDR jumper on the TVP5154 board.

2. Next to VID_ENC, select the 7311 Encoder and ensure the I2C address is set to 0x54 (default setting

on EVM.) This must match the I2C ADDR jumper on the encoder board.

Note: If WinVCC is running and the TVP5154 or encoder board I2C address is changed, power

TVP5154-related documentation can also be found at Start → Programs → TVP5154EVM
Software.

must be cycled on the EVM.

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WinVCC Quick Start

Figure 4. WinVCC – I2C Configuration Screen

3. Ensure that all other boxes are selected as “Not Used” and that all program options buttons are set to

ENABLE. Click OK.

4. If there are no I2C communication issues, the Real-Time Polling dialog window displays next as shown

in Figure 5 . If there are I2C issues, an I2C Test Report box displays. Completely exit out of WinVCC,
double-check the parallel port cable connections, I2C address settings, cycle power on the
TVP5154EVM, and re-run WinVCC.

5. When using the TVP5154 EVM with a composite output from the 7311 encoder, it is required to disable

auto-switch polling in the Real-Time Polling dialog box by clicking on the ENABLED button. Click OK
and then the Main Control Window is seen, as shown in Figure 7 .

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WinVCC Quick Start

6. The TVP5154 I2C Write Enable(s) and Read Enable pop-up window is displayed as shown in Figure 6 .

Figure 5. Real-Time Polling Dialog

This is used to select which decoder or decoders (any combination of all four) will receive I2C Write
commands, and which decoder (only one) will receive I2C Read commands. Decoder 1 is Enabled by
default; enable the other three decoders by clicking on each decoder’s enable button.

Figure 6. Decoder I2C Write and Read Enable

7. Load the provided Initialization command (CMD) file into WinVCC by clicking on Tools → System

Initialization → Browse. The default directory is C:\Program Files\Texas
Instruments\TVP5154EVM\Initialization.

Figure 7. WinVCC – Main Screen

8. In the System Initialization Window (see Figure 8 ), click the “TVP5154 ROM – Initialize for NTSC...” or

“TVP5154 ROM – Initialize for PAL...” dataset in the window and then click the PROGRAM Device(s)
Using Selected Dataset button to initialize the TVP5154EVM.

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Figure 8. WinVCC – System Initialization

WinVCC in Depth

9. With video sources provided at the BNC connectors and the EVM output connected to a monitor, video

from the source connected to CH1 should be viewable on the display monitor.

10. The other datasets in the command file are provided to demonstrate examples of 5154 scaling

performance. Refer to the TVP5154 data sheet (SLES163) or Scaler application report for more details
on programming the TVP5154 scaler. The DM642 settings can be controlled by using the DM642
Control Window, which is found by clicking on Tools → DM642 Control. Refer to Chapter 9 for details on
programming the DM642 through this window or through the Generic I2C registers.

8 WinVCC in Depth

The following sections describe how to use Windows™ Video Control Center (WinVCC) in depth. It
discusses various features and screens that the user may encounter while evaluating the TVP5154EVM.

8.1 Starting WinVCC

The Port95NT parallel port driver must be installed before using WinVCC. WinVCC may be started by
clicking on Start → All Programs → TVP5154EVM Software → WinVCC.

If the dialog box shown in Figure 9 is displayed, it means one of two things:

• WinVCC did not run to completion the last time it ran. In this case, click OK to exit the program and

restart WinVCC.

• There is more than one instance of WinVCC running at the same time. In this case, click OK to exit the

program. Then, press CTRL-ALT-DELETE to bring up the Task Manager. Select and click End Task
on all occurrences of WinVCC or WinVCC CONFIGURATION. Then restart WinVCC.

Figure 9. WinVCC Multiple Occurrences Error Message

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WinVCC in Depth

8.2 WinVCC Configuration Dialog Box

The WinVCC Configuration dialog box (see Figure 10 ) should now be visible. This dialog box configures
the I2C bus on the TVP5154EVM. All settings from this dialog box are stored in the Windows registry and
are restored the next time the program is started. After initial installation, VID_DEC is set to TVP5154 and
VID_ENC is set to 7311 Encoder.

The I2C slave address for each device must match the I2C slave address selected by jumpers on the
TVP5154EVM. These jumpers are set by the factory to use 0xB8 for the TVP5154 and 0x54 for the
Encoder. It is also important to select the correct Specific Device type for the video decoder. TVP5154 and
7311 Encoder must be selected for this EVM.

All Program Options must be enabled. Disabling these options is only required if debugging a problem
with the I2C bus.

Clicking OK begins I2C communication with the selected devices.

Figure 10. WinVCC I2C Address Configuration

8.3 I2C System Test

The I2C system test of selected registers runs immediately after closing the WinVCC Configuration dialog
box with OK (unless the I2C system test program options button was disabled).

If the I2C system test passes, only a PASS message appears. If the test failed, a dialog box like the one
shown in Figure 11 appears. See Section 10, Troubleshooting, for details on how to resolve this issue.

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The I2C system test can be run at anytime by clicking Run System I2C Test in the Tools menu.

WinVCC in Depth

8.4 Real-Time Polling

Real-time polling provides polling functions that execute continuously in the background, when enabled via
the Real-Time Polling dialog. There are two polling functions. The function that applies to the TVP5154 is
VIDEO-STANDARD AUTO-SWITCH POLLING.

When the TVP5154 detects a change in the input video standard, it automatically switches to operation in
the detected standard (which includes all necessary I2C register initialization) for proper decoding of the
input video. To enable auto-switch on the TVP5154, the Set Video Standard register must be set to
auto-switch mode (Reg 0x28 = 0x00).

If the WinVCC auto-switch polling function is enabled, the detected video standard status from the
TVP5154 is polled until a change in the input video standard (or in the TVP5154 sampling mode) is
detected. When a change is detected, the video encoder is reprogrammed as needed for the detected
standard. Using this feature, the video source can change its video standard and the system displays
using the new standard, without user intervention.

When using the TVP5154 EVM with the DM642 and a composite output from the 7311 encoder, it is
required to disable auto-switch polling by clicking on the ENABLED button in the Real-Time Polling dialog
box as shown in Figure 12 .

The real-time polling dialog can also be accessed once WinVCC is up and running by clicking Real-Time
Polling in the Tools menu.

Figure 11. I2C System Failure

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WinVCC in Depth

8.5 Main Menu

Figure 12. Real-Time Polling Dialog

After closing the real-time polling dialog, the main menu is displayed as shown in Figure 13 . The menus,
which are used to operate WinVCC, are File, Edit, Tools, Window, and Help. The File menu’s only function
is Exit, which terminates the program. Table 3 summarizes the main menu contents.

Figure 13. WinVCC – Main Screen

Table 3. Main Menu Summary

MENU CONTENTS

File Exit
Edit Register Map

Tools System Initialization

Window Allows selection of the active window. Multiple windows can be open at the same time.
Help Displays program version

TVP5154
7311 Encoder Module
Generic I2C

Memory Map

TVP5154
7311 Encoder Module

Property Sheets

TVP5154
7311 Encoder Module

Real-time Polling
TV Tuner Control (FQ12xx series only)
Multiple-Byte I2C Transfers
Set I2C Bit Rate
Run System I2C Test
Run Continuous I2C Test
Read VBI FIFO
Capture Live VBI Data
DM642 Control

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8.5.1 System Initialization

WinVCC in Depth

The TVP5154 I2C Write Enable(s) and Read Enable pop-up window is displayed as shown in Figure 14 .
This is used to select which decoder or decoders (any combination of all four) will receive I2C Write
commands, and which decoder (only one) will receive I2C Read commands. Decoder 1 is Enabled by
default; enable the other three decoders by clicking on each decoder’s enable button.

Figure 14. Decoder I2C Write and Read Enable

Clicking System Initialization in the Tools menu displays the dialog box shown in Figure 15 . This dialog
box provides the means for initializing the TVP5154 decoder(s) and/or video encoder for a particular video
mode, as well as programming settings for the DM642 through the Generic I2C registers. The details of
the initialization are contained in the command file (with a CMD file extension).

The command file is loaded using the Browse … button. Once the command file is opened, a text list
displays descriptions of the individual datasets contained within the command file.

Click once on the desired dataset description to select it. Click the Program Device(s) Using Selected
Dataset button to run the selected dataset, which loads the devices via the I2C bus. When the device
initialization has completed, the status indicator reads Ready.

Note: If Ready does not display, the devices are not initialized and the I2C bus is not

communicating. See Chapter 10, Troubleshooting, for possible solutions.

Click the OK button to close the dialog box. Each time the System Initialization dialog box is closed, the
initialization file pathname and the dataset selection number are saved in the Windows registry to allow
these settings to be retained for the next time WinVCC runs.

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WinVCC in Depth

8.5.1.1 Adding a Custom Dataset

After programming the EVM via the System Initialization tool using the factory-supplied command file, you
can customize the device register settings to fit your needs. Perform the following steps to save your
custom settings:

1. Reopen the System Initialization dialog box via the Tools menu.

2. Click the Append Current Device Settings to Command File button. A dialog box requesting a

description of the new dataset appears.

3. Optionally, click the drop-down box and select one of the existing descriptions.

4. Modify the description text or type your own description.

5. Click OK. All nondefault register values from the TVP5154, DM642, and encoder are appended to the

current command file as an additional dataset.
Now, you can select your custom dataset and send it with a press of the Program … button.
By using the same procedure above with the Replace Selected Dataset with Current Device Settings

button you can overwrite an existing dataset with the current settings.

Note: If editing the command file (.CMD) using a standard editor, the file must be saved as plain

text.

Figure 15. System Initialization

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8.5.1.2 Command Files

The command file is a text file that can be generated using any common editor; however, it must be saved
as plain text. Command files are especially useful for quickly switching between the various system
configurations. These .CMD files are unrelated to the typical Windows .CMD files.

A default command file is provided on the CD. This command file contains many examples of the desired
setups. This command file is located at:

c:\Program Files\Texas Instruments\TVP5154EVM\Initialization\
A command file can contain up to 250 datasets. A dataset is a set of register settings to initialize the

TVP5154 decoder, 7311 encoder, and/or DM642 for a particular video mode. Each dataset includes a
description that is displayed in one row of the dataset descriptions list. The register settings may be
located in the command file itself and/or may be stored in separate include file(s) (with an .INC file
extension) and be included into the command file using the INCLUDE statement.

8.5.1.3 Example Command File

An example of one dataset within a command file is shown below.

BEGIN_DATASET

DATASET_NAME,”TVP5154, Auto–switch, Stable Sync, Fast-lock, 656 Out”
// Initialize video encoder using an include file
INCLUDE, EncoderNTSC656_RTC.INC
// Program TVP5154 registers
WR_REG,VID_DEC,1,0x7F,0x00 // Reset 5154 microprocessor
WR_REG,VID_DEC,1,0x03,0x0D // Enable YCbCr outputs and syncs
WR_REG,VID_DEC,1,0x15,0x81 // Enable Stable Sync mode
WR_REG,VID_DEC,1,0x02,0x80 // Enable Fast-lock mode

WinVCC in Depth

END_DATASET

Each command file may contain individual write-to-register (WR_REG) commands.

• The comment indicator is the double-slash //.

• The command file is not case sensitive and ignores all white-space characters.

• All numbers can be entered as hexadecimal (beginning with 0x) or as decimal.

• Every dataset in a command file begins with BEGIN_DATASET and ends with END_DATASET. The

maximum number of datasets is 250.

• The dataset text description is entered between double quotes using the DATASET_NAME command.

The enclosed text can be up to 128 characters in length. This text appears in the System Initialization

dialog box when the command file is opened.

• The INCLUDE command inserts the contents of an include file (with an .INC file extension) in-line in

place of the INCLUDE command. Therefore, the include file must not contain the BEGIN_DATASET,

END_DATASET, and DATASET_NAME commands.

Note: All included files must be located in the same directory as the command (CMD) file.

• The write-to-register command is written as:

WR_REG, <DeviceFamily>, <Number of data bytes (N)>, <subaddress>, <Data1>, … , <DataN>

or

WR_REG, <Literal slave address>, <Number of data bytes (N)>, <subaddress>, <Data1>, … , <DataN>

The valid device family mnemonics are:

VID_DEC for the video decoders

VID_ENC for the video encoders

THS8200 for the THS8200 device

WinVCC translates the device family mnemonic to the slave address that was selected in the WinVCC

Configuration dialog box upon program startup. This eliminates having to edit command files if the

alternate slave address must be used.

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WinVCC in Depth

If the literal slave address method is used, the slave address entered is used directly. This method is
normally used for programming the video encoder.

The slave address 0x40h is used to access the DM642.

• A delay may be inserted between commands using the WAIT command, which is written as:

WAIT,<# milliseconds>

8.5.2 Register Editing

The next section describes the five available modes of register editing: TVP5154 Register Map editor,
7311 Encoder Module Register Map editor, Generic I2C Register Map editor, TVP5154 memory map
editor, and TVP5154 Property Sheets. Each of these functions can be selected from the Edit menu.

8.5.2.1 Register Map Editor

The TVP5154 Register Map editor (see Figure 16 ) allows the display and editing of the entire used
register space of the device within a simple scrolling text box. To open this, click on Edit Register Map in
the Edit menu and click on the device type to edit. Table 4 describes how to use each of the controls in
the TVP5154 Register Map editor.

Figure 16. TVP5154 Register Map Editor

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Table 4. TVP5154 Register Map Editor Controls

CONTROL DEFINITION

Register Window Scrolling text box that displays the address and data for the I2C registers that are defined for the device
Address Edit Box

Data Edit Box Contains the data which will be written to, or was read from, the I2C subaddress.

Write Button Writes the byte in the Data Edit box to the address in the Address Edit box.

Read Button Reads the data from the address in the Address Edit box into the Data Edit box and the register window.
Read All Button Reads all defined readable registers from the device and updates the register window.
Hex Button Converts all values in the register window and address and data edit boxes to hexadecimal.
Dec Button Converts all values in the register window and address and data edit boxes to decimal.
Close Button Closes the dialog.

Loop Count

Contains the I2C subaddress that will be accessed using the Write and Read buttons. Clicking on a row selects
an address, which then appears in the address edit box.

NOTE: After clicking on a row, the Data Edit box contains the data that was in the register window. The device
has not yet been read.

The address up/down arrows are used to jump to the next/previous subaddress that is defined for the device. If
an address is not defined for the device, it can still be accessed by typing the subaddress in the Address Edit
box.

The data up/down arrows increment/decrement the data value by 1.

The I2C register is written to whether or not the data is different from the last time the register was read.

NOTE: Multiple edit register map windows can be open at the same time (one for each device). Use the
Window menu to navigate.

Causes subsequent write, read, or read all operations to be performed N times. N is entered as a decimal
number from 1 to 999.

WinVCC in Depth

8.5.2.2 Encoder Module Register Map Editor

The Encoder Module Register Map editor (see Figure 17 ) allows the display and editing of the video
encoder registers. This editor works like the TVP5154 Register Map editor.

To open this, click on Register Map in the Edit menu and click on 7311 Encoder Module.

Figure 17. 7311 Encoder Module Register Map Editor

8.5.2.3 Generic I2C Register Editor

The Generic I2C Register editor (see Figure 18 ) allows the display and editing of any device on the I2C
bus. This editor works like the TVP5154 Register Map editor, except that the I2C slave address must be
entered and the Read All button is disabled.

To open this, click on Register Map in the Edit menu and then click on Generic I2C.

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WinVCC in Depth

The DM642 I2C registers can be edited using I2C sub-address 0x40. See Section 9 for details about the
DM642 registers.

The video encoder module registers can be edited using I2C sub-address 0x54 (default) or 0x56 if the
alternate slave address is being used.

8.5.2.4 Memory Map Editor

The memory map editor (see Figure 19 ) allows the display and editing of the data memory and hardware
registers of the device, such as the scaler setting registers.

To open this, click on Memory Map in the Edit menu and click on the device type to edit. The operation of
the memory map editor controls are explained in Table 5 .

Figure 18. Generic I2C Register Map Editor

Figure 19. Memory Map Editor

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WinVCC in Depth

Table 5. Memory Map Editor Controls

CONTROL DEFINITION

Base Address Selector The hardware registers use a 10-bit address internally. The base address selector allows quick entry

Address Offset Edit Box Contains the lowest byte of the 10-bit internal address. The full 10-bit address is formed by adding

Data Edit Boxes Contains the 16-bit data word that is written to or read from the register address. The LSB data is at

Write Button Writes the (2) bytes in the data edit boxes starting at the 10-bit register address BASE+OFFSET.
Read Button Reads (2) consecutive data bytes starting at the 10-bit register address BASE+OFFSET to the data

Loop Count Edit Box Causes subsequent write or read operations to be performed N times. N is entered as a decimal

Histogram on Creates a histogram of the results from the Loop Count Reads.
Loop Count Reads

Close Button Closes the dialog.

of the base address. The list contains base addresses for the major functional blocks of the
TVP5154.

the base address to the address offset. The address up/down arrows increment/decrement the
address offset by 1.

the lowest address. The data is written/read LSB first. The data up/down arrows
increment/decrement the data value by 1.

edit boxes.

number from 1 to 999.

Note: The memory map editor can remain open with other

windows. Use the Window menu to navigate.

8.6 TVP5154 Property Sheets

The property sheets represent the register data in a user-friendly format. The data is organized by
function, with each function having its own page and being selectable via tabs at the top (see Figure 20 ).

To open this, click on Edit Property Sheets in the Edit menu and select the device type to edit.
When the property sheet function is started or whenever the user tabs to a different page, all readable

registers in the device are read from hardware to initialize the dialog pages. Values on the page are
changed by manipulating the various dialog controls as described in Table 6 .

OK, Cancel, and Apply buttons are at the bottom of each property page. These are described in Table 7 .

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WinVCC in Depth

8.6.1 Property Sheet Refresh

The property sheets are designed so that the data displayed is always current. Certain actions cause the
entire register map to be read from the device and to update the property sheets. This happens when:

• Property sheets are initially opened.

• When tabbing from one page to another.

• When Read All is clicked.

• When making the TVP5154 Property Sheets window the active window (by clicking on it).

• When making a TVP5154 Register Map editor window the active window (by clicking on it).

8.6.1.1 Auto-Update From Device

The last two items in the Property Sheet Refresh list (see section 8.6.1) are referred to as the
Auto-Update feature. Auto-Update can be disabled by setting its program option button to DISABLED.
This button is located on the initial dialog box (WinVCC Configuration).

With Auto-Update enabled (default), the user can open both the TVP5154 Property Sheets and the
TVP5154 Register Map editor at the same time. Changes made to the property sheets (and applied) are
updated in the register map window as soon as the Register Map window is clicked on. Additionally,
changes made in the TVP5154 Register Map editor are updated in the TVP5154 Property Sheets as soon
as the property sheets window is clicked on.

Figure 20. TVP5154 Property Sheets

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Programming the TMS320DM642

Table 6. Use of Property Sheet Controls

PROPERTY SHEETS DIALOG CONTROL WHAT DO I DO WITH IT?

When is Hardware Updated?

Read-Only Edit Box Read status information N/A
Check Box Toggle a single bit After Apply
Drop-Down List Select from a text list After Apply
Edit Box Type a number After Apply

Edit Box with Up/Down arrows Use up/down arrows or type a number
Slider Slide a lever Immediately

Pushbutton Initiate an action Immediately

Up/Down arrows: Immediately
Type a number: After Apply

Table 7. Property Sheet Button Controls

BUTTON

CONTROL

OK Writes to all writeable registers whose data has changed. A register is flagged as changed if the value to be

written is different from the value last read from that address.
Closes the dialog.

Cancel Causes all changes made to the property page since the last Apply to be discarded. Changes made to dialog

controls with ‘immediate hardware update’ are not discarded, since they have already been changed in
hardware.
Does not write to hardware.
Closes the dialog.

Apply Writes to all writeable registers whose data has changed. A register is flagged as changed if the value to be

written is different from the value last read from that address.

DEFINITION

9 Programming the TMS320DM642

This chapter discusses how to change settings for the TMS320DM642 on this EVM. The DM642 settings
can be controlled by using the DM642 Control Window, which is found by clicking on Tools → DM642
Control, or through the Generic I2C registers.

9.1 Development and Purpose of DM642 Code

The TVP5154EVM was developed by the TI Digital Video Department, which is responsible for the
TVP5146 and TVP5150AM1 video decoders currently used on the DM642EVM released by Spectrum
Digital. The TVP5154EVM hardware and software are both based on this DM642EVM.

The TVP5154EVM was designed specifically for security customers interested in a quad video decoder.
The TVP5154EVM showcases the TVP5154 with various scaled/unscaled display modes, while making
the DM642 transparent to the customer during evaluation. This is made possible by placing the DM642
into an I2C slave mode and controlling the capture/display modes using virtual I2C registers. The entire
TVP5154EVM is controlled by a PC emulating I2C via the parallel port. By downloading the DM642 code
from flash at power up, it is not required to use Code Composer Studio™ software to program the DM642;
all relevant DM642 control registers can be accessed and controlled through a generic I2C address.

In addition to the command file provided with this EVM, additional command files to be used with TI’s EVM
control software (WinVCC) can be provided from TI to support easy programming of the TVP5154 and
DM642 registers to show the most common scaling configurations for both NTSC and PAL formats. When
using these command files or when setting the register values through a standard I2C bus interface, it is
important to enable and program the 5154 outputs before configuring the DM642 registers. The DM642
portion of the TVP5154EVM consists only of the DM642, SDRAM, and flash memory.

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Programming the TMS320DM642

9.2 Details of the DM642 Code and Control Registers

Details of the DM642 code and control registers are:

• The DM642 device address is 0x40h by default. The DM642 is setup as an I2C slave.

• The DM642 executes code on power up from the flash using the PCI GPIO to control the address

MSB.

• Virtual I2C registers are created within the DM642 in order to control the capture and display of the

scaled/unscaled data from the TVP5154 video decoder. These registers are described in Table 9 .

• The virtual I2C registers support scaled and unscaled video outputs independently for each of the four

video decoders, with the option to overlay scaled video onto unscaled video, and to define the

quadrant location of each scaled channel.

• The virtual I2C registers provide easy control/access to the GPIOs currently tied to LEDs. Please refer

to the TVP5154EVM schematics for options to associate an LED on/off with a register setting.

• The DM642 is not responsible for any scaling. All video scaling is performed by the TVP5154. The

DM642 is only responsible for image capture and display.

• The DM642 virtual registers can be controlled by using the DM642 Control Window or through the

Generic I2C registers.

9.2.1 DM642 Control Window

The DM642 settings can be easily controlled by using the DM642 Control window. This window represents
the DM642 register data in a user-friendly format. The data is organized for each of the four decoders (see

Figure 21 ).

To open this, click on DM642 Control in the Tools menu.

Figure 21. DM642 Control Window

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Programming the TMS320DM642

When the DM642 Control window is opened, all readable registers for the device are read from software
to initialize the dialog page. Register details are given in Table 8 . Values on the page are changed by
manipulating the various dialog controls as described in Table 8 . The data is organized for each of the
four decoders, allowing independent control of each decoder.

Table 8. DM642 Control Window Controls

CONTROL DEFINITION

Read All Reads all defined readable registers from the device and updates the register window.

Causes all changes made to the page since the last Apply to be discarded. Changes made to dialog controls

Close registers.

Image Capture Enables image capture in the DM642 for that given decoder (1–4). Immediate register update.

Video Standard Apply is clicked.

Image Size is clicked.

Image Position Defines the quadrant location for the input of that given decoder (1–4). Immediate register update.

Apply

Flash
Major/Minor

LED Control Changes LED (1–7) status. Checked: LED is ON. Unchecked: LED is OFF. Immediate register update.

with ‘immediate register update’ are not discarded, since they have already been changed in the DM642
Does not write to registers.

Closes the dialog.

Used to inform the DM642 of the input color standard for that given decoder (1–4). No change in register until
Does not change the video standard setting for the TVP5154.

Used to inform the DM642 of the input image size for that given decoder (1–4). No change in register until Apply
Actual scaling is done in the TVP5154.

Immediately changes DM642 registers for input image size and input color standard for that given decoder
(1–4).
Enables TVP5154 scaler and programs correct scaling register settings into TVP5154 based on selected input
standard and image size for that given decoder (1–4).

Reads the data from the Flash Version registers and writes it into the register window.

9.2.2 DM642 Virtual I2C Register Map

REGISTER DESCRIPTION ADDRESS DATA (DEFAULT)

Decoder 1 Register 00h 02h
Decoder 2 Register 01h 12h
Decoder 3 Register 02h 22h
Decoder 4 Register 03h 32h
Decoder 1 Input Format Register 04h 01h
Decoder 2 Input Format Register 05h 01h
Decoder 3 Input Format Register 06h 01h
Decoder 4 Input Format Register 07h 01h
LED Control 08h 00h
Flash Version: Major 09h 01h
Flash Version: Minor 0Ah 00h

Table 9. DM642 Virtual I2C Register Map

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Quad 1 Quad 2

Quad 3 Quad 4

Decoder1

Scaled

Decoder2

Unscaled

Decoder2

Unscaled

Decoder4

Scaled

Programming the TMS320DM642

9.2.3 DM642 Virtual I2C Register Details

Address 00h
Default 02h

7 6 5 4 3 2 1 0

Reserved Position Capture Size

Capture Size Bit 2 Bit 1 Bit 0
Unscaled 0 0 0
QSIF – 176 × 120 0 0 1
SIF – 352 × 240 (1/4 NTSC)

(default)
QCIF – 176 × 144 0 1 1
CIF – 352 × 288 (1/4 PAL) 1 0 0
QVGA – 320 × 240 1 0 1
VGA – 640 × 480 1 1 0
Reserved 1 1 1

Table 10. Decoder 1 Register

Capture

Enable

0 1 0

Capture Enable Bit 3
Disable (default) 0
Enable 1

Position Bit 5 Bit 4
Quadrant 1 (default) 0 0
Quadrant 2 0 1
Quadrant 3 1 0

Quadrant 4 1 1

Scaled capture sizes always take priority over unscaled capture sizes.
Decoder priorities are always such that Decoder 1 is the highest priority, Decoder 2 is the second highest,

etc.
For example, if Decoders 1 and 4 are scaled to 1/4 size and Decoders 2 and 3 are unscaled, this display

results:

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Quad 1 Quad 2

Quad 3 Quad 4

Programming the TMS320DM642

Note: The unscaled Decoder 2 displays in both Quadrant 2 and 3 since Decoder 2 takes priority

over Decoder 3 when both are unscaled.

Table 11. Decoder 2 Register

Address 01h
Default 12h

7 6 5 4 3 2 1 0

Reserved Position Capture Size

Capture

Enable

Capture Size Bit 2 Bit 1 Bit 0
Unscaled 0 0 0
QSIF – 176 × 120 0 0 1
SIF – 352 × 240 (1/4 NTSC)

(default)

0 1 0

QCIF – 176 × 144 0 1 1
CIF – 352 × 288 (1/4 PAL) 1 0 0
QVGA – 320 × 240 1 0 1
VGA – 640 × 480 1 1 0
Reserved 1 1 1

Capture Enable Bit 3
Disable (default) 0
Enable 1

Position Bit 5 Bit 4
Quadrant 1 0 0
Quadrant 2 (default) 0 1
Quadrant 3 1 0

Quadrant 4 1 1

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Quad 1 Quad 2

Quad 3 Quad 4

Programming the TMS320DM642

Table 12. Decoder 3 Register

Address 01h
Default 22h

7 6 5 4 3 2 1 0

Reserved Position Capture Size

Capture

Enable

Capture Size Bit 2 Bit 1 Bit 0
Unscaled 0 0 0
QSIF – 176 × 120 0 0 1
SIF – 352 × 240 (1/4 NTSC)

(default)

0 1 0

QCIF – 176 × 144 0 1 1
CIF – 352 × 288 (1/4 PAL) 1 0 0
QVGA – 320 × 240 1 0 1
VGA – 640 × 480 1 1 0
Reserved 1 1 1

Capture Enable Bit 3
Disable (default) 0
Enable 1

Position Bit 5 Bit 4
Quadrant 1 0 0
Quadrant 2 0 1
Quadrant 3 (default) 1 0

Quadrant 4 1 1

Table 13. Decoder 4 Register

Address 01h
Default 32h

7 6 5 4 3 2 1 0

Reserved Position Capture Size

Capture

Enable

Capture Size Bit 2 Bit 1 Bit 0
Unscaled 0 0 0
QSIF – 176 × 120 0 0 1
SIF – 352 × 240 (1/4 NTSC)

(default)

0 1 0

QCIF – 176 × 144 0 1 1
CIF – 352 × 288 (1/4 PAL) 1 0 0
QVGA – 320 × 240 1 0 1
VGA – 640 × 480 1 1 0
Reserved 1 1 1

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Quad 1 Quad 2

Quad 3 Quad 4

Programming the TMS320DM642

Capture Enable Bit 3
Disable (default) 0
Enable 1

Position Bit 5 Bit 4
Quadrant 1 0 0
Quadrant 2 0 1
Quadrant 3 1 0

Quadrant 4 (default) 1 1

Table 14. Decoder 1 Input Format Register

Address 04h
Default 01h

7 6 5 4 3 2 1 0

Reserved Input Color Standard

Input Color Standard Bit 2 Bit 1 Bit 0
NTSC 0 0 0
(B, D, G, H, I, N) PAL

(default)

0 0 1

Reserved . . .

The Input Color Standard register is used to inform the DM642 of the input color standard for that given
decoder (1–4). The output format of the DM642 is set to the standard with the largest majority based on
Registers 04h–07h. If the number of input color standards is equal, the DM642 automatically default to
PAL output.

Table 15. Decoder 2 Input Format Register

Address 05h
Default 01h

7 6 5 4 3 2 1 0

Reserved Input Color Standard

Input Color Standard Bit 2 Bit 1 Bit 0
NTSC 0 0 0
(B, D, G, H, I, N) PAL

(default)

0 0 1

Reserved . . .

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Programming the TMS320DM642

Table 16. Decoder 3 Input Format Register

Address 06h
Default 01h

7 6 5 4 3 2 1 0

Reserved Input Color Standard

Input Color Standard Bit 2 Bit 1 Bit 0
NTSC 0 0 0
(B, D, G, H, I, N) PAL

(default)

0 0 1

Reserved . . .

Table 17. Decoder 4 Input Format Register

Address 07h
Default 01h

7 6 5 4 3 2 1 0

Reserved Input Color Standard

Input Color Standard Bit 2 Bit 1 Bit 0
NTSC 0 0 0
(B, D, G, H, I, N) PAL

(default)

0 0 1

Reserved . . .

Table 18. LED Control Register

Address 08h
Default 00h

7 6 5 4 3 2 1 0

Reserved LED 7 Status LED 6 Status LED 5 Status LED 4 Status LED 3 Status LED 2 Status LED 1 Status

LED (1–7) Status

= 0 (LED off)
= 1 (LED on)

Table 19. Flash Major Version Register

Address 09h
Default 01h

7 6 5 4 3 2 1 0

Flash Major Version

Table 20. Flash Minor Version Register

Address 0Ah
Default 00h

7 6 5 4 3 2 1 0

Flash Minor Version

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10 Troubleshooting

This chapter discusses ways to troubleshoot the TVP5154EVM.

10.1 Troubleshooting Guide

If you are experiencing problems with the TVP5154EVM hardware or the WinVCC software, see Table 21
for available solutions.

At startup, the error message Cannot find The parallel port driver supplied with the Run Port95NT.EXE on the CD to install
DLL file DLPORTIO.DLL appears. EVM has not been installed. the driver.

Blank screen Source is connected to the wrong input Connect source to the correct input

No color

Screen colors are only magenta and
green.

Video standard auto-switch does not work
on the video decoder side.

Video standard auto-switch does not work
on the video encoder side.

Table 21. TVP5154EVM Troubleshooting

SYMPTOM CAUSE SOLUTION

Go to Edit → Property Sheets → TVP5154,

Wrong video input is selected. video input(s) and click Apply.

connector. connector.

YCbCr outputs or clock output is disabled.

Wrong mode is selected for color
subcarrier genlock output.

GLCO pin is not set to output the GLCO Output Control page, set the drop down
signal. box labeled FID/GLCO (pin 23) to genlock

Wrong YCbCr output format output format to 8-bit 4:2:2 YCbCr

Auto-switch masks are not set correctly.

Video decoder is not in auto-switch mode. Mode Selection page, set the drop-down

Auto-switch polling is not enabled. Click Enable All and OK. This should be

Analog Video page, select the correct
(The composite video input 1 is selected

by default.)

Go to Edit → Property Sheets → TVP5154,
Output Control page, check the enable
YCbCr outputs and enable clock outputs
check boxes and click Apply.

Go to Edit → Property Sheets → TVP5154,
Synchronization page, set the Fsc control
format to RTC and click Apply.

Go to Edit → Property Sheets → TVP5154,

output (GLCO) and click Apply.
Go to Edit → Property Sheets → TVP5154,

Output Control page, set the YCbCr
w/ITU-R BT.656 embedded sync mode

and click Apply.
Go to Edit → Property Sheets → TVP5154,

Mode Selection page, uncheck all
standards to be included in auto-switch
processing and click Apply.

Go to Edit → Property Sheets → TVP5154,
box to multistandard and click Apply.

Click real-time polling in the Tools menu.
disabled if using a composite output.

Troubleshooting

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Troubleshooting

Table 21. TVP5154EVM Troubleshooting (continued)

SYMPTOM CAUSE SOLUTION

Decoder I2C slave address is wrong. the TVP5154 decoder module are across

Encoder I2C slave address is wrong.

Parallel cable is not connected from PC
parallel port to the TVP5154 decoder Connect cable
module DB25 connector.

EVM is not powered on.

Wrong type of parallel cable. straight through pin for pin. Use the cable

No I2C communication supplied with the EVM.

Device was placed in power-down mode.
EVM was configured for an external I2C Reinstall 0- Ω resistors R5 and R6. Control

master. EVM using the PC parallel port.

PC parallel port mode is not set correctly.

Still no I2C communication

Make sure I2C slave address jumpers on
pins 2 and 3.

Slave address is hard coded to be 0x54 in
the command file. Make sure the I2C slave
address jumper on encoder module is
across pins 2 and 3.

Power supply must be plugged into a
100-V to 240-V/47-Hz to 63-Hz power
source, and the cord must be plugged into
the power connector on the EVM.

Some parallel cables are not wired

Press the Reset button on the TVP5154
Decoder Module.

DO THIS AS A LAST RESORT. Reboot
PC, enter BIOS setup program, and set
parallel port LPT1 mode (Addr 378h) to
ECP mode or bidirectional mode
(sometimes called PS/2 mode or byte
mode). If already set to one of these two
modes, switch to the other setting (see

Section 10.2 ).

PC may not be capable of operating in the
required parallel port mode. This is true of
some laptop computers. Use a different
computer, preferably a desktop PC.

When WinVCC is started and the WinVCC Configuration dialog box is closed with OK, the I2C system test
is performed (unless the I2C System Test program options button was disabled).

If the I2C system test fails, a dialog box (see Figure 22 ) appears. This example reports that a read from
TVP5154 failed, using slave address 0xB8, sub-address 0xD0. The data read was 0x78. The expected
data was 0x00.

After noting which device had a problem, click OK to continue. Next, the Corrective Action Dialog box
appears to fix the problem.

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Troubleshooting

10.2 Corrective Action Dialogs

After closing the I2C system test report dialog box, a dialog box (see Figure 23 ) appears.

1. If the parallel port cable is NOT connected between to PC and the TVP5154EVM, or if the EVM power

is not on:

Figure 22. I2C System Failure Dialog Box

Figure 23. Corrective Action Dialog Box

a. Click NO.
b. The dialog box shown in Figure 23 appears instructing you to correct the problem.
c. Correct the problem.
d. Click OK to continue. The Real-Time Polling dialog appears.

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Troubleshooting

Figure 24. Corrective Action Required

2. If the cable is connected from the PC parallel port to the TVP5154EVM and the EVM power is on:

a. Click Yes.
b. The dialog box shown in Figure 24 appears. This dialog box appears if the PC parallel

port mode setting may need to be changed.

Note: Only run the PC BIOS setup program if the I2C communication problem cannot be

resolved in another way (correct slave address settings, reset or power cycle the
EVM, and/or check that the device type selected was TVP5154).

c. Click OK to continue.
d. The real-time polling dialog appears. Click OK to close it and get to the main menu.
e. Click Exit in the File menu to exit the program.
f. See the troubleshooting guide in Table 21 .

Figure 25. Corrective Action Required

10.2.1 Setting the PC Parallel Port Mode

Note: Only run the PC BIOS setup program if the I2C communication problem cannot be

resolved in another way (correct slave address settings, reset or power cycle the EVM,
and/or check that the device type selected was TVP5154).

1. Restart the PC.

2. During the boot process, enter the BIOS setup program by pressing the required key (usually the initial

text screen indicates which key to press).

3. Find the place where the parallel port settings are made.

4. Set the parallel port LPT1 at address 378h to ECP mode or bidirectional mode (sometimes called PS/2

mode or byte mode). If one of these two modes is already selected, change to the opposite mode.

5. Exit and save changes.

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10.2.2 General I2C Error Report

The I2C Error Report shown in Figure 26 appears when an I2C error occurs at any time other than after
the I2C system test. In this example, there is acknowledge error at slave address 0x54 (the video encoder
module). The error occurred on Read Cycle Phase 1 on the device (slave) address byte.

11 TVP5154EVM Schematics

TVP5154EVM Schematics

Figure 26. I2C Error

SLEU069A – February 2006 – Revised July 2006 TVP5154EVM User's Guide 37

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54321

6

D

D

TVP5154EVMDVB R EV 1.2

I2C
page 17 - I2C

SDA
SCL

Anti-Aliasing Filters

C

B

page 11 - Anti-Aliasing Filters

1A_IN
1B_IN

2A_IN
2B_IN

3A_IN
3B_IN

4A_IN
4B_IN

1A_OUT
1B_OUT

2A_OUT
2B_OUT

3A_OUT
3B_OUT

4A_OUT
4B_OUT

TVP5154
page 2 - TVP5154

1A_IN
1B_IN

2A_IN
2B_IN

3A_IN
3B_IN

4A_IN
4B_IN

1A_OUT
1B_OUT

2A_OUT
2B_OUT

3A_OUT
3B_OUT

4A_OUT
4B_OUT

/RESET

CH1_OUT[7..0]

SCKS1

SCK1

FID1

CH2_OUT[7..0]

SCKS2

SCK2

FID2

CH3_OUT[7..0]

SCKS3

SCK3

FID3

CH4_OUT[7..0]

SCKS4

SCK4

FID4

SCL
SDA

HS1
VS1
AV1

VB1

HS2
VS2
AV2

VB2

HS3
VS3
AV3

VB3

HS4
VS4
AV4

VB4

DM642
page 4 - DM642

/RESET
SCL
SDA

CH1_OUT[7..0]
SCKS1

AV1

CH2_OUT[7..0]
SCKS2

AV2

CH3_OUT[7..0]
SCKS3

AV3

CH4_OUT[7..0]
SCKS4

AV4

GP13_A19

GP15_A21

GP14_A20

TCE1#

Power
page 7 - Power

/RESET

TED[63..0]

TSDRAS#

TEA[22..3]

TECLKOUT1

TSDWE#

TSDCAS#

TSDCKE

ENC_Y[7..0]
ENC_C[7..0]

DSP_TRST#

DSP_EMU[11..0]

TCE0#

TBE5#

TBE6#

TBE7#

ENC_SCLK

ENC_HS
ENC_VS

ENC_FID

DSP_TDO

DSP_TDI

DSP_TMS

DSP_TCLK

TBE3#

TBE4#

Connector
page 16 - Connector

SDA
SCL
/RESET

ENC_Y[7..0]
ENC_C[7..0]

ENC_SCLK
ENC_HS
ENC_VS
ENC_FID

JTAG
page 15 - JTAG

DSP_TDO
DSP_TDI
DSP_TMS
DSP_TCLK
DSP_TRST#
DSP_EMU[11..0]

TBE0#

TBE2#

TBE1#

C

B

SCL

SDA

/RESET

F&V Bit Breakout
page 12 - F&V Bit Breakout

Daughtercard Interface
page 3 - Daughtercard Interface

HS1

VS1

SCK1

SCKS1

CH1_OUT[7..0]

A

1 2 3 4 5 6

HS2

AV1

FID1

AV2

SCK2

SCKS2

CH2_OUT[7..0]

VS2

VB1

HS3

VS3

VB2

FID2

CH3_OUT[7..0]

SCKS3

SCK3

AV3

HS4

VS4

VB3

FID3

VB4

AV4

FID4

SCK4

SCKS4

CH4_OUT[7..0]

SCK4

CH4_OUT[7..0]

Flash Memory
page 14 - Flash Memory

/RESET

SDRAM
page 13 - SDRAM

TCE1#

TSDWE#

TSDCAS#

GP13_A19

GP15_A21

GP14_A20

TED[31..0]

TEA[22..3]

TED[63..0]

TEA[22..3]

TSDRAS#

TECLKOUT1

TCE0#

TBE7#

TSDCKE

TSDWE#

TSDCAS#

TBE0#

TBE2#

TBE1#

TBE3#

TBE4#

TBE5#

TBE6#

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

TVP5154EVM BLOCK DIAGRAM

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

1 of 17

A

54321

6

D

DM642 Clocks and Reset
page 6 - DM642 Clocks and R eset

/RESET
SCL
SDA

C

B

CH1_OUT[7..0]
SCKS1
AV1

CH2_OUT[7..0]
SCKS2
AV2

CH3_OUT[7..0]
SCKS3
AV3

CH4_OUT[7..0]
SCKS4
AV4

TED[63..0]
TEA[22..3]

TECLKOUT1
TSDCKE
TSDRAS#
TSDCAS#
TSDWE#
TCE0#
TCE1#
TBE7#
TBE6#
TBE5#
TBE4#
TBE3#
TBE2#
TBE1#
TBE0#

DSP_EMU[11..0]
DSP_TDI
DSP_TDO
DSP_TMS
DSP_TCLK
DSP_TRST#

GP13_A19
GP14_A20
GP15_A21

/RESET
SCL
SDA

DM642 Video Ports
page 5 - DM642 Video Ports

CH1_OUT[7..0]
SCKS1
AV1

CH2_OUT[7..0]
SCKS2
AV2

CH3_OUT[7..0]
SCKS3
AV3

CH4_OUT[7..0]
SCKS4
AV4

DM642 EMIF and JTAG
page 10 - DM642 EMIF and JTAG

TED[63..0]
TEA[22..3]

TECLKOUT1
TSDCKE
TSDRAS#
TSDCAS#
TSDWE#
TCE0#
TCE1#
TBE7#
TBE6#
TBE5#
TBE4#
TBE3#
TBE2#
TBE1#
TBE0#

DSP_EMU[11..0]
DSP_TDI
DSP_TDO
DSP_TMS
DSP_TCLK
DSP_TRST#

DM642 PCI_HPI_EM AC
page 8 - DM642 PCI_HPI_EMAC

GP13_A19
GP15_A21
GP14_A20

ENC_Y[7..0]
ENC_C[7..0]

ENC_SCLK

ENC_HS
ENC_VS

ENC_FID

DM642 Power Pins
page 9 - DM642 Power Pins

ENC_Y[7..0]
ENC_C[7..0]

ENC_SCLK
ENC_HS
ENC_VS
ENC_FID

D

C

B

TEXAS INSTRUMENTS, INC.

A

12500 TI BLVD
DALLAS, TEXAS 75243

A

DM642 BLOCK DIAGRAM

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

4 of 17

1 2 3 4 5 6

54321

6

D

D

U25B

RPACK4-33

1

SCKS1

2

SCKS2

3

AV1

4 5

AV2

C

D3.3V

L1

SCKS3
SCKS4
AV3
AV4

RN25

RPACK4-33

1
2
3
4 5

RN26

BLM21P221SN

C1

0.1uF

1000pF

Y1

C2

1
2

27MHz_MIH_MMD

EN
GND

4

VCC
OUT

R1 33

3

ENC_SCLK

ENC_HS
ENC_VS

ENC_FID

RPACK4-33

1
2
3
4 5

RN27

B

AF14
8
7
6

8
7
6

8
7
6

VP0_CLK0

AF12

VP0_CLK1

AE17

VP0_CTL0

AC17

VP0_CTL1

AD17

VP0_CTL2

Video Port 0 / McBSP0 / McASP Control

AF8

VP1_CLK0

AF10

VP1_CLK1

AF4

VP1_CTL0

AE5

VP1_CTL1

AD5

VP1_CTL2

Video Port 1 / McBSP1 / McASP Data

A7

VP2_CLK0

A13

VP2_CLK1

B8

VP2_CTL0

D7

VP2_CTL1

C7

VP2_CTL2

CLKX0/VP0_D02

FSX0/VP0_D03

DX0/VP0_D04

CLKS0/VP0_D05

DR0/VP0_D06

FSR0/VP0_D07

CLKR0/VP0_D08

ACLKR0/VP0_D12

AFSR0/VP0_D13
AHCLKR0/VP0_D 14
AMUTEIN/VP0_D15

AMUTE/VP0_D16

ACLKX0/VP0_D17

AFSX0/VP0_D18
AHCLKX0/VP0_D19

CLKX1/VP1_D02

FSX1/VP1_D03

DX1/VP1_D04

CLKS1/VP1_D05

DR1/VP1_D06

FSR1/VP1_D07

CLKR1/VP1_D08

AXR0/VP1_D12
AXR1/VP1_D13
AXR2/VP1_D14
AXR3/VP1_D15
AXR4/VP1_D16
AXR5/VP1_D17
AXR6/VP1_D18
AXR7/VP1_D19

Video Port 2

TP1
TP

TP

1

AC1

TMX320DM642CGDK

STCLK

VIC

VDAC / GP08

VP0_D00
VP0_D01

VP0_D09
VP0_D10
VP0_D11

VP1_D00
VP1_D01

VP1_D09
VP1_D10
VP1_D11

VP2_D00
VP2_D01
VP2_D02
VP2_D03
VP2_D04
VP2_D05
VP2_D06
VP2_D07
VP2_D08
VP2_D09
VP2_D10
VP2_D11
VP2_D12
VP2_D13
VP2_D14
VP2_D15
VP2_D16
VP2_D17
VP2_D18
VP2_D19

AF18
AE18
AF17
AF16
AE16
AD16
AC16
AB16
AE15
AD15
AC15
AB15
AD14
AC14
AB14
AD13
AC13
AB13
AD12
AC12

AF5
AF6
AE6
AD6
AC6
AE7
AD7
AC7
AD8
AC8
AE9
AD9
AC9
AD10
AC10
AE11
AD11
AC11
AB11
AB12

C8
D8
A9
B9
C9
D9
A10
B10
C10
D10
A11
B11
C11
D11
E11
B12
C12
D12
E12
E13

AD1

CH1_OUT0
CH1_OUT1
CH1_OUT2
CH1_OUT3
CH1_OUT4
CH1_OUT5
CH1_OUT6
CH1_OUT7

CH2_OUT0
CH2_OUT1
CH2_OUT2
CH2_OUT3
CH2_OUT4
CH2_OUT5
CH2_OUT6
CH2_OUT7

CH3_OUT0
CH3_OUT1
CH3_OUT2
CH3_OUT3
CH3_OUT4
CH3_OUT5
CH3_OUT6
CH3_OUT7

CH4_OUT0
CH4_OUT1
CH4_OUT2
CH4_OUT3
CH4_OUT4
CH4_OUT5
CH4_OUT6
CH4_OUT7

ENC_Y0
ENC_Y1
ENC_Y2
ENC_Y3
ENC_Y4
ENC_Y5
ENC_Y6
ENC_Y7

ENC_C0
ENC_C1
ENC_C2
ENC_C3
ENC_C4
ENC_C5
ENC_C6
ENC_C7

CH1_OUT[7..0]

CH2_OUT[7..0]

CH3_OUT[7..0]

CH4_OUT[7..0]

ENC_Y[7..0]

ENC_C[7..0]

D3.3V

R6
NO POP

R29
1k

CH1_OUT[7..0]

CH2_OUT[7..0]

CH3_OUT[7..0]

CH4_OUT[7..0]

ENC_Y[7..0]

ENC_C[7..0]

TP2
TP

TP

1

PCI FREQ CONFIGURATION

R6/R27

0
1

MODE SELECTED
66MHz (DEFAULT)
33MHz

C

B

TEXAS INSTRUMENTS, INC.

A

12500 TI BLVD
DALLAS, TEXAS 75243

A

DM642 VIDEO PORT

Size FCSM No. DWG No. Rev
C 1

1 2 3 4 5 6

Scale Sheet

5 of 17

54321

6

D3.3V

L2

R9
NO POP

R40
10k

BLM21P221SN

L3

BLM21P221SN

R10
NO POP

R11
NO POP

C4

0.1uF

C3

0.1uF

1000pF

1

6

3

C167

C166
1000pF

X1/ICLK

S17CLK
S0

GND

U3 ICS512

D

D3.3V

C

D3.3V

VDD

Y2

1

EN

2

GND

50.00MHz

D3.3V

Y3

1

EN

2

GND

25.00MHz

8

X2

5
4

REF

2

R7
NO POP

R30
1k

D3.3V

VCC
OUT

VCC
OUT

R2 33

C6

0.1uF

4
3

R39
10k

R8
NO POP

4
3

TP10
TP

TP

1

R61

C168
NO POP

R3

33

DSP_ECLKIN

33

R12

NO POP

TP3
TP

TP

1

/RESET

D3.3V

DSP_CLKIN
DSP_ECLKIN

PCI_EEAI
GP04

GP05
GP06
GP07

D3.3V

4 5

R31
1k

R13 NO POP

EXCCET103U
E1

I1O

GND

2

678

RN1
RPACK4-10k

123

DSP_PLL_VDD

3

C169

+

10uF

U25E

AC2
H25
AA2

AE4

M5
L5

F4
F3
F2

E1
B4

P4

V6

AB3
AA3

E14

AF3

TMX320DM642CGDK

DSP_PLL_VDD

C5

0.1uF

CLKIN
ECLKIN
CLKMODE0

CLKMODE1
GP00 / DM641SEL

GP03 / PCIEEAI
EXTINT4 / GP04

EXTINT5 / GP05
EXTINT6 / GP06
EXTINT7 / GP07

NMI
RESET

PLL_VDD

Clocks / Interrupts / Timers / IIC

CLKINF
AMUX1

RESERVED

TSTSTRB
PLL_LD

GP01 / CLKOUT4
GP02 / CLKOUT6

TINP0

EMACEN / TOUT0

TINP1

LENDIAN / TOUT1

SCL0

SDA0

CLKOUTT
CLKOUTF

D6
C6

A4
C5

A5
B5

E4
D3

AD3
AC4

R70 360

R71 360

EMAC_ENABLE

LENDIAN_MODE

TP4

TP5

TP6

TP7

TP8

TP

TP

TP

TP

1

1

TP

TP

TP

1

1

TP9

TP

TP

TP

TP

TP

1

1

D3.3V

R80

2.2k

R81

2.2k

SCL
SDA

GP04
GP05
GP06
GP07

D3.3V

2

BLUE_LED

1

R72

R73

R74

150

150

2

1

2

A

A

K

K

BLUE_LED

1

150

2

3

A

K

BLUE_LED

1

R75
150

2

4

A

K

BLUE_LED

1

D

C

Place all PLL external components as close to the DSP. All PLL external components must be on a single side of the board.

MULTIPLY

S1 S0
00

OPEN

0

1

0

OPEN

0

B

OPEN OPEN
OPEN

1

OPEN

1
1

1
0

1

4X

5.33X
5X

2.5X
2X

3.33X
6X
3X
8X

OUTPUT
100 MHz

133.25 MHz
125 MHz

62.5 MHz
50 MHz

83.25 MHz
150 MHz
75 MHz
200 MHz

D3.3V

R14 NO POP
R32 1k
R15 NO POP

EMAC_ENABLE
PCI_EEAI
LENDIAN_MODE

R16

R34

R33

1k

1k

NO POP

PCI EEPROM AUTO-INIT CONFIGURATION

R16/R32

R15/R34

MODE SELECTED
PCI EEPROM DISABLED(DEFAULT)

0

PCI EEPROM ENABLED; PCIEN=1

1

ENDIAN MODE CONFIGURATION

MODE SELECTED
BIG ENDIAN MODE

0

LITTLE ENDIAN MODE (DEFAULT)

1

B

EMAC MODE CONFIGURATION

0
1

MODE SELECTED
ETHERNET MAC DISABLED
ETHERNET MAC ENABLED

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

DM642 CLOCKS & RESET

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

6 of 17

A

R14/R33

A

1 2 3 4 5 6

54321

D3.3V

R19

R36
1k

R22
NO POP

TEA21
TEA22

R17
NO POP

R18
NO POP

NO POP

TEA19
TEA20

R20

NO POP

TP12
TP

TP

TCE0#

1

TCE1#
TCE2#
TCE3#
PDT#
TSOE3#
TECLKOUT2

BOOT_MODE[1:0]

TEA22 TEA21

0 NO BOOT (DEFAULT)

0
01
1

0
11

EMIF_ECLKINSEL[1:0]

0

1

TP13

TP14

TP

TP

TP

1

1

MODE SELECTED

HPI/PCI BOOT MODE (PCIEN)
RESERVED
EMIF 8 BIT ROM BOOT

0
10
0
11

TP15
TP

TP

1

MODE SELECTEDTEA20 TEA19
ECLKIN( DEFAULT)
CPU CLOCK /4 EMIF CLOCK
CPU CLOCK /6 EMIF CLOCK
RESERVED

TP16

TP17

TP

TP

TP

TP

1

1

TP18
TP

TP

TP

1

TED5

TED6

TED4

TED7

TED1

TED3

TED0

TED2

D

TP11
TP

DSP_TMS
DSP_TRST#
DSP_TDI
DSP_TDO
DSP_TCLK

DSP_EMU11
DSP_EMU10

DSP_EMU9
DSP_EMU8
DSP_EMU7
DSP_EMU6
DSP_EMU5
DSP_EMU4

DSP_EMU3
DSP_EMU2
DSP_EMU1
DSP_EMU0

D3.3V

TP

R89

4.7k

1

DSP_TMS
DSP_TRST#
DSP_TDI
DSP_TDO
DSP_TCLK

DSP_EMU[11..0]

DSP_EMU[11..0]

C

B

RN2
RPACK8-33

E15
D14
A18
B18
A16

D17
C17

B17
D16
A17
C16
B16
D15

C15
B15
C14
A15

L22

R41
10k

W24

TMX320DM642CGDK

U25A

TMS
TRST
TDI
TDO
TCLK

EMU11
EMU10

EMU9
EMU8
EMU7
EMU6
EMU5
EMU4

EMU3
EMU2
EMU1
EMU0

ARDY

HOLD

ED32

AD26

1234567

RN8

TED32

1234567

B24

A24

B23

B22

C22

ED0

ED1

ED2

ED3

ED4

EMIF and Emulation

ED33

ED34

ED35

ED36

ED37

AD25

AC25

AC26

AB24

AB25

TED34

TED35

TED33

TED36

TED37

A23

AB23

10111213141516

TED38

ED5

ED38

10111213141516

C21

ED6

ED39

AA24

89

TED39

8 9

B21

ED7

RPACK8-33

TED10

TED9

TED8

RN3

1234567

D21

A21

C20

ED8

ED9

ED40

ED41

AA25

AA23

AA26

1234567

RN9

TED40

TED41

TED42

ED10

ED42

TED11

B20

ED11

ED43

Y24

TED43

TED12

D20

ED12

ED44

Y25

TED44

TED13

A20

ED13

ED45

Y23

TED45

TED14

10111213141516

D19

ED14

ED46

Y26

10111213141516

TED46

TED15

8 9

C19

ED15

ED47

W23

89

TED47

TED16

TED17

TED18

RPACK8-33

1234567

H24

H23

G26

ED16

ED17

ED18

ED48

ED49

AD19

AC19

1234567

RN10

RPACK8-33

TED49

TED48

TED19

G23

ED19

ED50

AF20

TED50

TED20

G25

ED20

ED51

AC20

TED51

TED21

G24

ED21

ED52

AE20

TED52

TED22

10111213141516

F26

ED22

ED53

AD20

TED53

TED23

8 9

F23

AF21

10111213141516

TED54

RN4
RPACK8-33

ED23

ED54

ED55

AC21

89

TED55

NOTE: PLACE ALL 33-OHM RESISTORS AND RESISTOR NETWORKS AS CLOSE AS POSSIBLE TO THE CORRESPONDING U25 PINS.

TED27

TED24

TED25

TED26

TED28

1234567

F25

F24

E25

E24

D25

ED24

ED25

ED26

ED27

ED28

BOOTMODE0 / EA21
BOOTMODE1 / EA22

ED56

ED57

ED58

AE21

AE22

AD21

1234567

RN11

RPACK8-33

TED56

TED57

TED58

TED30

TED31

TED29

10111213141516

RN5
RPACK8-33

8 9

D26

C25

C26

ED29

ED30

ED31

EA03
EA04
EA05
EA06
EA07
EA08
EA09
EA10

EA11
EA12
EA13
EA14
EA15
EA16
EA17
EA18

ECLKINSEL0 / EA19
ECLKINSEL1 / EA20

SDRAS/AOE
SDCAS/ARE

SDWE/AWE

SDCKE

SOE3

ECLKOUT1
ECLKOUT2

HOLDA

BUSREQ

ED59

ED60

ED61

ED62

ED63

AE23

AF23

AF24

AD22

AD23

89

10111213141516

TED60

TED61

TED63

TED62

TED59

RN6

RPACK8-33

EA3 EA3

M24

EA4

M23

EA5

N26

EA6

N24

EA7

N23

EA8

P26

EA9

P24

EA10

P23

R24
R23
T25
T24
U26
U25
U24
V23

V26
V25
V24
U23

K25

CE0

K24

CE1

K23

CE2

L26

CE3

J24
J25
K26
L25
R22
M22

PDT

J26
J23

N22
P22

L24

BE0

L23

BE1

M26

BE2

M25

BE3

R26

BE4

R25

BE5

T23

BE6

T22

BE7

RPACK8-33

EA4
EA5
EA7
EA6
EA10
EA9
EA8

8 9
7
6
5
4
3
2
1

1
2
3
4
5
6
7
8 9

1
2
3
4 5

1
2
3
4 5

1
2
3
4
5
6
7
8 9

TEA3
TEA4

10

TEA5

11

TEA7

12

TEA6

13

TEA10

14

TEA9

15

TEA8

16

RN7 RPACK8-33

16

TEA11
TEA12

15

TEA13

14

TEA14

13

TEA15

12
11

TEA16
TEA17

10

TEA18

RN13 RPACK4-33

TEA19

8

TEA20

7

TEA21

6

TEA22

RN14 RPACK4-33

8
7
6

R6233
R6333
R6433
R6533
R6633
R6733

R6833
R6933

RN12 RPACK8-33

16
15
14
13
12
11
10

TCE0#
TCE1#
TCE2#
TCE3#

TSOE3#
PDT#

TECLKOUT2

TEA[22..3]

TCE0#
TCE1#

TSDRAS#
TSDCAS#
TSDWE#
TSDCKE

TECLKOUT1

TBE0#
TBE1#
TBE2#
TBE3#
TBE4#
TBE5#
TBE6#
TBE7#

TED[63..0]

R21
NO POP

TEA[22..3]

TED[63..0]

D3.3V

R35
1k

6

D

C

B

TEXAS INSTRUMENTS, INC.

A

1 2 3 4 5 6

12500 TI BLVD
DALLAS, TEXAS 75243

DM642 EMIF & JTAF

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

10 of 17

A

54321

6

D3.3V

D

R77
150

2

A
K

BLUE_LED

1

C

B

5

GP13_A19

GP15_A21

GP14_A20

R78
150

2

6

A
K

BLUE_LED

1

R76
10k

R79
150

2

7

A
K

BLUE_LED

1

R42
10k

R43
10k

PCIEN

R44
10k

R45
10k

U25D

V4

T2

M1

J2

N4
N3

N1

R3

P1
P3

R1
R2

F1

H4

K3

G4

G3

E2

C1

T4
R4

P5

R5

TMX320DM642CGDK

PCBE0
PCBE1 / HDS2
PCBE2 / HR/W
PCBE3 / GP10

PFRAME / HINT
PTRDY / HHWIL
PIRDY / HRDY
PSTOP / HCNTL0
PDEVSEL / HCNTL1
PPAR / HAS

PPERR / HCS
PSERR / HDS1

PREQ / GP11
PGNT / GP12

PIDSEL / GP9

PINTA / GP13

PRST / GP15

PCIEN

PCLK / GP14

XSPCS
XSPDI
XSPDO / MDIO
XSPCLK / MDCLK

HD00 / AD00
HD01 / AD01
HD02 / AD02
HD03 / AD03

HWDTHSEL / HD05 / AD05

HD04 / AD04
HD06 / AD06

HD07 / AD07
HD08 / AD08
HD09 / AD09
HD10 / AD10
HD11 / AD11
HD12 / AD12
HD13 / AD13
HD14 / AD14

HD15 / AD15
MTXD0 / HD16 / AD16
MTXD1 / HD17 / AD17
MTXD2 / HD18 / AD18
MTXD3 / HD19 / AD19
MTXEN / HD20 / AD20

MCOL / HD21 / AD21

MTCLK / HD22 / AD22

HD23 / AD23
MRXD0 / HD24 / AD24
MRXD1 / HD25 / AD25
MRXD2 / HD26 / AD26
MRXD3 / HD27 / AD27

MRXDV / HD28 / AD28

MRXER / HD29 / AD29

MCRS / HD30 / AD30

MRCLK / HD31 / AD31

PCI / HPI / EMAC

Y3
AA1
Y4
Y2
W3
Y1
W4
W2
V2
V3
V1
U4
U2
U3
U1
T3
M3
M2
M4
L2
L3
K2
L4
K1
K4
J1
J3
H2
J4
G2
H3
G1

HWDTHSEL

D3.3V

HPI WIDTH SELECTION

HWDTHSEL

0
1

PCI SELECTION

PCIEN

0
1

MODE SELECTED
16 BITS
32-BITS

MODE SELECTED
PCI DISABLED
PCI ENABLED

D

C

B

R24
NO POP

D3.3V

R23
NO POP

HWDTHSEL

R25
NO POP

PCIEN

R37
1k

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

DM642 PCI/HPI/EMAC

A

A

Size FCSM No. DWG No. Rev
Orcad B 1

1 2 3 4 56

Scale Sheet

8 of 17

54321

6

D

CORE CAPACITORS ARE 0402 SIZE

DSP_CVDD

C20

C17

C18

C52

0.01uF

C19

0.01uF

0.01uF

0.01uF

+

0.01uF

C171

10uF

C21

0.01uF

C22

0.01uF

C23

0.01uF

C24

0.01uF

C53

0.01uF

C172

+

10uF

C16

0.01uF

DSP_CVDD

C13

0.01uF

C

B

DSP_CVDD

DSP_CVDD

DSP_CVDD

DSP_CVDD

C14

C15

C51

+

10uF

0.01uF

0.01uF

0.01uF

C170

C25

0.01uF

C26

0.01uF

C27

0.01uF

C28

0.01uF

C54

0.01uF

C29

0.01uF

DSP_CVDDD3.3V

C32

0.01uF

C30

0.01uF

C31

0.01uF

C55

0.01uF

R90 0
R91 0

C33

0.01uF

C34

0.01uF

C56

0.01uF

DSP_CVDD

AA20
AA21

F6

F7
F20
F21

G6
G7

G8
G10
G11
G13
G14
G16
G17
G19
G20
G21
H20

K7
K20

L7

L20

M12
M14

N7
N13
N15
N20

P7
P12
P14
P20
R13
R15

T7
T20

U7

U20

W20

Y6
Y7

Y8
Y10
Y11
Y13
Y14
Y16
Y17
Y19
Y20
Y21

AA6
AA7

H7

R6

W7

U25C

CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD
CVDD

CVDDMON
DVDDMON
VSSMON

TMX320DM642CGDK

101562-0001

A12

A14

A19

A22

VSSA1VSSA3VSSA6VSSA8VSS

VSS

VSS

Power and GroundConnections

VSSP2VSSP6VSS

VSSR7VSS

VSS

VSS

VSS

P21

P13

P15

R12

R14

A26

VSS

VSS

R20

VSS

VSSB3VSSB6VSSB7VSS

VSST1VSST5VSST6VSS

B13

B19

C13

C18

C23

D13

D18

D22

D24

E16

E18

E21

E23

E26

F10

F11

F13

F14

F16

F17

F19

F22

G12

G15

G18

H6

H21

H26

J20

J22

VSS

VSSC2VSSC4VSS

VSS

VSS

VSSD1VSSD2VSSD5VSS

VSS

VSS

VSS

VSSE3VSSE6VSSE9VSS

VSS

VSS

VSS

VSS

VSSF5VSSF8VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSG9VSS

VSS

VSS

VSSH1VSS

VSS

VSS

VSSJ5VSSJ7VSS

VSS

VSSU6VSS

VSSV5VSSV7VSS

VSS

VSSW1VSSW6VSS

VSS

VSSY9VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

T21

T26

U21

V20

V22

Y12

Y15

Y18

W21

W26

AA4

AA5

AA8

AA10

AA11

AA13

AA14

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AB4

AB1

AB2

AB6

AB9

AC3

AA16

AA17

AA19

AA22

AC5

AB18

AB21

AB26

AE3

AD2

AD4

AC18

AC22

AC24

AD18

M13

M15

N12

M20

VSS

VSS

VSSM7VSS

VSS

VSS

VSS

AF1

AF7

AF9

VSSN5VSSN6VSS

VSS

VSS

VSS

AF11

AF13

AF15

N14

N21

N25

VSS

VSS

VSS

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

VSS

VSS

VSS

VSS

AF19

AF22

AF26

K21

L21

VSS

VSSK6VSS

VSSL1VSSL6VSS

VSS

VSS

VSS

VSS

VSS

VSS

AE8

AE10

AE12

AE14

AE19

AE24

A2
A25
B1
B2
B14
B25
B26
C3
C24
D4
D23
E5
E7
E8
E10
E17
E19
E20
E22
F9
F12
F15
F18
G5
G22
H5
H22
J6
J21
K5
K22
M6
M21
N2
P25
R21
U5
U22
V21
W5
W22
W25
Y5
Y22
AA9
AA12
AA15
AA18
AB5
AB7
AB8
AB10
AB17
AB19
AB20
AB22
AC23
AD24
AE1
AE2
AE13
AE25
AE26
AF2
AF25

D3.3V

D3.3V

D3.3V

D3.3V

D3.3V

D3.3V

D3.3V

C7

0.1uF

C35

0.1uF

C36

0.1uF

C57

0.1uF

C11

C8

0.1uF

D3.3V

C37

0.1uF

C38

0.1uF

C39

0.1uF

C59

0.1uF

C60

C58

0.1uF

0.1uF

C173

+

33uF

C10

C9

0.1uF

0.1uF

C43

C40

0.1uF

0.1uF

C41

C44

0.1uF

0.1uF

C45

C42

0.1uF

0.1uF

C63

0.1uF

C61

C64

0.1uF

0.1uF

D3.3V

C65

C62

0.1uF

0.1uF

C175

C174

+

+

33uF

33uF

C66

0.1uF

C12

0.1uF

0.1uF

C46

0.1uF

C49

C48

0.1uF

0.1uF

C50

C47

0.1uF

0.1uF

C69

0.1uF

C67

C71

0.1uF

0.1uF

C70

C68

0.1uF

0.1uF

D

C

B

TEXAS INSTRUMENTS, INC.

A

1 2 3 4 5 6

12500 TI BLVD
DALLAS, TEXAS 75243

DM642 POWER PINS

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

9 of 17

A

54321

6

D

TED[31..0]

TED[31..0]

D

D3.3V

C73

C72

0.1uF

30

TEA[22..3]

TEA[22..3]

TEA3
TEA4
TEA5
TEA6
TEA7
TEA8
TEA9
TEA10
TEA11

R53 10k

TEA12
TEA13
TEA14
TEA15
TEA16
TEA17
TEA18
TEA19
TEA20
TEA21

C

D3.3V

R51

R52

10k

10k

D3.3V

GP13_A19
GP14_A20
GP15_A21

TCE1#
TSDCAS#
TSDWE#

/RESET

R49

R50

10k

10k

R26 NO POP

U4

21
20
19
18
17
16
15
14

8
7

36

6
5
4
3
2

1
40
13
37
38
29

22
24

9

10
11

AM29LV033C-90EI

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21

CE
OE
WE

RESET
ACC

31

VCC

0.1uF

25

VCC2

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

RDY-BY

TED0

26

TED1

27

TED2

28

TED3

32

TED4
TED5

33

TED6

34

TED7

35

C

12

VSS123VSS2

39

B

TEXAS INSTRUMENTS, INC.

A

12500 TI BLVD
DALLAS, TEXAS 75243

B

A

FLASH MEMORY

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

14 of 17

1 2 3 4 5 6

54321

6

D

3.3V_SUPPLY

C75

C74

0.1uF

3.3V_SUPPLY

U5

42
31

C

SCK4

CH4_OUT[7..0]

CH4_OUT[7..0]

CH4_OUT0
CH4_OUT1
CH4_OUT2
CH4_OUT3
CH4_OUT4
CH4_OUT5
CH4_OUT6
CH4_OUT7

3.3V_SUPPLY

47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26

48

1
25
24

4
10
15
21

SN74LVT16245BDGGR

Vcc
Vcc

1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8

1OE
1DIR
2OE
2DIR

GND
GND
GND
GND

0.1uF

GND
GND
GND
GND

C76

C77

0.1uF

0.1uF

7

Vcc

18

Vcc

SCLK

2

1B1

Y0

3

1B2

Y1

5

1B3

Y2

6

1B4

Y3

8

1B5

Y4

9

1B6

Y5

11

1B7

Y6

12

1B8

Y7

13

2B1

14

2B2

16

2B3

17

2B4

19

2B5

20

2B6

22

2B7

23

2B8

28
34
39
45

D5V

U6

1

CLK/I0

2

I1

3

I2

4

I3

5

I4

6

I5

7

I6

8

I7

9

I8

10

I9

11

I10
GND12I11

PALCE22V10H-10PC/5

C78

0.1uF

TP19

TP20

TP21

TP

TP

TP

1

D5V

24

VCC

23

I/O9

22

I/O8

21

I/O7

20

I/O6

19

I/O5

18

I/O4

17

I/O3

16

I/O2

15

I/O1

14

I/O0

13

1

TP22

TP

TP

TP

TP

TP

1

1

D

C

B

#OE DIR OPERAT ION
L L A <--- B

B

L H A ---> B
H X ISOLATION

TEXAS INSTRUMENTS, INC.

A

1 2 3 4 5 6

12500 TI BLVD
DALLAS, TEXAS 75243

F&V BIT BREAKOUT

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

12 of 17

A

54321

6

D

SCL
SDA

SCL
SDA

/RESET

CH1_OUT[7..0]

SCKS1
SCK1
VB1
AV1
HS1
VS1
FID1

CH1_OUT[7..0]

C

CH2_OUT[7..0]

SCKS2
SCK2
VB2
AV2
HS2
VS2
FID2

CH3_OUT[7..0]

B

SCKS3
SCK3
VB3
AV3
HS3
VS3
FID3

CH2_OUT[7..0]

CH3_OUT[7..0]

CH1_OUT0
CH1_OUT1
CH1_OUT2
CH1_OUT3
CH1_OUT4
CH1_OUT5
CH1_OUT6
CH1_OUT7

SCKS1
SCK1
VB1
AV1
HS1
VS1
FID1

CH2_OUT0
CH2_OUT1
CH2_OUT2
CH2_OUT3
CH2_OUT4
CH2_OUT5
CH2_OUT6
CH2_OUT7

SCKS2
SCK2
VB2
AV2
HS2
VS2
FID2

CH3_OUT0
CH3_OUT1
CH3_OUT2
CH3_OUT3
CH3_OUT4
CH3_OUT5
CH3_OUT6
CH3_OUT7

SCKS3
SCK3
VB3
AV3
HS3
VS3
FID3

D5V

H1

1 2
3 4
5 6
7 8
9 10
11 12

HEADER 6X2

H2

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32

HEADER 16X2

H3

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32

HEADER 16X2

H4

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32

HEADER 16X2

D

C

B

CH4_OUT[7..0]

SCKS4
SCK4
VB4
AV4
HS4
VS4
FID4

CH4_OUT[7..0]

CH4_OUT0
CH4_OUT1
CH4_OUT2
CH4_OUT3
CH4_OUT4
CH4_OUT5
CH4_OUT6
CH4_OUT7

SCKS4
SCK4
VB4
AV4
HS4
VS4
FID4

A

H5

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32

HEADER 16X2

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

A

DAUGHTERCARD INTERFACE

Size FCSM No. DWG No. Rev
C 1

1 2 3 4 5 6

Scale Sheet

3 of 17

54321

6

CH4_AVDDCH2_AVDD AVDD_REFCH1_AVDD

CH3_AVDD

C79

C81

C83

0.1uF

0.1uF

CH2_PLL_VDD

C80

C82

0.1uF

D

0.1uF

0.1uF

CH3_PLL_VDD CH4_PLL_VDDCH1_PLL_VDD

C84

0.1uF

C85

0.1uF

INPUT V DIVIDER NETWORK
FOR 0-0.75V INPUT RANGE
REMEMBER 75ohm TERMINAT IO N

BNC1
BNC_RA

BNC2
BNC_RA

C

BNC3
BNC_RA

BNC4
BNC_RA

B

JP1

1 2

3

4

1A_IN 1A_OUT

1A_IN 1A_OUT

JP2

1 2

3

4

2A_IN 2A_OUT

2A_IN 2A_OUT

JP3

1 2

3

4

3A_IN 3A_OUT

3A_IN 3A_OUT

JP4

1 2

3

4

4A_IN 4A_OUT

4A_IN 4A_OUT

R10437.4

R10537.4

R10637.4

R10737.4

I2C ADDRESS SELECTION

2-3 Base Addr 0xB8 - Default

R54
10k

I2CSEL1

R57
10k

IOVDD

C88

C86

0.1uF

C87

0.1uF

R108

37.4

R109

37.4

R110

37.4

R111

37.4

CH1_A

CH2_A

CH3_A

CH4_A

C90

0.1uF

0.1uF

DVDD

C89

C91

0.1uF

0.1uF

BNC5
BNC_RA

1B_IN 1B_OUT

1B_IN 1B_OUT

BNC6
BNC_RA

2B_IN 2B_OUT

2B_IN 2B_OUT

BNC7
BNC_RA

3B_IN 3B_OUT

3B_IN 3B_OUT

BNC8
BNC_RA

4B_IN 4B_OUT

4B_IN 4B_OUT

C92

0.1uF

C93

0.1uF

JP5

1 2

3

JP6

1 2

3

JP7

1 2

3

JP8

1 2

3

C94

0.1uF

C95

0.1uF

C96

0.1uF

C97

0.1uF

R11237.4

4

R11337.4

4

R11437.4

4

R11537.4

4

POWERDOWN

1-2 Normal Operation - Default
2-3 Powerdown

IOVDD IOVDD

13

2 JP9

I2C ADR

I2CSEL2

R55
10k

2 JP10

R58
10k

IOVDD

13

I2C ADR

R56
10k

2 JP11

PDN

P1
SMA_PCB_MT_MOD

1

3 4

2

5

CH4_AVDD

CH3_PLL_VDD

CH3_AVDD

AVDD_REF

CH2_PLL_VDD

CH2_AVDD

CH4_PLL_VDD CH1_PLL_VDD

CH1_B

R116

37.4

CH2_B

R117

37.4

CH3_B

R118

37.4

CH4_B

R119

37.4

13

/PDN

CH1_A
CH1_B

CH2_A
CH2_B

CH3_A
CH3_B

CH4_A
CH4_B

C98 0.1uF
C99 0.1uF

REFM2
REFP2

C100 0.1uF
C101 0.1uF

REFM3
REFP3

C102 0.1uF
C103 0.1uF

C104 0.1uF
C105 0.1uF

REFM4
REFP4

50
R101

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

R92
0

C176
33pF

U1

AI1GND
AI1A
AI1B
PLL_VDD
PLL_GND
REFM2
REFP2
AVDD
AGND
AI2GND
AI2A
AI2B
PLL_VDD
PLL_GND
AVDD
AGND
REFM3
REFP3
AVDD
AGND
AI3GND
AI3A
AI3B
PLL_VDD
PLL_GND
REFM4
REFP4
AVDD
AGND
AI4GND
AI4A
AI4B

TVP5154PNP

X2

X1/OSC

R93
0

R102
100k

Y4

14.31818MHz

CH1_AVDD

128

C177
33pF

DVDD

REFP1

REFM1

X1/OSCX2PDN

/RESET

SCL

SDA

I2CSEL1

I2CSEL2

124

117

118

121

123

120

119

122

XOUT

116

SCL

SDA

PDN

I2CA1

I2CA0

RESETB

126

127

125

REFP1

AVDD

AGND

REFM1

XIN/OSC

PLL_VDD33PLL_GND34AGND35TMS36FID4/GLCO437VSYNC4/PALI438HSYNC439AVID440INT4/GPCL4/VBLK441CLK442SCLK443IOGND44IOVDD45DVDD46DGND

TMS

IOVDD

112

115

113

114

DVDD

DGND

IOGND

IOVDD

CH1OUT0

CH4OUT748CH4OUT649CH4OUT550CH4OUT451CH4OUT352CH4OUT253CH4OUT154CH4OUT0

47

111

CH1OUT1

109

110

CH1OUT3

CH1OUT2

105

106

107

108

104

103

CH1OUT7

CH1OUT6

CH1OUT5

CH1OUT4

CLK1

SCLK1

FID3/GLCO356VSYNC3/PALI357HSYNC358AVID359INT4/GPCL4/VBLK460CLK361SCLK362IOGND63IOVDD

55

100

102

99

101

AVID1

HSYNC1

VSYNC1/PALI1

INT1/GPCL1/VBLK1

SCLK2

CLK2

INT2/GPCL2/VBLK2

VSYNC2/PALI2

97

DVDD98DGND

IODVDD

IOGND

FID1/GLCO1

CH2OUT0
CH2OUT1
CH2OUT2
CH2OUT3
CH2OUT4
CH2OUT5
CH2OUT6
CH2OUT7

DGND

DVDD
IOVDD
IOGND

AVID2

HSYNC2

FID2/GLCO2

CH3OUT0
CH3OUT1
CH3OUT2
CH3OUT3
CH3OUT4
CH3OUT5
CH3OUT6
CH3OUT7

DGND

DVDD

64

RN16
RPACK8-33

RN15

RPACK8-33

RN18
RPACK8-33

RN17

RPACK8-33

RN19
RPACK8-33

RN20

RPACK8-33

RN22
RPACK8-33

RN21

RPACK8-33

CH1_OUT0
CH1_OUT1
CH1_OUT2
CH1_OUT3
CH1_OUT4
CH1_OUT5
CH1_OUT6
CH1_OUT7

SCKS1
SCK1
VB1
AV1
HS1
VS1
FID1

CH2_OUT0
CH2_OUT1
CH2_OUT2
CH2_OUT3
CH2_OUT4
CH2_OUT5
CH2_OUT6
CH2_OUT7

SCKS2
SCK2
VB2
AV2
HS2
VS2
FID2

CH3_OUT0
CH3_OUT1
CH3_OUT2
CH3_OUT3
CH3_OUT4
CH3_OUT5
CH3_OUT6
CH3_OUT7

SCKS3
SCK3
VB3
AV3
HS3
VS3
FID3

CH4_OUT0
CH4_OUT1
CH4_OUT2
CH4_OUT3
CH4_OUT4
CH4_OUT5
CH4_OUT6
CH4_OUT7

SCKS4
SCK4
VB4
AV4
HS4
VS4
FID4

CH1_OUT[7..0]

SCKS1
SCK1
VB1
AV1
HS1
VS1
FID1

CH2_OUT[7..0]

SCKS2
SCK2
VB2
AV2
HS2
VS2
FID2

CH3_OUT[7..0]

SCKS3
SCK3
VB3
AV3
HS3
VS3
FID3

CH4_OUT[7..0]

SCKS4
SCK4
VB4
AV4
HS4
VS4
FID4

D

CH1_OUT[7..0]

CH2_OUT[7..0]

C

CH3_OUT[7..0]

B

CH4_OUT[7..0]

CH1_D0
CH1_D1
CH1_D2
CH1_D3

CH1_D4
CH1_D0
CH1_D1
CH1_D2
CH1_D3
CH1_D4
CH1_D5
CH1_D6
CH1_D7

SCLKS1
SCLK1
GPCL1/VBLK1
AVID1
HSYNC1
VSYNC1/PALI1
FID1/GLCO1

96
95
94

CH2_D0

93

CH2_D1

92

CH2_D2

91

CH2_D3

90

CH2_D4

89

CH2_D5

88

CH2_D6

87

CH2_D7

86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65

CH3_D0
CH3_D1
CH3_D2
CH3_D3
CH3_D4
CH3_D5
CH3_D6
CH3_D7

CH4_D0
CH4_D1
CH4_D2
CH4_D3
CH4_D4
CH4_D5
CH4_D6
CH4_D7

SCLKS2
SCLK2
GPCL2/VBLK2

AVID2
HSYNC2
VSYNC2/PALI2
FID2/GLCO2

SCLKS3
SCLK3
GPCL3/VBLK3
AVID3
HSYNC3
VSYNC3/PALI3
FID3/GLCO3

SCLKS4
SCLK4
GPCL4/VBLK4
AVID4
HSYNC4
VSYNC4/PALI4
FID4/GLCO4

CH1_D5

CH1_D6

CH1_D7

SCLKS1

SCLK1

GPCL1/VBLK1

AVID1

HSYNC1

VSYNC1/PALI1

FID1/GLCO1

CH2_D0

CH2_D1

CH2_D2

CH2_D3

CH2_D4

CH2_D5

CH2_D6

CH2_D7

SCLKS2

SCLK2

GPCL2/VBLK2

AVID2

HSYNC2

VSYNC2/PALI2

FID2/GLCO2

CH3_D0

CH3_D1

CH3_D2

CH3_D3

CH3_D4

CH3_D5

CH3_D6

CH3_D7

SCLKS3

SCLK3

GPCL3/VBLK3

AVID3

HSYNC3

VSYNC3/PALI3

FID3/GLCO3

CH4_D0

CH4_D1

CH4_D2

CH4_D3

CH4_D4

CH4_D5

CH4_D6

CH4_D7

SCLKS4

SCLK4

GPCL4/VBLK4

AVID4

HSYNC4

VSYNC4/PALI4

FID4/GLCO4

SDA

SDA

SCL

C178

C180

1uF

1uF

A

1 2 3 4 5 6

IOVDD

R120
100

TMS

R59
10k

C179

1uF

REFM1

REFP1

C181
1uF

C183
1uF

C182

1uF

REFM2

REFP2

C184
1uF

C186
1uF

C185

1uF

REFM3

REFP3

C187
1uF

C189
1uF

C188

1uF

REFM4

REFP4

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

TVP5154

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

/RESET

SCL
/RESET

A

2 of 17

NOTE: FILTERS DESIGNED FOR CVBS INPUTS (ADC SAMPLING RATE = 27MHz)

54321

6

D

1A_IN 1A_OUT 2A_IN 2A_OUT

1B_IN 1B_OUT 2B_IN 2B_OUT

C

3A_IN 3A_OUT 4A_IN 4A_OUT

C202 8.2pF

2.2uH

L4

C210
330pF

C204 8.2pF

2.2uH

L6

C214
330pF

C205 8.2pF

2.2uH

L8

C218
330pF

C211
330pF

C215
330pF

C220
330pF

C203 8.2pF

2.2uH

L5

C212
330pF

C206 8.2pF

2.2uH

L7

C216
330pF

C2078.2pF

2.2uH

L10

C222
330pF

C213
330pF

C217
330pF

C224
330pF

D

C

B

3B_IN 3B_OUT 4B_IN 4B_OUT

A

1 2 3 4 56

C208 8.2pF

2.2uH

L9

C219
330pF

C221
330pF

C209 8.2pF

2.2uH

L11

C223
330pF

C225
330pF

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

ANTI-ALIASING FILTERS

Size FCSM No. DWG No. Rev
B 1

Scale Sheet

11 of 17

B

A

54321

6

D

D

D3.3V

C106

C

P2

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25

DB25F_182-25F-ND

13

26 27

B

DB15

DB17

DB9

DB11

R85

R86

2.2k

2.2k

0.1uF

R87

2.2k

2.2k

R82

13 12

1 2

11 10

U2C

SN74AHC05DR

U2F

SN74AHC05DR

147

U2A

SN74AHC05DR

U2B

SN74AHC05DR

U2E

R83

2.2k

56

R84

2.2k

U2D

SN74AHC05DR

TP23
TP

TP

1

R94

98

SCL

0

SCL

D3.3V

R88

2.2k

TP24
TP

TP

1

0

34

SDA

R95

SDA

C

B

SN74AHC05DR

TEXAS INSTRUMENTS, INC.

A

12500 TI BLVD
DALLAS, TEXAS 75243

A

I2C

Size FCSM No. DWG No. Rev
C 1

1 2 3 4 5 6

Scale Sheet

17 of 17

54321

D3.3V

C107

C109

C111

C113

C115

C117

C119

C121

C123

C125

C127

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

D3.3V

C108

C110

C112

C114

C116

C118

C120

C122

C124

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

D

C

B

0.1uF

TED[63..0]

TBE0#
TSDWE#
TSDCAS#
TSDRAS#
TCE0#

TBE2#
TBE1#
TBE3#
TBE4#
TBE5#
TBE6#
TBE7#

TSDCKE
TECLKOUT1

C126

0.1uF

0.1uF

TED[63..0]

TSDWE#
TSDCAS#
TSDRAS#
TCE0#

TBE2# TBE3#
TBE1#
TBE3#
TBE4#
TBE5#
TBE6#
TBE7#

TSDCKE
TECLKOUT1

C129

0.1uF

0.1uF

C128

C130

0.1uF

0.1uF

D3.3V

U7

1

TED7
TED6

TED5
TED4

TED3
TED2

TED1
TED0

TEA14
TEA15
TEA16
TEA13
TEA3
TEA4
TEA5

TED16
TED17

TED18
TED19

TED20
TED21

TED22
TED23 TED24

D0

3

VDDQ

4

D1

5

D2

6

VSSQ

7

D3

8

D4

9

VDDQ

10

D5

11

D6

12

VSSQ

13

D7

14

NC

15

VDD

16

DQM0

17

/WE

18

/CAS

19

/RAS

20

/CS

21

A11

22

BA0

23

BA1

24

A10/AP

25

A0

26

A1

27

A2

28

DQM2

29

VDD

30

NC

31

D16

32

VSSQ

33

D17

34

D18

35

VDDQ

36

D19

37

D20

38

VSSQ

39

D21

40

D22

41

VDDQ

42

D23

43

VDD

MT48LC4M32B2TG-6

VDD

2

VSSQ

VDDQ

VSSQ

VDDQ

DQM1

DQM3

VDDQ

VSSQ

VDDQ

VSSQ

VSS
D15

D14
D13

D12
D11

D10

D9
D8

NC

VSS

NC

NC
CLK
CKE

A9
A8
A7
A6
A5
A4
A3

VSS

NC
D31

D30
D29

D28
D27

D26
D25

D24
VSS

D3.3V

86

TED15

85
84

TED14

83

TED13

82
81

TED12

80

TED11

79
78

TED10

77

TED9

76
75

TED8

74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57

TED31

56
55

TED30

54

TED29

53
52

TED28

51

TED27

50
49

TED26

48

TED25

47
46
45
44

TEA12
TEA11
TEA10
TEA9
TEA8
TEA7
TEA6

TBE1#TBE0#

TECLKOUT1

TED39
TED38

TED37
TED36

TED35
TED34

TED33
TED32

TSDWE#
TSDCAS#
TSDRAS#
TCE0#

TEA14
TEA15
TEA16
TEA13
TEA3
TEA4
TEA5

TED48
TED49

TED50
TED51

TED52
TED53

TED54
TED55 TED56

U8

1

VDD

2

D0

3

VDDQ

4

D1

5

D2

6

VSSQ

7

D3

8

D4

9

VDDQ

10

D5

11

D6

12

VSSQ

13

D7

14

NC

15

VDD

16

DQM0

17

/WE

18

/CAS

19

/RAS

20

/CS

21

A11

22

BA0

23

BA1

24

A10/AP

25

A0

26

A1

27

A2

28

DQM2

29

VDD

30

NC

31

D16

32

VSSQ

33

D17

34

D18

35

VDDQ

36

D19

37

D20

38

VSSQ

39

D21

40

D22

41

VDDQ

42

D23

43

VDD

MT48LC4M32B2TG-6

VSSQ

VDDQ

VSSQ

VDDQ

DQM1

DQM3

VDDQ

VSSQ

VDDQ

VSSQ

86

VSS
D15

D14
D13

D12
D11

D10

D9
D8

NC

VSS

NC

NC
CLK
CKE

A9

A8

A7

A6

A5

A4

A3
VSS

NC
D31

D30
D29

D28
D27

D26
D25

D24
VSS

TED47

85
84

TED46

83

TED45

82
81

TED44

80

TED43

79
78

TED42

77

TED41

76
75

TED40

74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57

TED63

56
55

TED62

54

TED61

53
52

TED60

51

TED59

50
49

TED58

48

TED57

47
46
45
44

TEA12
TEA11
TEA10
TEA9
TEA8
TEA7
TEA6

TBE5#TBE4#

TECLKOUT1
TSDCKETSDCKE

TBE7#TBE6#

6

D

C

B

TEA[22..3]

TEA[22..3]

TEXAS INSTRUMENTS, INC.

A

1 2 3 4 5 6

12500 TI BLVD
DALLAS, TEXAS 75243

SDRAM

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

13 of 17

A

54321

6

D

D

ROUTE TRACES AS ONE GROUP. MATCH SIGNAL LENGTH.

P3

C2

EMU18

B3

EMU17

XDS_EMU1
XDS_EMU0
XDS_TCKRET
XDS_TCK
XDS_TDO
XDS_TDI
XDS_TMS
XDS_TRST#

C4

EMU16

C5

EMU15

B5

EMU14

C6

EMU13

B6

EMU12

C7

EMU11

C9

EMU10

B9

EMU9

C10

EMU8

B10

EMU7

C11

EMU6

B11

EMU5

C12

EMU4

C13

EMU3

B13

EMU2

C14

EMU1

B14

EMU0

C8

TCKRTN

B12

TCLK

B7

TDO

B4

TDI

B2

TMS

C3

TRSTn

C15

ID3

C1

ID2

B15

ID1

B1

ID0

B8

TVD

Samtec SOLC-115-02-S-Q-A

LOCATE R-PACK NEAR DSP

D3.3V

H6

1

XDS_TMS
XDS_TDI

3

C

XDS_TDO
XDS_TCKRET
XDS_TCK
XDS_EMU0

5
7

9
11 12
13 14

HEADER 7x2, Emulation

XDS_TRST#

2
4

8
10

XDS_EMU1

XDS_TDI
XDS_TMS
XDS_TRST#

DSP_TDI
DSP_TMS
DSP_TRST#

DSP_EMU[11..0]

DSP_EMU[11..0]

DSP_EMU11
DSP_EMU10
DSP_EMU9
DSP_EMU8
DSP_EMU7
DSP_EMU6
DSP_EMU5
DSP_EMU4

DSP_EMU3
DSP_EMU2
DSP_EMU1
DSP_EMU0

DSP_TDO

RN23RPACK8-39

RN24RPACK8-39

D3.3V

R38 1k

GND
GND
GND
GND
GND
GND
GND

TYPE0

GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND

TYPE1

GND
GND
GND
GND
GND
GND
GND

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

C

D3.3V

C131

0.1uF

53

1
2

1
2

U9

SN74LVC1G32DCKR

D3.3V

53

U10

SN74LVC1G32DCKR

C132

0.1uF

R4

4

4

R5

33

XDS_TCKRET

33

DSP_TCLK

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

JTAG

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

15 of 17

B

A

C226

18pF

XDS_TCK

R121 100 1%

B

A

1 2 3 4 5 6

7654321

8

POWER ON LED (+5V)

D

C

B

A

1.8V_SUPPLY

3.3V_SUPPLY

1.8V_SUPPLY

J1
JUMPER

2

J10
JUMPER

2

J11
JUMPER

2

JUMPER

JUMPER

JUMPER

JUMPER

D5V

R122
330

2

LED1

A

GRN_LED

K

1

1

H8

1
2

HEADER 2

2J2

1

H9

1
2

HEADER 2

2J4

1

H11

1
2

HEADER 2

2J5

1

H12

1
2

HEADER 2

2J6

1

H13

1
2

HEADER 2

1

H17

1
2

HEADER 2

1

H18

1
2

HEADER 2

P4
PJ-002BH

5V, 3.0A DC INPUT

H7

1

3

3

2

2

1

HEADER 3

D5V

FB2
FERRITE

C134
C233
22uF

0.1uF

FB3
FERRITE

C135
C234
22uF

0.1uF

FB5
FERRITE

C147
C239
22uF

0.1uF

FB6
FERRITE

C148
C240
22uF

0.1uF

FB7
FERRITE

C149
C241
22uF

0.1uF

FB12
FERRITE

C162
C251
22uF

0.1uF

FB13
FERRITE

C163
C252
22uF

0.1uF

F1 FUSE

C229
22uF

C230
22uF

C235
22uF

C236
22uF

C242
22uF

C243
22uF

C244
22uF

C253
22uF

C254
22uF

C191
1uF

C192
1uF

C194
1uF

C195
1uF

C196
1uF

C200
1uF

C201
1uF

D5V

C136

0.1uF

C137

0.1uF

CH1_AVDD

CH2_AVDD

CH3_AVDD

CH4_AVDD

AVDD_REF

D1
ZENER

IOVDD

DVDD

SS26

C138

0.1uF

C139

0.1uF

C150

0.1uF

C151

0.1uF

C152

0.1uF

C164

0.1uF

C165

0.1uF

D3.3V

R103

L12

C227

+

47uF

R123
249k

1.8V_SUPPLY

VOUT1 IS 3.3V 1A
VOUT2 IS 1.8V 2A

U12

1

GND

2

VIN1A

3

VIN1B

4

VSENSE1/FB1

NC

5

/MR

6

/EN1

7

/EN2

8

/RESET

9

GND

VSENSE2/FB2

10

VIN2A

11

VIN2B

12

GND

TPS70451PWP

J3
JUMPER

1

2

2J7

1

JUMPER

2J8

1

JUMPER

2J9

1

JUMPER

PP

25

C228
22uF

VOUT1A

VOUT1B

VOUT2A

VOUT2B

H10

HEADER 2

H14

HEADER 2

H15

HEADER 2

H16

HEADER 2

24

GND

23
22
21
20

NC

R124249k

19

PG1

18

PG2

17

R125249k

NC

16
15
14
13

GND

1
2

1
2

1
2

1
2

FB14
FERRITE

FB15
FERRITE

100k

S1
PB

R96
0

R27
NO POP

L13

L14

R28

0

NO POP

R97

C140
C237
22uF

0.1uF

C153
C245
22uF

0.1uF

C154
C246
22uF

0.1uF

FB4
FERRITE

FB8
FERRITE

FB9
FERRITE

C190
1uF

3.3V_SUPPLY

C231
22uF

1.8V_SUPPLY

C232
22uF

U11

1

CONTROL

2

/RESIN

3

CT
GND4/RESET

TLC7733IPWR

C141

0.1uF

C142

0.1uF

C238
22uF

C248
22uF

C249
22uF

CH1_PLL_VDD

C193
1uF

CH2_PLL_VDD

C197
1uF

CH3_PLL_VDD

C198
1uF

SENSE
RESET

C1330.1uF

8

VDD

7
6
5

/RESET

/RESET

FB1
FERRITE

Connect at pin 1

3.3 sq in AGND, min thermal pad

R126

EMI SUPPRESION. LOCATE NEAR EACH REGULATOR.
6 VIAS FROM PAD TO PLANE OR DIRECT TIE.

D5V

+

C255
47uF

C143

0.1uF

C156

0.1uF

POWER ESTIMATES BASED ON SPRU190

C157

0.1uF

1.4V@600MHz

3.3V@600MHz
MEASURED CURRENT ON C6416TEB, ~0.7A@5V

C144

0.1uF

C159

0.1uF

L15

BLM41P750SPT

L16

BLM41P750SPT

C145

0.1uF

71.5k 1%

C256

0.039uF

C258

+

C146

0.1uF

10uF LESR

Connect at pin 1

3.3 sq in AGND, min thermal pad

R134

C160

0.1uF

1.09 W

0.52 W

71.5k 1%

C257

0.039uF

C259

+

C161

0.1uF

10uF LESR

0.778A

0.157A ( no emif clk)

21
20
19
18
17

16
15
14

13
12
11

21
20
19
18
17

16
15
14

13
12
11

U13

POWERPAD
RT
SYNC
SS/ENA
VBIAS

VIN3
VIN2
VIN1

PGND3
PGND2
PGND1

TPS54310PWP

U14

POWERPAD
RT
SYNC
SS/ENA
VBIAS

VIN3
VIN2
VIN1

PGND3
PGND2
PGND1

TPS54310PWP

AGND

VSENSE

COMP

PWRGD

AGND

VSENSE

COMP

PWRGD

BOOT

PH1
PH2
PH3
PH4
PH5

BOOT

PH1
PH2
PH3
PH4
PH5

1
2
3
4
5

0.047uF

6
7
8
9
10

1.4V -> 17.4K 1%

1.2V -> 28.0K 1%

1.1V -> 42.2K 1%

1
2
3
4
5

0.047uF

6
7
8
9
10

FB11
FERRITE

C260
470pF

C261

1.65k 1%

C273
560pF

C262

R129

3.74k 1%

R127
2k 1%

L17 2.7uH

R128

17.4k 1%

R135

L18 2.7uH

Sets Voltage

C263
8200pF

3300pF

C266

C264
100uF

OPTIONAL CROSS COUPLE

C274

0.01uF

C267
3300pF

R131

C265
100uF

10k 1%

R13010k 1%

C268
1000pF

R133
107 1%

107 1%

C269
1000pF

TP25

D3.3V

TP

R132

C272

D3.3V

NO POP

+

C270

D13

100 uF

MURS120T3

3.3V @1.5Amp Max

D14
MURS120T3

D15
MURS120T3

D16
MURS120T3

D17
MURS120T3

1.4V @1.5Amp Max

DSP_CVDD

C271

+

100 uF

TP

R60
10k

1

EACH REGULATOR CAN SUPPLY UP TO 3A OFCURRENT. HOWEVER COMPONENT VALUES HAVEBEEN SELECTED FOR 1.5A OPERATION.
VALUES CALCULATED WITH SWIFT DESIGN TOOL 2.0.

FOLLOW TPS54310 EVM LAYOUT

TEXAS INSTRUMENTS, INC.
12500 TI BLVD
DALLAS, TEXAS 75243

POWER

FB16
FERRITE

FB17
FERRITE

FB10
FERRITE

C155
C247
22uF

0.1uF

FB18
FERRITE

FB19
FERRITE

CH4_PLL_VDD

C199

C158
C250
22uF

1uF

0.1uF

TP26

TP29

TP32

TP35

D3.3V

D5V

DSP_CVDD

TP

TP

TP

TP

1

1

TP27

TP30

TP

TP

TP

TP

1

1

TP28

TP31

TP

TP

TP

TP

1

1

TP38

TP

TP

TP

TP

TP

1

TP33
TP

1

TP34
TP

1

TP

1

1

TP36

TP39

TP

TP

TP

TP

TP

1

1

TP37

TP40

TP

TP

TP

TP

TP

1

1

D

C

B

A

RESET ON POWER UP

Size FCSM No. DWG No. Rev
D 1

1 2 3 4 5 6 7 8

Scale Sheet

7 of 17

54321

6

D

D

D5VD5V D5V D5V

P5

30

5V

29

5V

28

GND

27

GND

26

GND

C

SCL
SDA

25

SCL/PHI_ACK

24

SDA/PHI_RWW

23

PHI_DS/RD

22

PHI_CS

21

PHI_A1

20

PHI_A0

19

PHI_D7

18

PHI_D6

17

PHI_D5

16

PHI_D4

15

PHI_D3

14

PHI_D2

13

PHI_D1

12

PHI_D0

11

GND

10

CLK5/M1

9

FPDAT/VSYA/M2

8

FFRSTW/CBFLAG

7

FSY/HC/HSYA/~BLNK

6

VGAV/SYNC_T

5

FFIE/CCVALID

4

FFWE/DVALID

3

FFRSTWIN/~SCLK

2

FFRE/DIG_H

1

FFOE/DIG_V

60

5V

59

5V

58

GND

57

GND

56

GND

55

AMXCLK

54

ALRCLK

53

ASCLK

52

AMCLK

51

GND

50

GPIO7

49

GPIO6

48

GPIO5

47

GPIO4

46

GND

45

GPIO3

44

GPIO2

43

GPIO1

42

GPIO0

41

INTREQ

40

GPCL

39

GND

38

ITRDY

37

SOGOUT

36

VACTIVE

35

D_SCLK

34

D_RDY

33

D_PREF

32

D_HS

31

D_VS

/RESET
ENC_HS ENC_VS

90

5V

89

GND

88

GND

87

RCr9

86

RCr8

85

RCr7

84

RCr6

83

RCr5

82

RCr4

81

RCr3

80

RCr2

79

RCr1

78

RCr0

77

GND

76

D9

75

D8

74

D7

73

D6

72

D5

71

D4

70

D3

69

D2

68

D1

67

D0

66

GND

65

RESET

64

PALI

63

HSYNC

62

0

R98

AVID

61

PREF

ENC_C[7..0]

ENC_Y[7..0]

ENC_C[7..0]

ENC_Y[7..0]

ENC_FID

ENC_SCLK

ENC_C7
ENC_C6
ENC_C5
ENC_C4
ENC_C3
ENC_C2
ENC_C1
ENC_C0

ENC_Y7
ENC_Y6
ENC_Y5
ENC_Y4
ENC_Y3
ENC_Y2
ENC_Y1
ENC_Y0

R99 0
R100

120

5V

119

GND

118

GND

117

BCb9

116

BCb8

115

BCb7

114

BCb6

113

BCb5

112

BCb4

111

BCb3

110

BCb2

109

BCb1

108

BCb0

107

GND

106

GY9

105

GY8

104

GY7

103

GY6

102

GY5

101

GY4

100

GY3

99

GY2

98

GY1

97

GY0

96

GND

95

FID

94

0

GLCO

93

VSYNC

92

PCLK

91

SCLK

C

SAMTEC_TMMS_120PIN_M_RA

B

TEXAS INSTRUMENTS, INC.

A

12500 TI BLVD
DALLAS, TEXAS 75243

B

A

CONNECTOR

Size FCSM No. DWG No. Rev
C 1

Scale Sheet

16 of 17

1 2 3 4 5 6

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