Texas instruments TUSB9260 Data Manual

TUSB9260

USB 3.0 TO SATA BRIDGE

Data Manual

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Literature Number: SLLS962C

December 2009–Revised July 2010

TUSB9260

SLLS962C–DECEMBER 2009–REVISED JULY 2010

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Contents

1 MAIN FEATURES ................................................................................................................ 5

1.1 TUSB9260 Features ........................................................................................................ 5

1.2 Target Applications ......................................................................................................... 5

2 INTRODUCTION .................................................................................................................. 6

2.1 System Overview ........................................................................................................... 6

2.2 Device Block Diagram ...................................................................................................... 6

3 OPERATION ....................................................................................................................... 8

3.1 General Functionality ....................................................................................................... 8

3.2 Firmware Support ........................................................................................................... 9

3.3 GPIO/PWM LED Designations ............................................................................................ 9

3.4 Power Up and Reset Sequence ......................................................................................... 10

4 SIGNAL DESCRIPTIONS ..................................................................................................... 11

5 CLOCK CONNECTIONS ...................................................................................................... 15

5.1 Clock Source Requirements ............................................................................................. 15

5.2 Clock Source Selection Guide ........................................................................................... 15

5.3 Oscillator .................................................................................................................... 16

5.4 Crystal ....................................................................................................................... 16

6 ELECTRICAL SPECIFICATIONS .......................................................................................... 17

6.1 Absolute Maximum Ratings .............................................................................................. 17

6.2 Recommended Operating Conditions .................................................................................. 17

6.3 DC Electrical Characteristics for 3.3-V Digital I/O ..................................................................... 17

7 POWER CONSUMPTION ..................................................................................................... 18

TUSB9260

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SLLS962C–DECEMBER 2009–REVISED JULY 2010

List of Figures

2-1 Device Block Diagram............................................................................................................. 7

5-1 Typical Crystal Connections .................................................................................................... 15

TUSB9260

SLLS962C–DECEMBER 2009–REVISED JULY 2010

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List of Tables

3-1 GPIO/PWM LED Designations................................................................................................... 9

4-1 I/O Definitions..................................................................................................................... 11

4-2 Clock and Reset Signals ........................................................................................................ 11

4-3 SATA Interface Signals.......................................................................................................... 11

4-4 USB Interface Signals ........................................................................................................... 12

4-5 Serial Peripheral Interface (SPI) Signals...................................................................................... 12

4-6 JTAG, GPIO, and PWM Signals ............................................................................................... 13

4-7 Power and Ground Signals ..................................................................................................... 14

5-1 Oscillator Specification .......................................................................................................... 16

5-2 Crystal Specification ............................................................................................................. 16

7-1 SuperSpeed USB Power Consumption ....................................................................................... 18

7-2 High Speed USB Power Consumption ........................................................................................ 18

TUSB9260

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SLLS962C–DECEMBER 2009–REVISED JULY 2010

USB 3.0 TO SATA BRIDGE

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1 MAIN FEATURES

1.1 TUSB9260 Features

• Universal Serial Bus (USB) – SuperSpeed USB 3.0 Compliant - TID 340000007

• Integrated Transceiver Supports SS/HS/FS Signaling

– Best in Class Adaptive Equalizer

• Allows for Greater Jitter Tolerance in the Receiver

– USB Class Support

• USB Attached SCSI Protocol (UASP)

• USB Mass Storage Class Bulk-Only Transport (BOT)

• Support for Error Conditions Per the 13 Cases (Defined in the BOT Specification)

• USB Bootability Support

• USB Human Interface Device (HID)

– Supports Firmware Update Via USB, Using a TI Provided Application

• SATA Interface – Serial ATA Specification Revision 2.6

• gen1i, gen1m, gen2i, and gen2m

– Support for Mass-Storage Devices Compatible With the ATA/ATAPI-8 Specification

• Integrated ARM Cortex M3 Core – Customizable Application Code Loaded From EEPROM Via SPI Interface – Two Additional SPI Port Chip Selects for Peripheral Connection – Up to 12 GPIOs for End-User Configuration

• 2 GPIOs Have PWM Functionality for LED Blink Speed Control

– Serial Communications Interface for Debug (UART)

• General Features – Can Operate from Either a Single Low Cost Crystal or Clock Oscillator

• Supports 40 MHz

– A JTAG Interface is Used for IEEE1149.1 and IEEE1149.6 Boundary Scan – Available in a Fully RoHS Compliant Package

1.2 Target Applications

• External HDD/SSD

• External DVD

• External CD

• HDD-Based Portable Media Player

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SATA

Gen1/2

TUSB9260

HDD

USB 3.0

SuperSpeed

(1)

USB 2.0

High-speed

(1)

with

USB 3.0

Support

(1) USB connection is made at either SuperSpeed or High-Speed depending on the upstream connection support.

TUSB9260

SLLS962C–DECEMBER 2009–REVISED JULY 2010

2 INTRODUCTION

2.1 System Overview

The TUSB9260 is an ARM cortex M3 microcontroller based USB 3.0 to serial ATA bridge. It provides the necessary hardware and firmware to implement a USB attached SCSI protocol (UASP) compliant mass storage device suitable for bridging hard disk drives (HDD), solid state disk drives (SSD), optical drives and other compatible SATA 1.5-Gbps or SATA 3.0-Gbps devices to a USB 3.0 bus. In addition to UASP support, the firmware implements the mass storage class bulk-only transport (BOT), and USB human in-terface device (HID) interfaces.

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2.2 Device Block Diagram

The major functional blocks are as follows:

• Cortex M3 microcontroller subsystem including the following peripherals: – Time interrupt modules, including watchdog timer – Universal asynchronous receive/transmit (SCI) – Serial peripheral interface (SPI) – General purpose input/output (GPIO) – PWM for support of PWM outputs (PWM)

• USB 3.0 core (endpoint controller) and integrated SuperSpeed PHY

• AHCI compliant SATA controller and integrated SATA PHY – Supporting gen1i, gen1m, gen2i, and gen2m

• Chip level clock generation and distribution

• Support for JTAG 1149.1 and 1149.6

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ROM

RAM

ARM

Cortex M3

Power

and

Reset

Distribution

JTAG

Clock

Generation

TCK TMS TDO

TDI TRST

SCI

(UART)

Watchdog

SPI

Timer

GPIO PWM

Timer

Data Path

RAM

80 kB

TX+

TX-

ARX+

ARX-

SATA II

PHY

USB SS

PHY

USB HS/FS

PHY

SATA AHCI

USB 3.0

Device

Controller

SSTX+

SSTX-

SSRX+

SSRX-

VBUS

VDD3.3

VDD1.8

VDD1.1

DATA_OUT

DATA_IN

CS[2:0]

GPIO[11:0]

PWM[1:0]

DP/DM

USB_R1

USB_R1RTN

GRSTz

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Figure 2-1. Device Block Diagram

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