Texas Instruments TUSB2040AN, TUSB2040APT Datasheet

TUSB2040A

4-PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

D

Universal Serial Bus (USB) Version 1.0
Compliant

D

Integrated USB Transceivers

D

Four Downstream Ports

D

Two Power Source Modes

– Self-Powered Mode
– Bus-Powered Mode

D

Power Switching and Overcurrent
Reporting is Provided Ganged or Per Port

D

All Downstream Ports Support Full-Speed
and Low-Speed Operations

D

Supports Suspend and Resume Operations

D

Pin-to-Pin Compatible with the TUSB2040
Device when EXTMEM Pin is Low

D

Supports Programmable Vendor ID and
Product ID With External Serial EEPROM

D

Tri-State EEPROM Interface Allows
EEPROM Sharing

D

Available in 28-Pin DIP and 48-Pin TQFP
Packages

D

3.3-V Operation

description

The TUSB2040A hub is a 3.3-V CMOS device
that provides up to four downstream ports in
compliance with the USB specification 1.0
version. Pin 21 (EXTMEM) enables or disables
the EEPROM interface. When EXTMEM is low,
the TUSB2040A is functionally equivalent to the
TUSB2040 hub and the product ID (PID)
displayed during enumeration is General Purpose
USB Hub. For this configuration, pins 9 and 10 are
the BUSPWR
respectively.

If programmable vendor ID(VID) and product
ID(PID) descriptors are desired, pin 21 must be
high (EXTMEM = 1) and a SGS Thompson
M93C46 or equivalent EEPROM must be
connected to pins 9 and 10. For this configuration,
the values for BUSPWR
in the EEPROM and pins 9 and 10 become the
EEPROM interface.

and GANGED input pins,

and GANGED are stored

N PACKAGE

(TOP VIEW)

OVRCUR2

PWRON1

OVRCUR1

GND

BUSPWR

/SCL

GANGED/SDA

DP0

1

DM0

2

GND

3

NC

4

NC

5

DP1

6

DM1

7

NC

8

NC
BUSPWR
GANGED/SDA

†

JEDEC descriptor S–PQFP–G for thin quad flatpack (TQFP)

/SCL

NC

9
10
11
12

1
2
3

DP0

4

DM0

5
6

DP1

7

DM1

8
9
10

DP2

11

DM2

12

V

13

CC

14

DP3

PT PACKAGE

(TOP VIEW)

PWRON1

OVRCUR1

OVRCUR2NCPWRON2

46

474845

13141516172418

CC

DM2

NC

V

DP2

4443424140

NC

28
27
26
25
24
23
22
21
20
19
18
17
16
15

NC

DP3

NC

19

DM3

PWRON2
V

CC

OVRCUR3
PWRON3
GND
XT AL1
XT AL2
EXTMEM
PWRON4
OVRCUR4
RESET
DM4
DP4
DM3

CC

NC

OVRCUR3

NC

V

393837

202122

NC

NC

SUSPND

23

DP4

PWRON3

36
35
34
33
32
31
30
29
28
27
26
25

DM4

GND
XTAL1
XTAL2
NC
EXTMEM
NC
NC
PWRON4
NC
OVRCUR4
NC
RESET

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

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Copyright  1998, Texas Instruments Incorporated

1

TUSB2040A
4-PORT HUB FOR THE UNIVERSAL SERIAL BUS
WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

description (continued)

The TUSB2040A supports bus-power and self-power modes. The power switching to the downstream ports can
either be controlled individually or ganged using external devices to switch power and to detect overcurrent
conditions. Outputs from the external power devices provide overcurrent inputs to the TUSB2040A OVRCUR
pins and in the case of an overcurrent condition, the corresponding PWRON pins will be disabled by the
TUSB2040A. In the GANGED operation, all PWRON
can be used.

The hub requires a 48-MHz clock signal to sample data from the upstream port and generate a synchronized
12-MHz USB clock signal. The hub supports the flexibility to use any device that generates a 48-MHz clock.
Because the majority of oscillators are active devices, the low power suspend mode of the TUSB2040A will not
function because there is no way to stop the oscillator from driving the internal clock. An oscillator with a TTL
output not exceeding 3.6 V can be used by connecting its output to the XT AL1 terminal and leaving the XT AL2
terminal open. For crystal or resonator implementations, use the XTAL1 terminal as the input and the XTAL2
terminal as the feedback path. Because the crystal is required to resonate at 48 MHz, a tuning circuit as shown
in Figure 8 may be required.

The upstream port and all downstream ports are USB-compliant transceivers. Every downstream port supports
both full-speed and low-speed connections by automatically setting the slew rate according to the speed of the
device attached to the port.

signals transition simultaneously , and any OVRCUR input

2

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functional block diagram

Hub Repeater

DP0 DM0

45

USB

Transceiver

Suspend/Resume

Logic and

Frame Timer

TUSB2040A

4-PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

23

XTAL1

OSC

SIE

22

18

21

XTAL2

RESET

EXTMEM

Port 1

Logic

Port 4

Logic

USB

Transceiver

16 17 7 8

DP4 DM4 DP1 DM1

NOTE: Terminal numbers shown are for the N package.

USB

Transceiver

SIE Interface

Logic

Hub/Device

Command

Decoder

Hub

Power

Logic

3, 1, 26, 19

2, 28, 25, 20

Serial

10

EEPROM

Interface

OVRCUR1 – OVRCUR4

PWRON1 – PWRON4

GANGED/SDA

9

BUSPWR

/SCL

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3

TUSB2040A

I/O

DESCRIPTION

4-PORT HUB FOR THE UNIVERSAL SERIAL BUS
WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

Terminal Functions

TERMINAL

NAME NPT

BUSPWR/SCL 9 10 I/O Power source input/EEPROM serial clock. When EXTMEM is low, BUSPWR/SCL is an active

DM0 5 2 I/O Root port USB differential data minus. DM0 paired with DP0 constitutes the upstream USB port.
DM1 – DM4 8, 12,

DP0 4 1 I/O Root port USB differential data plus. DP0 paired with DM0 constitutes the upstream USB port.
DP1 – DP4 7, 11,

GANGED/SDA 10 11 I/O Power switching and overcurrent detection mode/EEPROM serial data I/O. When EXTMEM is

GND 6, 24 3, 36 Ground. GND terminals must be tied to ground for proper operation.
EXTMEM 21 32 I EEPROM read enable. When EXTMEM is low, it disables the serial EEPROM interface of the

OVRCUR1 –
OVRCUR4

PWRON1 –
PWRON4

RESET 18 25 I Reset. RESET is an active low TTL input with hysteresis and must be asserted at power up. When

SUSPND 20 O Suspend status. SUSPND is an active high output that is available for external logic power down

V

CC

XTAL1 23 35 I Crystal 1. XTAL1 is a 48-MHz crystal input with 50% duty cycle. Operation at 48-MHz is four times

XTAL2 22 34 O Crystal 2. XTAL2 is a 48-MHz crystal output. Operation at 48-MHz is four times the USB full-speed

15, 17

14, 16

3, 1,

26, 19

2, 28,
25, 20

13, 27 15, 41 3.3-V supply voltage

7, 14,

19, 24

6, 13,

18, 23

48, 46,

38, 27

47, 44,

37, 29

low input that indicates whether the ports and the hub derive power from the bus or the local
supply. When EXTMEM is high, BUSPWR
EEPROM with a 100 µA internal pulldown. This standard TTL input must not change dynamically
during operation.

I/O USB differential data minus. DM1 – DM4 paired with DP1 – DP4 support up to four downstream

USB ports.

I/O USB differential data plus. DP1 – DP4 paired with DM1 – DM4 support up to four downstream

USB ports.

low, GANGED/SDA selects between gang or per port switching for the overcurrent detection of
the downstream ports. When EXTMEM is high, GANGED/SDA acts as a tri-state serial data I/O
to and from the EEPROM with a 100 µA internal pull-down. This standard TTL input must not
change dynamically during operation.

device. Pins 9 and 10 are configured as BUSPWR
is high, it enables the serial EEPROM interface and pins 9 and 10 are configured as SCL and
SDA, respectively.

I Overcurrent indicators. OVRCUR1 – OVRCUR4 are active low, standard TTL inputs. One

overcurrent indicator is available for each of the four downstream ports. In GANGED mode, one
implementation is to tie these inputs together . Alternatively , one OVRCUR
with the remaining OVRCUR

O Power-on/-off control signals. PWRON1 – PWRON4 are active low, open-drain outputs. One

power-on/-off control switch is used for each of the four downstream ports. In GANGED mode,
all outputs are switched together.

RESET

is asserted, it initializes all logic.

operations. During the SUSPEND mode, SUSPND is high. SUSPND is low for normal operation.

the USB full-speed bit rate of 12 Mbps.

bit rate of 12 Mbps. This terminal is left open when using an oscillator.

pins tied to VCC.

/SCL acts as a tri-state serial clock output to the

and GANGED, respectively. When EXTMEM

input pin may be used

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V
Input voltage range, V
Output voltage range, V
Input clamp current, I
Output clamp current, I
Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage levels are with respect to GND.

4

(see Note 1) –0.5 V to 3.8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

–0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

–0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

, (VI < 0 V or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

, (VO < 0 V or V

OK

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

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> VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

†

VOHHigh-level output voltage

USB data lines

V

USB data lines

V

Positi

V

N

V

I

(V

VT–)

IOZHigh-impedance output current

ICCInput supply current

TUSB2040A

4-PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

recommended operating conditions

MIN NOM MAX UNIT

Supply voltage, V
Input voltage, TTL/LVCMOS, V
Output voltage, TTL/LVCMOS, V
High-level input voltage, signal-ended receiver, V
Low-level input voltage, signal-ended receiver, V
High-level input voltage, TTL/LVCMOS, V
Low-level input voltage, TTL/LVCMOS, V
Operating free-air temperature, T

External series, differential driver resistor, R
Operating (dc differential driver) high speed mode, f
Operating (dc differential driver) low speed mode, f
Common mode, input range, differential receiver , V
Input transition times, tt, TTL/LVCMOS 0 6 ns

CC

I

O

IH(REC)

IL(REC)

IH(TTL)

IL(TTL)

A

(DRV)

(OPRH)
(OPRL)
(ICR)

electrical characteristics over recommended ranges of operating free-air temperature and supply
voltage (unless otherwise noted)

3 3.3 3.6 V
0 V
0 V
2 V

2 V

0 70 °C

22 (–5%) 22 (+5%) Ω

0.8 2.5 V

CC
CC
CC

0.8 V
CC

0.8 V

12 Mb/s

1.5 Mb/s

V
V
V

V

PARAMETER TEST CONDITIONS MIN MAX UNIT

p

V

OL

IT+

IT–

hys

I

IL

I

IH

z

o(DRV)

V

ID

†

Applies for input buffers with hysteresis

‡

Applies for open drain buffers

Low-level output voltage

ve input threshold voltage

egative-input threshold voltage

nput hysteresis†

p

Low-level input current TTL/L VCMOS VI = GND –1 µA
High-level input current TTL/LVCMOS VI = V

Driver output impedance USB data lines Static VOH or V
Differential input voltage USB data lines 0.8 V ≤ V

p

pp

T+

p

–

R

= 15 kΩ, to GND 2.8 3.6

(DRV)

IOH = –12 mA (without R

TTL/LVCMOS IOL = 4 mA 0.5

R

= 1.5 k Ω to 3.6 V 0.3

(DRV)

IOL = 12 mA (without R
TTL/LVCMOS 2 V
Single-ended
TTL/LVCMOS 0.8 V
Single-ended
TTL/LVCMOS 0.25 0.7 V
Single-ended 0.8 V ≤ V
TTL/LVCMOS V = VCC or GND‡ ±10 µA
USB data lines 0 V ≤ VO ≤ V

0.8 V ≤ V

0.8 V ≤ V

Normal operation 100 mA

Suspend mode 1 µA

≤ 2.5 V 1.8 V

ICR

≤ 2.5 V 1 V

ICR

≤ 2.5 V 300 500 mV

ICR

CC

CC

OL

≤ 2.5 V 0.2 V

ICR

) VCC –

(DRV)

) 0.5

(DRV)

7.1 19.9 Ω

0.5

±10 µA

1 µA

V

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5

TUSB2040A
4-PORT HUB FOR THE UNIVERSAL SERIAL BUS
WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

differential driver switching characteristics over recommended ranges of operating free-air
temperature and supply voltage, C

full speed mode

PARAMETER TEST CONDITIONS MIN MAX UNIT

t

r

t

f

t

(RFM)

V

O(CRS)

low speed mode

t

r

t

f

t

(RFM)

V

O(CRS)

Transition rise time for DPor DM See Figure 1 and Figure 2 4 20 ns
Transition fall time for DPor DM See Figure 1 and Figure 2 4 20 ns
Rise/fall time matching (tr/tf) x 100 90 110 %
Signal crossover output voltage 1.3 2.0 V

PARAMETER TEST CONDITIONS MIN MAX UNIT

Transition rise time for DPto DM CL = 50 pF to 350 pF, See Figure 1 and Figure 2 75 300 ns
Transition fall time for DPto DM CL = 50 pF to 350 pF, See Figure 1 and Figure 2 75 300 ns
Rise/fall time matching (tr/tf) x 100 80 120 %
Signal crossover output voltage CL = 50 pF to 350 pF 1.3 2.0 V

= 50 pF unless otherwise noted (see Figures 1 and 2)

L

DM

DP

DP

DM

Characterization

measurement point

22 Ω

15 kΩ

22 Ω

15 kΩ

V(

TERM)

Full

C

L

Low

C

L

Figure 1. Differential Driver Switching Load

10%

90%

t

r

90%

10%

Figure 2. Differential Driver Timing Waveforms

= 2.8 V

1.5 kΩ

t

f

V

OH

V

OL

6

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