TEXAS INSTRUMENTS TUSB1105, TUSB1106 Technical data

TUSB1105 , TUSB1106

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FEATURES

• Compatible With Universal Serial Bus Specification Rev. 2.0 • IEC-61000-4-2 ESD Compliant

• Transmit and Receive Serial Data at Both – ± 9-kV Contact-Discharge Model Full-Speed (12-Mbit/s) and Low-Speed (D+, D – , V (1.5-Mbit/s) Data Rates

• Integrated Bypassable 5-V to 3.3-V Voltage (D+, D – , V Regulator for Powering Via USB VBUS

• VBUS Disconnection Indication Through VP (QFN) Package; TUSB1106 Available in QFN and VM and Thin Shrink Small-Outline Package

• Used as USB Device Transceiver or USB Host Transceiver

• Stable RCV Output During SE0 Condition

• Two Single-Ended Receivers With Hysteresis

• Low-Power Operation, Ideal for Portable

Equipment

DESCRIPTION/ORDERING INFORMATION

The TUSB1105 and TUSB1106 universal serial bus (USB) transceivers are compliant with the Universal Serial Bus Specification Rev. 2.0. These devices can transmit and receive serial data at both full-speed (12-Mbit/s) and low-speed (1.5-Mbit/s) data rates. The TUSB1105 and TUSB1106 can be used as USB device transceivers or USB host transceivers.

The devices allow USB application-specific ICs (ASICs) and programmable logic devices (PLDs), with power-supply voltages from 1.65 V to 3.6 V, to interface with the physical layer (PHY) of the universal serial bus. They have an integrated 5-V to 3.3-V voltage regulator for direct powering via the USB supply VBUS.

The TUSB1105 allows single-ended and differential input modes selectable by a mode (MODE) input and is available in RGT and RTZ packages. The TUSB1106 allows only differential input mode and is available in PW, RGT, RSV, and RTZ packages.

The TUSB1105 and TUSB1106 are ideal for portable electronic devices, such as mobile phones, personal digital assistants, information appliances, and digital still cameras.

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

• Support I/O Voltage Range From 1.65 V to

3.6 V

– ± 15-kV Human-Body Model

• TUSB1105 Available in Quad Flat No-Lead

(TSSOP)

APPLICATIONS

• Mobile Phones

• Personal Digital Assistants (PDAs)

• Information Appliances (IAs)

• Digital Still Cameras (DSCs)

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

)

CC(5.0)

)

CC(5.0)

ORDERING INFORMATION

QFN – RGT Reel of 3000

– 40 ° C to 85 ° C QFN – RTZ Reel of 1000

QFN – RSV Reel of 3000 TUSB1106RSVR PREVIEW TSSOP – PW Reel of 2000 TUSB1106PWR TU1106

(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging . (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com .

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

PACKAGE

(1) (2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

TUSB1105RGTR ZYB TUSB1106RGTR ZYC TUSB1105RTZR ZYB TUSB1106RTZR ZYC

www.ti.com

−

D+

MODE

SUSPND

VPO/VO

VMO/FSE0

GND

(exposed die pad)

C C (I/O)

5 6

SPEED

RCV

pu(3.3)

SOFTCON

CC(5.0)

reg(3.3)

SOFTCON

pu(3.3)

RCV

−

SPEED

CC(I/O)

VPO/VO

SUSPN D

MO DE

CC(5.0)

reg(3.3)

VMO/F SE0

141516

876

GND

(exposed die pad)

−

D+

GND

SUSPND

VPO

VMO

No Connect

C C(I /O )

5 6

SPEED

RCV

pu(3.3)

SOFTCON

CC(5.0)

reg(3.3)

SOFTCON

pu(3.3)

RCV

−

SPEED

CC(I/O)

VPO

SUSPND

GN D

CC(5.0)

reg(3.3)

VM O

141516

876

SOFTCON

PU(3.3)

RCV

D-

D+

VPO

VMO

SUSPND

GND

CC(I/O)

SPEED

CC(5.0)

reg(3.3)

pu(3.3)

SOFTCO N

RCV

SUSPN D

GN D

CC ( I /O )

SPE E D

−

VPO

VMO

reg(3.3)

CC(5.0 )

TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

TUSB1105 PACKAGES

RGT PACKAGE RTZ PACKAGE

(BOTTOM VIEW) (BOTTOM VIEW)

TUSB1106 PACKAGES

RGT PACKAGE RTZ PACKAGE

(BOTTOM VIEW) (BOTTOM VIEW)

RSV PACKAGE PW PACKAGE

(BOTTOM VIEW) (TOP VIEW)

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

M B L 30 1

CC(I/O)

SOFTCON

SPEED

VMO/FSE0

(B)

VPO/VO

(B)

MODE

(C)

SUSPND

RCV

Level

Shifter

Voltage

Regulator

GND

33  (1%)

3.3 V

pu(3.3)

reg(3.3)

CC(5.0)

1.5 kΩ

(A)

D+ D–

TUSB1105 TUSB1106

–

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

FUNCTIONAL BLOCK DIAGRAM

TUSB1105 , TUSB1106

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

A. Connect to D – for low-speed operation and to D+ for high-speed operation. B. Pin function depends on device type. C. TUSB1105 only

TERMINAL FUNCTIONS

TERMINAL

(1)

NAME

TUSB1105 TUSB1106

PIN NO. PIN NO.

RGT RTZ PW RTZ

OE 1 1 3 1 I the transceiver to transmit data on the USB bus input pad. Push pull,

RCV 2 2 4 2 O

VP 3 3 5 3 O

VM 4 4 6 4 O

SUSPND 5 5 7 5 I low-power state while the USB bus is inactive and drives output RCV to a

MODE 6 6 I

(1) Terminal names with an overscore (e.g., NAME) indicate active LOW signals.

I/O DESCRIPTION

Output enable (CMOS level with respect to V

, active LOW). Enables

CC(I/O)

CMOS. Differential data receiver (CMOS level with respect to V

when input SUSPND is HIGH. The output state of RCV is preserved and

CC(I/O)

stable during an SE0 condition output pad. Push pull, 4-mA output drive, CMOS.

Single-ended D+ receiver (CMOS level with respect to V). For external detection of single-ended zero (SE0), error conditions, speed of connected device. Driven HIGH when no supply voltage is connected to V V

output pad. Push pull, 4-mA output drive, CMOS.

reg(3.3)

Single-ended D – receiver (CMOS level with respect to V external detection of single-ended zero (SE0), error conditions, speed of

CC(I/O)

connected device. Driven HIGH when no supply voltage is connected to V

and V

CC(5.0)

Suspend (CMOS level with respect to V

output pad. Push pull, 4-mA output drive, CMOS.

reg(3.3)

). A HIGH level enables

CC(I/O)

LOW-level input pad. Push pull, CMOS. Mode (CMOS level with respect to V

differential input mode (VPO, VMO), whereas a LOW level enables a

). A HIGH level enables the

CC(I/O)

single-ended input mode (VO, FSE0). See Table 5 and Table 6 input pad. Push pull, CMOS.

). Driven LOW

CC(5.0)

). For

and

Product Folder Link(s): TUSB1105 TUSB1106

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TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

TERMINAL FUNCTIONS (continued)

TERMINAL

(1)

NAME

TUSB1105 TUSB1106

PIN NO. PIN NO.

RGT RTZ PW RTZ

GND Die pad Die pad 8 6 Ground supply

CC(I/O)

7 7 9 7

SPEED 8 8 10 8 I Input pad, push pull, CMOS.

D – 9 9 11 9 AI/O

D+ 10 10 12 10 AI/O VPO/VO 11 11 I Driver data (CMOS level with respect to V

VPO 13 11

VMO/FSE0 12 12 I Driver data (CMOS level with respect to V

VMO 14 12

reg(3.3)

CC(5.0)

pu(3.3)

13 13 15 13

14 14 16 14 connected directly to USB supply VBUS regulator bypass option. Connect

15 15 1 15

SOFTCON 16 16 2 16 I

(2) TUSB1105 ground terminal is connected to the exposed die pad (heat sink). The package die pad is open on the TUSB1106.

I/O DESCRIPTION

(2)

Supply voltage for digital I/O pins (1.65 to 3.6 V). When V connected, the D+ and D – pins are in 3-state. This supply pin is independent of V voltage.

and V

CC(5.0)

and must never exceed the V

reg(3.3)

Speed selection (CMOS level with respect to V of differential data outputs D+ and D – according to the transmission speed.

LOW – low speed (1.5 Mbit/s) HIGH – full speed (12 Mbit/s)

Negative USB data bus connection (analog, differential). For low-speed mode, connect to pin V

via a 1.5-k Ω resistor.

pu(3.3)

Positive USB data bus connection (analog, differential). For full-speed mode, connect to pin V

via a 1.5-k Ω resistor.

pu(3.3)

Driving Function Table (pin OE = L) using single-ended input data interface for TUSB1105 (pin MODE = L), and Driving Function Table (pin OE = L) using differential input data interface for TUSB1105 (pin MODE = H) and TUSB1106 input pad. Push pull, CMOS.

Internal regulator option. Regulated supply-voltage output (3 V to 3.6 V) during 5-V operation. A decoupling capacitor of at least 0.1 mF is required for the regulator bypass option. Used as a supply-voltage input for

3.3 V ± 10% operation. Internal regulator option. Supply-voltage input (4 V to 5.5 V). Can be

to V

reg(3.3)

Pullup supply voltage (3.3 V ± 10%). Connect an external 1.5-k Ω resistor on D+ (full speed) or D – (low speed). Pin function is controlled by input SOFTCON. SOFTCON = LOW – V current SOFTCON = HIGH – V

floating (high impedance), ensures zero pullup

pu(3.3)

= 3.3 V, internally connected to V

pu(3.3)

Software-controlled USB connection. A HIGH level applies 3.3 V to pin V

, which is connected to an external 1.5-k Ω pullup resistor. This allows

pu(3.3)

USB connect/disconnect signaling to be controlled by software input pad. Push pull, CMOS.

CC(I/O)

, Schmitt trigger). See

CC(I/O)

, Schmitt trigger). See

CC(I/O)

is not

CC(I/O)

reg(3.3)

). Adjusts the slew rate

reg(3.3)

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

TUSB1105 , TUSB1106

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

FUNCTIONAL DESCRIPTION

Function Selection

FUNCTION TABLE

SUSPND OE D+, D – RCV VP, VM FUNCTION

L L Driving and receiving Active Active Normal driving (differential receiver active)

L H Receiving H L Driving Inactive H H High-Z

(1) Signal levels on D+ and D – are determined by other USB devices and external pullup/pulldown resistors. (2) In suspend mode (SUSPND = HIGH) the differential receiver is inactive and output RCV is always LOW. Out of suspend (K), signaling is

detected via the single-ended receivers VP and VM.

(3) During suspend, the slew-rate control circuit of low-speed operation is disabled. The D+ and D – lines are still driven to their intended

states, without slew-rate control. This is permitted because driving during suspend is used to signal remote wakeup by driving a K signal (one transition from idle to K state) for a period of 1 ms to 15 ms.

Operating Functions

(1)

Active Active Receiving

(2) (2)

Inactive

Active Driving during suspend Active Low-power state

FUNCTION TABLES

xxx

Driving Function (Pin OE = L)

Using Single-Ended Input Data Interface

for TUSB1105 (Pin MODE = L)

FSE0 VO DATA

L L Differential logic 0 J K

L H Differential logic 1 K J H L SE0 X X H H SE0 X X

LOW SPEED FULL SPEED

DATA STATE

(3)

(differential receiver inactive)

Driving Function (Pin OE = L)

Using Differential Input Data Interface

for TUSB1105 (Pin MODE = H) and TUSB1106

VMO VPO DATA

L L SE0 X X

H L Differential logic 0 J K

L H Differential logic 1 K J

H H Illegal state X X

LOW SPEED FULL SPEED

DATA STATE

Product Folder Link(s): TUSB1105 TUSB1106

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TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Receiving Function (Pin OE = H)

D+, D – RCV VP

Differential logic 0

Differential logic 1

SE0 RCV*

(1) VP = VM = H indicates the sharing mode (V

disconnected).

(2) RCV* denotes the signal level on output RCV just before SE0 state

occurs. This level is stable during the SE0 period.

L L H J K

H H L K J

(2)

(1)

L L X X

(1)

Power-Supply Configurations

The TUSB1105/1106 can be used with different power-supply configurations, which can be dynamically changed. An overview is given in Table 2 .

• Normal mode – Both V connected to a 5-V source (4 V to 5.5 V). The internal voltage regulator then produces 3.3 V for the USB connections. For 3.3-V operation, both V V

is independently connected to a voltage source (1.65 V to 3.6 V), depending on the supply voltage of

CC(I/O)

the external circuit.

• Disable mode – V

CC(I/O)

internal circuits of the TUSB1105 and TUSB1106 ensure that the D+ and D – pins are in 3-state and the power consumption drops to the low-power (suspended) state level. Some hysteresis is built into the detection of V

• Sharing mode – V

lost.

CC(I/O)

pins are made 3-state and the TUSB1105 and TUSB1106 allow external signals of up to 3.6 V to share the D+ and D – lines. The internal circuits of the TUSB1105 and TUSB1106 ensure that virtually no current (maximum 10 µ A) is drawn via the D+ and D – lines. The power consumption through V low-power (suspended) state level. Both the VP and VM pins are driven HIGH to indicate this mode. Pin RCV is made LOW. Some hysteresis is built into the detection of V

and V

CC(I/O)

CC(5.0)

is not connected, V

is connected, (V

or (V

CC(5.0)

and V

reg(3.3)

or (V

CC(5.0)

) are not connected. In this mode, the D+ and D –

reg(3.3)

DATA STATE

LOW FULL

SPEED SPEED

and V

CC(5.0)

are

reg(3.3)

) are connected. For 5-V operation, V

are connected to a 3.3-V source (3 V to 3.6 V).

reg(3.3)

and V

lost.

) are connected. In this mode, the

reg(3.3)

CC(I/O)

drops to the

CC(5.0)

Table 1. Pin States in Disable or Sharing Mode

PINS DISABLE-MODE STATE SHARING-MODE STATE

CC(5.0)

CC(I/O)

pu(3.3)

D+, D – High impedance High impedance VP, VM Invalid

RCV Invalid

Inputs (VO/VPO, FSE0/VMO, SPEED,

(2)

MODE

(1) High impedance or driven LOW (2) TUSB1105 only

, SUSPND, OE, SOFTCON)

reg(3.3)

5-V input/3.3-V output, 3.3-V input/3.3-V input Not present Not present 1.65-V to 3.6-V input High impedance (off) High impedance (off)

High impedance High impedance

Table 2. Power-Supply Configuration Overview

or V

CC(5.0)

Connected Connected Normal mode Connected Not connected Disable mode

Not connected Connected Sharing mode

(1) High impedance or driven LOW

reg(3.3)

CC(I/O)

(1) (1)

CONFIGURATION SPECIAL CHARACTERISTICS

H L

D+, D – , and V VP, VM, and RCV are invalid.

D+, D – , and V VP and VM are driven HIGH. RCV is driven LOW.

are in high impedance.

pu(3.3)

are in high impedance.

pu(3.3)

(1)

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

TUSB1105 , TUSB1106

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Power-Supply Input Options

The TUSB1105 and TUSB1106 have two power-supply input options.

• Internal regulator – V circuitry with 3.3 V (nominal). V

• Regulator bypass – V and the internal circuitry is supplied directly from the V 3 V to 3.6 V to comply with the USB specification.

The supply-voltage range for each input option is specified in Table 3 .

INPUT OPTION V

Internal regulator

Regulator bypass maximum voltage drop of 0.3 V

Electrostatic Discharge (ESD)

PARAMETER TEST CONDITIONS TYP UNIT

D+, D – , V

All other pins Human-Body Model 7 kV

, and GND kV

CC(5.0)

is connected to 4 V to 5.5 V. The internal regulator is used to supply the internal

CC(5.0)

and V

CC(5.0)

becomes a 3.3-V output reference.

reg(3.3)

are connected to the same supply. The internal regulator is bypassed

reg(3.3)

power supply. The voltage range is

Table 3. Power-Supply Input Options

CC(5.0)

Supply input for internal regulator Voltage-reference output Supply input for digital I/O pins

(4 V to 5.5 V) (3.3 V, 300 µ A) (1.65 V to 3.6 V)

Connected to V

(2.7 V to 3.6 V)

Human-Body Model ± 15 IEC-61000-4-2, Contact Discharge ± 8

with

reg(3.3)

REG(3.3)

Supply input Supply input for digital I/O pins

(3 V to 3.6 V) (1.65 V to 3.6 V)

CC(I/O)

Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

CC(5.0)

I(I/O)

CCreg(3.3)

stg

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

Supply voltage range – 0.5 6 V Supply voltage range – 0.5 4.6 V Regulated voltage range – 0.5 4.6 V DC input voltage – 0.5 V Input clamp current VI= – 1.8 V to 5.4 V 100 mA Storage temperature range – 40 125 ° C

CC(I/O)

Recommended Operating Conditions

MIN NOM MAX UNIT

CC(5.0)

CCreg(3.3)

CC(I/O)

I/O

Supply voltage, internal regulator option 5-V operation 4 5 5.5 V Supply voltage, regulator bypass option 3.3-V operation 3 3.3 3.6 V I/O supply voltage 1.65 3.6 V I/O supply voltage 0 V Input voltage on analog I/O pins (D+, D – ) 0 3.6 V Junction temperature – 40 85 ° C

CC(I/O)

+ 0.5 V

Product Folder Link(s): TUSB1105 TUSB1106

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TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Static Electrical Characteristics – Supply Pins

over recommended ranges of operating free-air temperature and supply voltage (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

reg(3.3)

CC(I/O)

CC(idle)

CC(I/O)(static)

CC(susp)

CC(dis)

CC(I/O)(sharing)

Dx(sharing)

reg(3.3)th

reg(3.3)hys

CC(I/O)th

CC(I/O)hys

(1) I (2) In suspend mode, the typical voltage is 2.8 V.

includes the pullup resistor current via V

load

Regulated supply-voltage output

Operating supply current 6 8 mA Operating I/O supply current Full-speed transmitting and receiving at 12 Mbit/s

Supply current during V full-speed idle and SE0 SE0:

Static I/O supply current Full-speed idle, SE0 or suspend 10 22 µ A Suspend supply current SUSPND = HIGH Disable-mode supply current V Sharing-mode I/O

supply current Sharing-mode load current V

on D+ and D – SOFTCON = LOW, V

Regulated supply-voltage 1.65 V ≤ V detection threshold 2.7 V ≤ V

Regulated supply-voltage detection hysteresis

I/O supply-voltage detection threshold

I/O supply-voltage detection hysteresis

(3) Maximum value is characterized only, not tested in production. (4) Excluding any load current and V (5) When V

< 2.7 V, the minimum value for V

CC(I/O)

pu(3.3)

Internal regulator option, I Full-speed transmitting and receiving at 12 Mbit/s,

CL= 50 pF on D+ and D –

≤ 300 µ A

load

(3)

Full-speed idle:

> 2.7 V, V

D+

< 0.3 V, V

D+

not connected

CC(I/O)

or V

CC(5.0)

or V

CC(5.0)

= 1.8 V 0.45 V

CC(I/O)

= 2.7 V to 3.6 V V

reg(3.3)

= 3.3 V 0.45 V

reg(3.3)

pu(3.3)

source current to the 1.5-k Ω and 15-k Ω pullup and pulldown resistors (200 µ A typ)

reg(3.3)th

(present) is 2 V.

< 0.3 V

D –

(4)

< 0.3 V

D –

(4)

not connected 10 22 µ A

reg(3.3)

not connected,

reg(3.3)

CC(I/O)

reg(3.3)

≤ V

≤ 3.6 V

= 3.6 V

reg(3.3)

(1) (2)

Supply lost during power down

Supply detect during power up

Supply lost during power down

Supply detect during power up

(5)

3 3.3 3.6 V

(3)

2.3 2.5 mA

500 µ A

10 22 µ A 10 22 µ A

10 µ A

0.8 V

2.4

0.5

1.4

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Static Electrical Characteristics – Digital Pins

over recommended ranges of operating free-air temperature and supply voltage (unless otherwise noted)

PARAMETER TEST CONDITIONS V

V V

LOW-level input voltage 1.65 V to 3.6 V 0.3 V

HIGH-level input voltage 1.65 V to 3.6 V 0.6 V

IOL= 100 µ A 0.15 IOL= 2 mA 0.4 IOL= 100 µ A 0.15

LOW-level output voltage V

IOL= 2 mA 0.4 IOL= 100 µ A 0.15 IOL= 2 mA 0.4 IOL= 100 µ A 0.15 IOL= 2 mA 0.4 IOH= 100 µ A V IOH= 2 mA V IOH= 100 µ A 1.5

HIGH-level output voltage V

IOH= 2 mA 1.25 IOH= 100 µ A 2.15 IOH= 2 mA 1.9 IOH= 100 µ A 2.85

IOH= 2 mA 2.6 I C

Input leakage current – 1 1 µ A

Input capacitance Pin to GND 3.5 pF

CC(I/O)

1.65 V to 3.6 V

1.8 V ± 0.15 V

2.5 V ± 0.2 V

3.3 V ± 0.3 V

1.65 V to 3.6 V

1.8 V ± 0.15 V

2.5 V ± 0.2 V

3.3 V ± 0.3 V

CC(I/O)

TUSB1105 , TUSB1106

MIN MAX UNIT

CC(I/O)

– 0.15

– 0.4

CC(I/O)

V V

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Static Electrical Characteristics – Analog I/O Pins

over recommended ranges of operating free-air temperature and supply voltage, V V

= 0 V, TA= – 40 ° C to 85 ° C (unless otherwise noted)

GND

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V V V V V V V I

C Z Z R V

(1) V (2) Includes external resistors of 33 Ω ± 1% on both D+ and D – (3) This voltage is available at V (4) In suspend mode, the minimum voltage is 2.7 V.

Differential input sensitivity |V

Differential common-mode voltage Includes VDIrange 0.8 2.5 V

LOW-level input voltage, single-ended receiver 2 0.8 V

HIGH-level input voltage, single-ended receiver 0.4 V

Hysteresis voltage, single-ended receiver 0.7 V

hys

LOW-level output voltage RL= 1.5 k Ω to 3.6 V 0.3 V

HIGH-level output voltage RL= 1.5 k Ω to GND 2.8

– V

I(D+)

OFF-state leakage current 1 µ A Transceiver capacitance Pin to GND 25 pF

Driver output impedance Steady-state drive 34

DRV

Input impedance 10 M Ω

INP

Internal switch resistance at V

Termination voltage for upstream port pullup (RPU) 3

TERM

= V

OH(min)

– 0.2 V

reg(3.3)

pu(3.3)

and V

reg(3.3)

pu(3.3)

= 4 V to 5.5 V or V

| 0.2 V

I(D – )

(1)

(2)

(3) (4)

reg(3.3)

39 44 Ω

= 3 V to 3.6 V,

3.6 V

13 Ω

3.6 V

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

TUSB1105 , TUSB1106

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Dynamic Electrical Characteristics – Analog I/O Pins (D+, D – )

(1) (2)

Driver Characteristics, Full-Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, V V

= 1.65 V to 3.6 V, V

CC(I/O)

= 0 V, see Table 10 for valid voltage level combinations, TA= – 40 ° C to 85 ° C

GND

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT

FRFM Excluding the first transition from idle state 90 111.1 % V

Rise time 4 20 ns

Fall time 4 20 ns

Differential rise/fall time matching (tFR/tFF)

Output signal crossover voltage Excluding the first transition from idle state (see Figure 10) 1.3 2 V

CRS

CL= 50 pF to 125 pF, 10% to 90% of |V

CL= 50 pF to 125 pF, 90% to 10% of |V

– VOL| (see Figure 1 )

(1) Test circuit, see Figure 13 (2) Driver timing in low-speed mode is not specified. Low-speed delay timings are dominated by the slow rise/fall times tLRand tLF.

Dynamic Electrical Characteristics – Analog I/O Pins (D+, D – )

= 4 V to 5.5 V or V

(1) (2)

reg(3.3)

= 3 V to 3.6 V,

Driver Characteristics, Low-Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, V V

= 1.65 V to 3.6 V, V

CC(I/O)

= 0 V, see Table 10 for valid voltage level combinations, TA= – 40 ° C to 85 ° C

GND

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT

LRFM Excluding the first transition from idle state 80 125 % V

Rise time 75 300 ns

Fall time 75 300 ns Differential rise/fall time matching

(tLR/tLF) Output signal crossover voltage Excluding the first transition from idle state (see Figure 10) 1.3 2 V

CRS

(1) Test circuit, see Figure 13 (2) Driver timing in low-speed mode is not specified. Low-speed delay timings are dominated by the slow rise/fall times tLRand tLF.

CL= 200 pF to 600 pF, 10% to 90% of |V

CL= 200 pF to 600 pF, 90% to 10% of |V

– VOL| (see Figure 1 )

= 4 V to 5.5 V or V

reg(3.3)

= 3 V to 3.6 V,

Dynamic Electrical Characteristics – Analog I/O Pins (D+, D – )

(1) (2)

Driver Timing, Full-Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, V V

= 1.65 V to 3.6 V, V

CC(I/O)

= 0 V, see Table 10 for valid voltage level combinations, TA= – 40 ° C to 85 ° C

GND

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT

PLH(drv)

PHL(drv)

PHZ

PLZ

PZH

PZL

Driver propagation delay (VO/VPO, FSE0/VMO to D+, D – )

Driver disable delay ( OE to D+, D – ) ns

Driver enable delay ( OE to D+, D – ) ns

(1) Test circuit, see Figure 13 (2) Driver timing in low-speed mode is not specified. Low-speed delay timings are dominated by the slow rise/fall times tLRand tLF.

Product Folder Link(s): TUSB1105 TUSB1106

LOW to HIGH (see Figure 4 ) 18 HIGH to LOW (see Figure 4 ) 18 HIGH to OFF (see Figure 2 ) 15 LOW to OFF (see Figure 2 ) 15 OFF to HIGH (see Figure 2 ) 15 OFF to LOW (see Figure 2 ) 15

= 4 V to 5.5 V or V

reg(3.3)

= 3 V to 3.6 V,

www.ti.com

MGS96 3

10%

90%

10%

tFR,t

tFF,t

MGS966

Logic Input

Differential

Data Lines

1.8 V

0 V

0.9 V

VOL + 0.3 V

− 0.3 V

CRS

PZH

PZL

PHZ

PLZ

MGS964

Logic Output

Differential

Data Lines

0.9 V

CRS

1.8 V

0 V

PLH(drv)

PHL(drv)

0.9 V

MGS96 5

Logic Output

0.8 V

Differential

Data Lines

2.0 V V

CRS

0.9 V

CRS

PLH(rcv)

PLH(se)

PHL(rcv)

PHL(se)

TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Dynamic Electrical Characteristics for Analog I/O Pins (D+, D – ) Receiver Timing, Full-Speed and Low-Speed Mode, Differential Receiver

over recommended ranges of operating free-air temperature and supply voltage, V V

= 1.65 V to 3.6 V, V

CC(I/O)

= 0 V, see Table 10 for valid voltage level combinations, TA= – 40 ° C to 85 ° C

GND

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT

PLH(rcv)

PHL(rcv)

Propagation delay (D+, D – to RCV) ns

(1) Test circuit, see Figure 13

LOW to HIGH (see Figure 3 ) 15 HIGH to LOW (see Figure 3 ) 15

Dynamic Electrical Characteristics for Analog I/O Pins (D+, D – ) Receiver Timing, Full-Speed and Low-Speed Mode, Single-Ended Receiver

over recommended ranges of operating free-air temperature and supply voltage, V V

= 1.65 V to 3.6 V, V

CC(I/O)

(unless otherwise noted)

PLH(se)

PHL(se)

(1) Test circuit, see Figure 13

Propagation delay (D+, D – to VP, VM) ns

= 0 V, see Table 10 for valid voltage level combinations, TA= – 40 ° C to 85 ° C

GND

PARAMETER TEST CONDITIONS MIN MAX UNIT

LOW to HIGH (see Figure 3 ) 18 HIGH to LOW (see Figure 3 ) 18

(1)

= 4 V to 5.5 V or V

(1)

= 4 V to 5.5 V or V

reg(3.3)

= 3 V to 3.6 V,

Figure 1. Rise and Fall Times Figure 2. OE to D+, D –

Figure 3. D+, D – to RCV, VP, VM Figure 4. VO/VPO, FSE0/VMO to D+, D –

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

Test Point

D.U.T.

–

33 Ω 500 Ω

50 pF

MBL142

Test Point

D.U.T.

MGS968

25 pF

Test Point

D.U.T.

D+/D–

1.5 kΩ

15 kΩ

33 Ω

PU(3.3)

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

APPLICATION INFORMATION

Figure 5. Load for Enable and Disable Times

TUSB1105 , TUSB1106

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

A. V = 0 V for t B. V = V

reg(3.3)

PZH

for t

, t

PHZ

, t

PZL

PLZ

Figure 6. Load for VM, VP, and RCV

Figure 7. Load for D+, D –

A. Full-speed mode: connected to D+ B. Low-speed mode: Connected to D – C. Load capacitance:

• CL= 50 pF or 125 pF (full-speed mode, minimum or maximum timing)

• CL= 200 pF or 600 pF (low-speed mode, minimum or maximum timing)

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

pu(3.3)

SPEED

SOFTCON

RCV

VPO/VO

1.65Vto3.6V

System ASIC

D–

D+

1.5kW

BUS

CC(5.0)

reg(3.3)

SUSPND

MODE

(A)

VMO/FSE0

CC(I/O)

0.1µF

3.3V

33 W

0.1µF

TUSB1105/1106

GND

TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

A. Only for TUSB1105

Figure 8. Peripheral-Side (Full-Speed) Regulator Bypass Mode

Peripheral-Side (Full-Speed) Regulator Bypass Mode

This mode is applicable when there is a 3.3-V supply already available on the board. The V

BUS

pin of the USB connector, if left unused at the peripheral side, should be terminated with a 0.1- µ F capacitor. While operating at full speed, the 1.5-k Ω resistor must be connected between the D+ line and V When the V

and the V

CC(5.0)

are connected together, the device operates at regulator bypass mode. This

reg(3.3)

enables power savings since the regulator is turned off.

PU(3.3)

or an external 3.3-V supply.

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

pu(3.3)

SPEED

SOFTCON

RCV

VPO/VO

1.65Vto3.6V

System ASIC

D–

D+

1.5kW

BUS

CC(5.0)

reg(3.3)

SUSPND

MODE

(A)

VMO/FSE0

CC(I/O)

0.1µF

3.3V

33 W

0.1µF

TUSB1105/1106

GND

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

TUSB1105 , TUSB1106

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

A. Only for TUSB1105

Figure 9. Peripheral-Side (Low-Speed) Regulator Bypass Mode

Peripheral-Side (Low-Speed) Regulator Bypass Mode

This mode is applicable when there is a 3.3-V supply already available on the board. The V

BUS

pin of the USB connector, if left unused at the peripheral side, should be terminated with a 0.1- µ F capacitor. While operating at low speed, the 1.5-k Ω resistor must to be connected between the D – line and V supply. When the V

and the V

CC(5.0)

are connected together, the device operates at regulator bypass mode.

reg(3.3)

This enables power savings since the regulator is turned off.

PU(3.3)

or an external 3.3-V

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

(3.3)PU

SPEED

SOFTCON

RCV

VPO/VO

1.65Vto3.6V

System ASIC

D–

D+

1.5kW

BUS

CC(5.0)

reg(3.3)

SUSPND

MODE

(A)

VMO/FSE0

CC(I/O)

0.1µF

33 W

TUSB1105/1106

GND

TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Figure 10. Peripheral-Side (Full-Speed) Internal Regulator Mode

A. Only for TUSB1105

Peripheral-Side (Full-Speed) Internal Regulator Mode

The USB side of the TUSB1105/1106 can be powered from the V

line directly if a 3.3-V supply is not present

BUS

on board. In this case, the internal regulator can be used to provide the 3.3-V supply for USB signaling. The V V the range of 0.1 µ F. Powering V saving for portable applications, such as cell phones, PDAs, etc. In this operating mode, the I from the host. The USB-side power consumption, I logic-side I connected between the D+ line and the V

is connected to the V

CC(5.0)

pin. In this mode, it is important that both V

reg(3.3)

of 1 mA under full-speed operation. While operating at full speed, the 1.5-k Ω resistor must be

CC(IO)

, which receives 5-V supply from the host, and generates the 3.3-V output at the

BUS

CC(5.0)

through the V

PU(3.3)

CC(5.0)

or an external 3.3-V supply.

BUS

CC(5.0)

and V

pins have individual bypass capacitors in

reg(3.3)

port of the USB connector realizes significant power

current is fed

CC(5.0)

is 4 mA (with the regulator active), as opposed to

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

(3.3)PU

SPEED

SOFTCON

RCV

VPO/VO

1.65Vto3.6V

System ASIC

D–

D+

1.5kW

BUS

CC(5.0)

reg(3.3)

SUSPND

MODE

(A)

VMO/FSE0

CC(I/O)

0.1µF

33 W

TUSB1105/1106

GND

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

TUSB1105 , TUSB1106

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Figure 11. Peripheral-Side (Low-Speed) Internal Regulator Mode

A. Only for TUSB1105

Peripheral-Side (Low-Speed) Internal Regulator Mode

The USB side of the TUSB1105/1106 can be powered from the V

line directly if a 3.3-V supply is not present

BUS

on board. In this case, the internal regulator can be used to provide the 3.3-V supply for the USB signaling. The V V the range of 0.1 µ F. Powering V saving for portable applications, such as cell phones, PDAs, etc. In this operating mode, the I from the host side. The USB-side power consumption, I logic-side I connected between the D- line and the V

is connected to the V

CC(5.0)

pin. In this mode, it is important that both V

reg(3.3)

of 1 mA under full-speed operation. While operating at low speed, the 1.5-k Ω resistor must be

CC(IO)

, which receives 5-V supply from the host, and generates the 3.3-V output at the

BUS

CC(5.0)

through the V

PU(3.3)

CC(5.0)

or an external 3.3-V supply.

BUS

CC(5.0

and V

pins have individual bypass capacitors in

reg(3.3)

port of the USB connector realizes significant power

current is fed

CC(5.0)

) is 4 mA (with the regulator active), as opposed to

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

pu(3.3)

CC(5.0)

reg(3.3)

1.65Vto 3.6V

System ASIC

15kW

BUS

5V 5V

D–

D+

SPEED

SOFTCON

RCV

VPO/VO

SUSPND

MODE

(A)

VMO/FSE0

CC(I/O)

0.1µF

33 W

0.1µF

15kW

TUSB1105/1106

GND

GNDGND

GND

TUSB1105 , TUSB1106 ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

A. Only for TUSB1105

Host Side (V

Supplied From V

CC(5.0)

Figure 12. Host Side (V

Pin)

BUS

Supplied From V

CC(5.0)

Pin)

BUS

If there is no 3.3-V supply on board, an external 5-V supply can support the USB-side power needs. When the V which is used to drive the USB signaling levels at the USB side of the TUSB1105/1106. The logic-side I/Os can

is connected to an external 5-V supply, the on-chip regulator generates the 3.3-V internal supply rail,

CC(5.0)

operate at any voltage range from 1.65 V to 3.6 V.

Product Folder Link(s): TUSB1105 TUSB1106

www.ti.com

pu(3.3)

CC(5.0)

reg(3.3)

1.65Vto3.6V

System ASIC

15kW

BUS

D–

D+

SPEED

SOFTCON

RCV

VPO/VO

SUSPND

MODE

(A)

VMO/FSE0

CC(I/O)

0.1µF

33 W

0.1µF

15kW

3.3V

5V

TUSB1105/1106

GND

GND GND GND

GND

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

TUSB1105 , TUSB1106

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

A. Only for TUSB1105

Figure 13. Host-Side (3.3-V Supply Present) Internal Regulator Bypass Mode

Host-Side (3.3-V Supply Present) Internal Regulator Bypass Mode

If a 3.3-V supply supports the USB-side power, V

and V

CC(5.0)

3.3-V supply. It also makes the regulator inactive.

must to be tied together and connected to a

reg(3.3)

Product Folder Link(s): TUSB1105 TUSB1106

PACKAGE OPTION ADDENDUM

www.ti.com

25-Sep-2007

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package

Drawing

Pins Package

Qty

Eco Plan

TUSB1105RGTR ACTIVE QFN RGT 16 3000 Green (RoHS &

no Sb/Br)

TUSB1105RGTRG4 ACTIVE QFN RGT 16 3000 Green(RoHS &

no Sb/Br)

TUSB1105RTZR ACTIVE QFN RTZ 16 3000 Green (RoHS &

no Sb/Br)

TUSB1105RTZRG4 ACTIVE QFN RTZ 16 3000 Green (RoHS &

no Sb/Br)

TUSB1106PWR ACTIVE TSSOP PW 16 2000 Green (RoHS &

no Sb/Br)

TUSB1106PWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS &

no Sb/Br)

TUSB1106RGTR ACTIVE QFN RGT 16 3000 Green (RoHS &

no Sb/Br)

TUSB1106RGTRG4 ACTIVE QFN RGT 16 3000 Green(RoHS &

no Sb/Br)

TUSB1106RTZR ACTIVE QFN RTZ 16 3000 Green (RoHS &

no Sb/Br)

TUSB1106RTZRG4 ACTIVE QFN RTZ 16 3000 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

TAPE AND REEL INFORMATION

11-Mar-2008

*All dimensions are nominal

Device Package

TUSB1106PWR TSSOP PW 16 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1

Type

Package

Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

11-Mar-2008

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TUSB1106PWR TSSOP PW 16 2000 346.0 346.0 29.0

Pack Materials-Page 2

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,65

1,20 MAX

0,30 0,19

4,50 4,30

PINS **

Seating Plane

0,15

0,05

DIM

6,60 6,20

0,10

0,15 NOM

0°–8°

2016

Gage Plane

0,25

0,75 0,50

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

7,70

9,80

9,60

4040064/F 01/97

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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TEXAS INSTRUMENTS TUSB1105, TUSB1106 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

DESCRIPTION/ORDERING INFORMATION

APPLICATIONS

TUSB1105 PACKAGES

TUSB1106 PACKAGES

FUNCTIONAL DESCRIPTION

Function Selection

Operating Functions

Power-Supply Configurations

Power-Supply Input Options

Electrostatic Discharge (ESD)

Absolute Maximum Ratings

Recommended Operating Conditions

Static Electrical Characteristics – Supply Pins

Static Electrical Characteristics – Digital Pins

Static Electrical Characteristics – Analog I/O Pins

Dynamic Electrical Characteristics for Analog I/O Pins (D+, D – ) Receiver Timing, Full-Speed and Low-Speed Mode, Differential Receiver

Dynamic Electrical Characteristics for Analog I/O Pins (D+, D – ) Receiver Timing, Full-Speed and Low-Speed Mode, Single-Ended Receiver

APPLICATION INFORMATION

Peripheral-Side (Full-Speed) Regulator Bypass Mode

Peripheral-Side (Low-Speed) Regulator Bypass Mode

Peripheral-Side (Full-Speed) Internal Regulator Mode

Peripheral-Side (Low-Speed) Internal Regulator Mode

Host-Side (3.3-V Supply Present) Internal Regulator Bypass Mode