www.ti.com
324
5
DBV PACKAGE
(TOP VIEW)
1IN
GND
EN
OUT
BYPASS
Fixed Option
324
6
DBV PACKAGE
(TOP VIEW)
1
IN
GND
EN
OUT
BYPASS
5
FB
Adjustable Option
TPS79328
RIPPLE REJECTION
vs
FREQUENCY
IN
EN
OUT
BYP
GND
YEQ
PACKAGE
(TOP VIEW)
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection − dB
f − Frequency − Hz
IO = 10 mA
50
0
VI = 3.8 V
Co = 10 µF
C
(byp)
= 0.01 µF
IO = 200 mA
20
30
60
70
90
100
A3 A1
C3 C1
B2
0
0.05
0.1
0.15
0.2
0.25
0.3
100 1 k 10 k 100 k
f − Frequency − Hz
IO = 1 mA
VI = 3.8 V
Co = 2.2 µF
C
(byp)
= 0.1 µF
IO = 200 mA
V/ HzOutput Spectral Noise Density −
µ
TPS79328
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA LOW-DROPOUT LINEAR
REGULATORS IN NANOSTAR™ WAFER CHIP SCALE AND SOT23
FEATURES DESCRIPTION
• 200-mA RF Low-Dropout Regulator
With Enable
• Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V,
3.3-V, 4.75-V, and Adj (1.22 V to 5.5 V)
• High PSRR (70 dB at 10 kHz)
• Ultralow Noise (32 µV)
• Fast Start-Up Time (50 µs)
• Stable With a 2.2-µF Ceramic Capacitor
• Excellent Load/Line Transient Response
• Very Low Dropout Voltage (112 mV at Full
Load, TPS79330)
• 5-Pin SOT23 (DBV) and NanoStar Wafer Chip
Scale (YEQ) Packages
APPLICATIONS
• RF: VCOs, Receivers, ADCs duced to less than 1 µA. The TPS79328 exhibits
• Audio
• Cellular and Cordless Telephones
• Bluetooth™, Wireless LAN
• Handheld Organizers, PDAs
The TPS793xx family of low-dropout (LDO)
low-power linear voltage regulators features high
power supply rejection ratio (PSRR), ultralow noise,
fast start-up, and excellent line and load transient
responses in NanoStar wafer chip scale and SOT23
packages. NanoStar packaging gives an ultrasmall
footprint as well as an ultralow profile and package
weight, making it ideal for portable applications such
as handsets and PDAs. Each device in the family is
stable, with a small 2.2-µF ceramic capacitor on the
output. The TPS793xx family uses an advanced,
proprietary BiCMOS fabrication process to yield extremely low dropout voltages (e.g., 112 mV at 200
mA, TPS79330). Each device achieves fast start-up
times (approximately 50 µs with a 0.001-µF bypass
capacitor) while consuming very low quiescent current (170 µA typical). Moreover, when the device is
placed in standby mode, the supply current is re-
approximately 32 µV
of output voltage noise with
RMS
a 0.1-µF bypass capacitor. Applications with analog
components that are noise sensitive, such as portable
RF electronics, benefit from the high PSRR and
low-noise features as well as the fast response time.
Bluetooth is a trademark of Bluetooth Sig, Inc.
NANOSTAR is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily
include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2001–2004, Texas Instruments Incorporated
www.ti.com
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
AVAILABLE OPTIONS
T
J
-40°C to 125°C 2.8 V CSP (YEQ) TPS79328YEQ E2
(1) DBVR indicates tape and reel of 3000 parts. YEQR indicates tape and reel of 3000 parts. YEQT indicates tape and reel of 250 parts.
VOLTAGE PACKAGE PART NUMBER SYMBOL
1.22 to 5.5 V TPS79301DBVR PGVI
1.8 V TPS79318DBVR PHHI
1.8 V CSP (YEQ) TPS79318YEQ E3
2.5 V SOT23 (DBV) TPS79325DBVR PGWI
2.5 V CSP (YEQ) TPS79325YEQ E4
2.8 V SOT23 (DBV) TPS79328DBVR PGXI
2.85 V SOT23 (DBV) TPS793285DBVR PHII
2.85 V CSP (YEQ) TPS793285YEQ E5
3 V SOT23 (DBV) TPS79330DBVR PGYI
3 V CSP (YEQ) TPS79330YEQ E6
3.3 V TPS79333DBVR PHUI
4.75 V TPS793475DBVR PHJI
SOT23 (DBV)
SOT23 (DBV)
(1)
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted)
VINrange -0.3 V to 6 V
V
range -0.3 V to VIN+ 0.3 V
EN
V
range -0.3 V to 6 V
OUT
Peak output current Internally limited
ESD rating, HBM 2 kV
ESD rating, CDM 500 V
Continuous total power dissipation See Dissipation Ratings Table
Operating junction temperature range, DBV package -40°C to 150°C
Operating junction temperature range, YEQ package -40°C to 125°C
Storage temperature range, T
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
stg
(1)
UNIT
-65°C to 150°C
DISSIPATION RATINGS TABLE
BOARD PACKAGE R
(1)
Low-K
(2)
High-K
(1)
Low-K
(2)
High-K
(1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top
of the board.
(2) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
DBV 65°C/W 255°C/W 3.9 mW/°C 390 mW 215 mW 155 mW
DBV 65°C/W 180°C/W 5.6 mW/°C 560 mW 310 mW 225 mW
YEQ 27°C/W 255°C/W 3.9 mW/°C 390 mW 215 mW 155 mW
YEQ 27°C/W 190°C/W 5.3 mW/°C 530 mW 296 mW 216 mW
ΘJC
R
ΘJA
DERATING FACTOR TA≤ 25°C TA= 70°C TA= 85°C
ABOVE TA= 25°C POWER POWER POWER
RATING RATING RATING
2
www.ti.com
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
TPS79301, TPS79318
ELECTRICAL CHARACTERISTICS
over recommended operating temperature range TJ= -40 to 125 °C, V
C
OUT
= 10 µF, C
= 0.01 µF (unless otherwise noted). Typical values are at 25°C.
BYPASS
EN
= VIN, V
= V
IN
OUT(nom)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VINInput voltage
I
Continuous output current 0 200 mA
OUT
V
Internal reference (TPS79301) 1.201 1.225 1.250 V
FB
Output voltage range (TPS79301) V
(1)
2.7 5.5 V
FB
TJOperating junction temperature -40 125 °C
TPS79318 0 µA < I
TPS79325 0 µA < I
TPS79328 0 µA < I
Output voltage TPS793285 0 µA < I
TPS79330 0 µA < I
TPS79333 0 µA ≤ I
TPS793475 0 µA < I
Quiescent current (GND current) 0 µA < I
Load regulation (∆V
Line regulation (∆V
Output noise voltage (TPS79328) µV
%/I
OUT
OUT
) 0 µA < I
OUT
(1)
%/V
)
IN
V
OUT
BW = 200 Hz to 100 kHz,
I
OUT
Time, start-up (TPS79328) RL= 14 Ω, C
Output current limit V
Standby current V
OUT
EN
< 200 mA, 2.8 V < VIN< 5.5 V 1.764 1.8 1.836 V
OUT
< 200 mA, 3.5 V < VIN< 5.5 V 2.45 2.5 2.55 V
OUT
< 200 mA, 3.8 V < VIN< 5.5 V 2.744 2.8 2.856 V
OUT
< 200 mA, 3.85 V < VIN< 5.5 V 2.793 2.85 2.907 V
OUT
< 200 mA, 4 V < VIN< 5.5 V 2.94 3 3.06 V
OUT
< 200 mA, 4.3 V < VIN< 5.5 V 3.234 3.3 3.366 V
OUT
< 200 mA, 5.25 V < VIN< 5.5 V 4.655 4.75 4.845 V
OUT
< 200 mA 170 220 µA
OUT
< 200 mA, TJ= 25°C 5 mV
OUT
+ 1 V < VIN≤ 5.5 V 0.05 0.12 %/V
= 200 mA
OUT
C
C
C
C
C
= 1 µF C
C
= 0.001 µF 55
BYPASS
= 0.0047 µF 36
BYPASS
= 0.01 µF 33
BYPASS
= 0.1 µF 32
BYPASS
= 0.001 µF 50
BYPASS
= 0.0047 µF 70 µs
BYPASS
= 0.01 µF 100
BYPASS
= 0 V 285 600 mA
= 0 V, 2.7 V < VIN< 5.5 V 0.07 1 µA
High level enable input voltage 2.7 V < VIN< 5.5 V 1.7 V
Low level enable input voltage 2.7 V < VIN< 5.5 V 0 0.7 V
Input current (EN) V
= 0 -1 1 µA
EN
Input current (FB) (TPS79301) FB = 1.8 V 1 µA
f = 100 Hz, TJ= 25°C, I
Power supply ripple rejection TPS79328 dB
f = 100 Hz, TJ= 25°C, I
f = 10 kHz, TJ= 25°C, I
f = 100 kHz, TJ= 25°C, I
TPS79328 I
Dropout voltage
(V
= V
IN
OUT(typ)
(2)
- 0.1V)
TPS793285 I
TPS79330 I
TPS79333 I
TPS793475 I
UVLO threshold V
= 200 mA 120 200
OUT
= 200 mA 120 200
OUT
= 200 mA 112 200 mV
OUT
= 200 mA 102 180
OUT
= 200 mA 77 125
OUT
rising 2.25 2.65 V
CC
= 10 mA 70
OUT
= 200 mA 68
OUT
= 200 mA 70
OUT
= 200 mA 43
OUT
UVLO hysteresis 100 mV
+ 1 V
(1)
, I
= 1 mA,
OUT
5.5 - V
DO
IN
V
RMS
V
(1) Minimum VIN is 2.7 V or V
(2) Dropout is not measured for the TPS79318 and TPS79325 since minimum VIN= 2.7 V.
+ VDO, whichever is greater.
OUT
3
www.ti.com
_
+
Thermal
Shutdown
Bandgap
Reference
1.22V
Current
Sense
R2
GND
EN
SHUTDOWN
V
ref
UVLO
ILIM
External to
the Device
R1
UVLO
2.45V
250 kΩ
Bypass
FB
59 k
QuickStart
OUTIN
IN
_
+
Thermal
Shutdown
Current
Sense
R1
R2
GND
EN
SHUTDOWN
V
ref
UVLO
ILIM
250 kΩ
Bypass
QuickStart
Bandgap
Reference
1.22V
UVLO
2.45V
R2 = 40 k
IN
IN OUT
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
ADJUSTABLE VERSION
FUNCTIONAL BLOCK DIAGRAMS
FIXED VERSION
Terminal Functions
TERMINAL
NAME
BYPASS 4 4 B2
GND 2 2 A1 Regulator ground
OUT 6 5 C1 Output of the regulator.
4
SOT23 SOT23 CSP
ADJ FIXED FIXED
An external bypass capacitor, connected to this terminal in conjunction with an internal resistor,
EN 3 3 A3 high, the device will be enabled. When the device goes to a logic low, the device is in shutdown
FB 5 N/A N/A This terminal is the feedback input voltage for the adjustable device.
IN 1 1 C3 Unregulated input to the device.
creates a low-pass filter to further reduce regulator noise.
The EN terminal is an input which enables or shuts down the device. When EN goes to a logic
mode.
DESCRIPTION
www.ti.com
2.795
2.796
2.797
2.798
2.799
2.8
2.801
2.802
2.803
2.804
2.805
0 50 100 150 200
I
O
− Output Current − mA
VI = 3.8 V
Co = 10 µF
TJ = 25° C
− Output Voltage − V
V
O
2.775
2.78
2.785
2.79
2.795
2.8
2.805
−40−25−10 5 20 35 50 65 80 95 110 125
T
J
− Junction Temperature − °C
− Output Voltage − V
V
O
IO = 200 mA
IO = 1 mA
VI = 3.8 V
Co = 10 µF
0
50
100
150
200
250
−40−25−10 5 20 35 50 65 80 95 110125
T
J
− Junction Temperature − °C
Ground Current − Aµ
IO = 1 mA
VI = 3.8 V
Co = 10 µF
IO = 200 mA
0
0.05
0.1
0.15
0.2
0.25
0.3
100 1 k 10 k 100 k
f − Frequency − Hz
IO = 1 mA
VI = 3.8 V
Co = 2.2 µF
C
(byp)
= 0.1 µF
IO = 200 mA
V/ HzOutput Spectral Noise Density −
µ
0
0.05
0.1
0.15
0.2
0.25
0.3
100 1 k 10 k 100 k
V/ HzOutput Spectral Noise Density −
µ
f − Frequency − Hz
IO = 1 mA
IO = 200 mA
VI = 3.8 V
Co = 10 µF
C
(byp)
= 0.1 µF
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
100 1 k 10 k 100 k
f − Frequency − Hz
V/ HzOutput Spectral Noise Density −
VI = 3.8 V
IO = 200 mA
Co= 10 µF
C
(byp)
= 0.1 µF
C
(byp)
= 0.001 µF
µ
C
(byp)
= 0.0047 µF
C
(byp)
= 0.01 µF
100 1 M10 1 k
f − Frequency − Hz
10 k
− Output Impedance −Z
o
Ω
100 k
IO = 1 mA
0
0.5
1
1.5
2
2.5
0
IO = 100 mA
10 M
VI = 3.8 V
Co = 10 µF
TJ = 25° C
0
20
40
60
80
100
120
140
160
180
−40−25−10 5 20 35 50 65 80 95 110 125
IO = 200 mA
IO = 10 mA
VI = 2.7 V
Co = 10 µF
T
J
− Junction Temperature − °C
− Dropout Voltage − mV
V
DO
0.001 0.01 0.1
C
(byp)
− Bypass Capacitance − µF
0
10
20
30
40
50
60
VO = 2.8 V
IO = 200 mA
Co = 10 µF
BW = 100 Hz to
100 kHz
RMS − Root Mean Squared Output Noise − V
(RMS)
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
TYPICAL CHARACTERISTICS (SOT23 PACKAGE)
TPS79328 TPS79328 TPS79328
OUTPUT VOLTAGE OUTPUT VOLTAGE GROUND CURRENT
OUTPUT CURRENT JUNCTION TEMPERATURE JUNCTION TEMPERATURE
vs vs vs
Figure 1. Figure 2. Figure 3.
OUTPUT SPECTRAL NOISE DEN- OUTPUT SPECTRAL NOISE DEN- OUTPUT SPECTRAL NOISE DEN-
TPS79328 TPS79328 TPS79328
SITY SITY SITY
vs vs vs
FREQUENCY FREQUENCY FREQUENCY
Figure 4. Figure 5. Figure 6.
ROOT MEAN SQUARE OUTPUT TPS79328
NOISE OUTPUT IMPEDANCE DROPOUT VOLTAGE
vs vs vs
BYPASS CAPACITANCE FREQUENCY JUNCTION TEMPERATURE
Figure 7. Figure 8. Figure 9.
5
www.ti.com
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection − dB
f − Frequency − Hz
IO = 10 mA
50
0
VI = 3.8 V
Co = 10 µF
C
(byp)
= 0.01 µF
IO = 200 mA
20
30
60
70
90
100
10 100 1 k 10 k
20
60
100
100 k 1 M 10 M
Ripple Rejection − dB
f − Frequency − Hz
VI = 3.8 V
Co = 2.2 µF
C
(byp)
= 0.01 µF
IO = 10 mA
IO = 200 mA
40
70
90
30
50
80
10
0
10 100 1 k 10 k
20
60
100
100 k 1 M 10 M
Ripple Rejection − dB
f − Frequency − Hz
VI = 3.8 V
Co = 2.2 µF
C
(byp)
= 0.1 µF
IO = 10 mA
IO = 200 mA
40
70
90
30
50
80
10
0
3
V
O
t − Time − µs
0 604020 80 100 140120 160 180 200
− Output Voltage − V
VI = 3.8 V
VO = 2.8 V
I
O
= 200 mA
Co = 2.2 µF
TJ = 25°C
Enable Voltage − V
1
2
0
0
2
C
(byp)
= 0.0047 µF
C
(byp)
= 0.01 µF
4
C
(byp)
= 0.001 µF
t − Time − µs
0
0 15010050 200 250 350300 400 450
20
0
−20
V
O
Output Voltage − mV
∆
− Change In
100
500
− Output Current − mA
I
O
VI = 3.8 V
Co = 10 µF
−40
200
300
di
dt
0.02A
µs
1mA
V
O
t − Time − µs
0 302010 40 50 7060 80 90 100
− Output Voltage − mV
IO = 200 mA
Co = 2.2 µF
C
(byp)
= 0.01 µF
V
I
− Input Voltage −
0
-20
3.8
dv
dt
0.4 V
µs
mV
20
4.8
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
TPS79328 TPS79328 TPS79328
RIPPLE REJECTION RIPPLE REJECTION RIPPLE REJECTION
vs vs vs
FREQUENCY FREQUENCY FREQUENCY
Figure 10. Figure 11. Figure 12.
OUTPUT VOLTAGE, ENABLE VOLT-
TPS79328
AGE
vs TPS79328 TPS79328
TIME (START-UP) LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Figure 13. Figure 14. Figure 15.
6
www.ti.com
500 mV/div
1s/div
V
I
V
O
VO = 3 V
RL = 15 Ω
100
50
0 20 40 60 80 100 120
DC Dropuoy Voltage − mV
150
200
250
140 160 180 200
0
I
O
− Output Current − mA
TJ = 125°C
TJ = 25°C
TJ = −55°C
0
50
100
150
200
2.5 3 3.5 4 4.5 5
V
I
− Input Voltage − V
− Dropout Voltage − mV
V
DO
IO = 200 mA
TJ = 25°C
TJ = −40°C
TJ = 125°C
2
3
4
1.5 2.5 3.52 3
TJ = 25°C
IO = 200 mA
− Minimum Required Input Voltage − V
VO − Output Voltage − V
V
I
1.75 2.25 2.75 3.25
2.8
TJ = 125°C
TJ = −40°C
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.2
I
O
− Output Current − A
ESR − Equivalent Series Resistance − Ω
1
Region of Instability
Region of Stability
Co = 2.2 µF
VI = 5.5 V, VO ≥ 1.5 V
TJ = −40°C to 125°C
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.2
I
O
− Output Current − A
ESR − Equivalent Series Resistance − Ω
1
Region of Instability
Region of Stability
Co = 10 µF
VI = 5.5 V
TJ = −40°C to 125°C
TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
DC DROPOUT VOLTAGE DROPOUT VOLTAGE
vs vs
POWER UP / POWER DOWN OUTPUT CURRENT INPUT VOLTAGE
Figure 16. Figure 17. Figure 18.
TYPICAL REGIONS OF STABILITY TYPICAL REGIONS OF STABILITY
MINIMUM REQUIRED INPUT VOLT- EQUIVALENT SERIES RESISTANCE EQUIVALENT SERIES RESISTANCE
AGE (ESR) (ESR)
vs vs vs
OUTPUT VOLTAGE OUTPUT CURRENT OUTPUT CURRENT
TPS79301
Figure 19. Figure 20. Figure 21.
7
www.ti.com
0.1µF
BYPASS
OUT
IN
EN
GND
2.2µF
TPS793xx
0.01µF
V
IN
V
OUT
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
APPLICATION INFORMATION
The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive
battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output
noise, low quiescent current (170 µA typically), and enable-input to reduce supply currents to less than 1 µA
when the regulator is turned off.
A typical application circuit is shown in Figure 22 .
Figure 22. Typical Application Circuit
External Capacitor Requirements
A 0.1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS793xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A
higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device
is located several inches from the power source.
Like most low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 2.2 µF. Any 2.2-µF or larger
ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load
current is not expected to exceed 100 mA, a 1.0-µF ceramic capacitor can be used.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has a BYPASS pin
which is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in
conjunction with an external bypass capacitor connected to the BYPASS pin, creates a low pass filter to reduce
the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate
properly, the current flow out of the BYPASS pin must be at a minimum, because any leakage current creates an
IR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor should be no more than 0.1-µF to ensure that it is fully charged
during the quickstart time provided by the internal switch shown in the Functional Block Diagrams
As an example, the TPS79328 exhibits only 32 µV
of output voltage noise using a 0.1-µF ceramic bypass
RMS
capacitor and a 2.2-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance
increases due to the RC time constant at the BYPASS pin that is created by the internal 250-kΩ resistor and
external capacitor.
Board Layout Recommendation to Improve PSRR and Noise Performance
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board
be designed with separate ground planes for V
pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND
pin of the device.
8
and V
IN
, with each ground plane connected only at the GND
OUT
www.ti.com
P
D(max
)
T
J
maxT
A
R
JA
P
D
VINV
OUT
I
OUT
V
OUT
V
REF
1
R
1
R
2
R
1
V
OUT
V
ref
1
R
2
C
1
(3 x 107) x (R
1
R2)
(R
1
x R2)
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
equal to P
.
D(max)
The maximum power dissipation limit is determined using Equation 1 :
Where:
• TJmax is the maximum allowable junction temperature.
• R
• TAis the ambient temperature.
is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table).
θJA
The regulator dissipation is calculated using Equation 2 :
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal
protection circuit.
, and the actual dissipation, PD, which must be less than or
D(max)
(1)
(2)
Programming the TPS79301 Adjustable LDO Regulator
The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as
shown in Figure 23 . The output voltage is calculated using Equation 3 :
Where:
• V
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and thus erroneously decreases/increases V
design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability, and then
calculate R1 using Equation 4 :
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be
placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages
>1.8 V, the approximate value of this capacitor can be calculated as shown in Equation 5 :
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum
recommended output capacitor is 4.7 µF instead of 2.2 µF.
= 1.2246 V typ (the internal reference voltage)
REF
. The recommended
OUT
(3)
(4)
(5)
9
www.ti.com
22 pF
15 pF
15 pF
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
VOLTAGE
R1 R2
2.5 V
3.3 V
3.6 V
C1
31.6 k
Ω
51 k
Ω
59 k
Ω
30.1 k
Ω
30.1 k
Ω
30.1 k
Ω
OUT
FB
R1
R2
GND
EN
IN
0.7 V
2 V
TPS79301
1µF
BYPASS
0.01µF
1µF
C1
0 pF1.22 V
short open
Optional for improved noise
V
OUT
V
IN
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Figure 23. TPS79301 Adjustable LDO Regulator Programming
Regulator Protection
The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be
appropriate.
The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx
limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum
voltage ratings of the device. If the temperature of the device exceeds approximately 165°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation
resumes.
10
www.ti.com
0.625 Max
NOTES:A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. NanoStar package configuration.
D. This package is tin-lead (SnPb), consult the factory for availability of lead-free material.
NanoStar is a trademark of Texas Instruments.
1,30
1,34
0,79
0,84
APPLICATION INFORMATION (continued)
TPS793xxYEQ NanoStar™ Wafer Chip Scale Information
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348G – JULY 2001 – REVISED JUNE 2004
Figure 24. NanoStar™ Wafer Chip Scale Package
11
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty . Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
Telephony www.ti.com/telephony
Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless
Mailing Address: Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated
Loading...