DAvailable in 2.5 V, 3.3 V
DProgrammable Slew Rate Control
DOutput Noise Typically 56 µV
RMS
DOnly 17 µA Quiescent Current at 150 mA
D1 µA Quiescent Current in Standby Mode
DDropout Voltage Typically 150 mV at 150 mA
(TPS78833)
DOver Current Limitation
D–40°C to 125°C Operating Junction
Temperature Range
D5-Pin SOT-23 (DBV) Package
DBV PACKAGE
(TOP VIEW)
GND
EN
1
IN
2
3
OUT
5
4
SR
DESCRIPTION
The TPS78825 and TPS78833 are very small (SOT-23)
package, low-noise LDOs that regulate the output
voltage to 2.5 V and 3.3 V with input voltage ranging
from 2.7 V to an absolute maximum of 13.5 V. These
devices output 150 mA with a peak current of 350 mA
(typ). The TPS788xx family uses the SR pin to program
the output voltage slew rate to control the in-rush
current. This is specifically used in the USB application
where large load capacitance is present at start-up. The
TPS788xx devices use only 17 µA of quiescent current
and exhibit only 56 µV
a 10 µF output capacitor.
The usual PNP pass transistor has been replaced by a
PMOS pass element. Because the PMOS pass element
behaves as a low-value resistor, the dropout voltage is
very low, typically 150 mV at 150 mA of load current, and
is directly proportional to the load current.
The TPS788xx also features a logic-enabled sleep
mode to shut down the regulator, reducing quiescent
current to 1 µA typical at T
of output voltage noise using
RMS
= 25°C.
J
QUIESCENT CURRENT
FREE-AIR TEMPERATURE
25
VCC = 4.3 V
20
Aµ
15
10
Quiescent Current –
5
0
–40–25–10 5 20 35 50 65 80 95 110125
TA – Free-Air Temperature – °C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
vs
IO = 150 mA
IO = 1 mA
www.ti.com
OUTPUT VOLTAGE, ENABLE VOLTAGE
5
0
Enable Voltage – V
C
= 0.01 µF
(SR)
3
C
(SR)
2
1
0
– Output Voltage – V
O
030201040 50706080 90 100
V
Copyright 2001, Texas Instruments Incorporated
vs
TIME (START-UP)
= 0.1 µF
VI = 4.3 V
VO = 3.3 V
IO = 150 mA
Co = 10 µF
TJ = 25°C
t – Time – ms
1
TPS78825, TPS78833
SOT 23
SLVS382A – JUNE 2001 – REVISED JULY 2001
T
J
–40°C to 125°C
†
The DBVT indicates tape and reel of 250 parts.
‡
The DBVR indicates tape and reel of 3000 parts.
functional block diagram
AVAILABLE OPTIONS
VOLTAGEPACKAGEPART NUMBERSYMBOL
2.5 V
3.3 V
SOT-23
(DBV)
TPS78825DBVT†TPS78825DBVR
TPS78833DBVTTPS78833DBVRPGTI
‡
PGZI
OUT
EN
GND
SR
IN
150 k
V
ref
Current Limit
/ Thermal
Protection
Terminal Functions
TERMINAL
NAMENO.
EN3IActive low enable
GND2Regulator ground
IN1IThe IN terminal is the input to the device.
OUT5OThe OUT terminal is the regulated output of the device.
SR4IThe SR terminal is used to control the in-rush current.
I/O
DESCRIPTION
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Operating virtual junction temperature range, T
Operating ambient temperature range, T
Storage temperature range, T
§
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
BOARD
Low K
High K
¶
The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board.
#
The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
VO + 1 V < VI ≤ 10 V, TJ = 25°C0.04
VO + 1 V < VI ≤ 10 V0.1
BW = 200 Hz to 100 kHz,
IO = 150 mA,
TJ = 25°C,
Co = 10 µF,
C
= 0.47 µF
(SR)
R
= 22 Ω
= 22 Ω,
Co = 10 µF,
= 10
TJ = 25°C
VO = 0 V (see Note 4)
C
C
C
= 0.01 µF (unless otherwise noted)
(SR)
56µV
= 0.01 µF10
(byp)
= 0.1 µF50
(byp)
= 0.47 µF300
(byp)
350750mA
,
V
µA
%/V
RMS
ms
Standby currentEN = 0 V, 2.7 V < VI < 10 V12µA
High level enable input voltage2.7 V < VI < 10 V1.7V
Low level enable input voltage2.7 V < VI < 10 V0.9V
Input current (EN)EN = 0–11µA
f = 1 kHz,
Power supply ripple rejectionTPS78833
Dropout voltage (see Note 6)TPS78833
NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula:
VI(min) = VO(max) + VDO (max load)
3. Continuous output current and operating junction temperature are limited by internal protection circuitry , but it is not recommended
that the device operate under conditions beyond those specified in this table for extended periods of time.
4. The minimum IN operating voltage is 2.7 V or V
output current is 200 mA.
5. If VO≤ 2.5 V then V
Line regulation (mV) +ǒ%ńV
If VO > 2.5 V then V
6. IN voltage equals VO(typ) – 100 mV
= 2.7 V, V
Imin
= VO + 1 V, V
Imin
Ǔ
TJ = 25°C,
Co = 10 µF
IO = 150 mA, TJ = 25°C150
IO = 150 mA300
+ 1 V , whichever is greater . The maximum IN voltage is 5.5 V . The maximum
O(typ)
= 5.5 V:
Imax
ǒ
V
V
Imax
O
100
= 5.5 V.
Imax
* 2.7 V
Ǔ
1000
C
= 0.01 µF,
(SL)
IO = 150 mA,
70dB
mV
www.ti.com
3
Loading...
+ 6 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.