Texas Instruments TPS77930DGK, TPS77925DGKR, TPS77925DGK, TPS77918DGK, TPS77918DGKR Datasheet

TPS77901, TPS77918, TPS77925, TPS77930

250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A – MARCH 2000 – REVISED MARCH 2000

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Open Drain Power-On Reset With 220-ms
Delay

D

250-mA Low-Dropout Voltage Regulator

D

Available in 1.8-V, 2.5-V, 3-V, Fixed Output
and Adjustable Versions

D

Dropout Voltage Typically 200 mV
at 250 mA (TPS77930)

D

Ultra Low 92-µA Quiescent Current (Typ)

D

8-Pin MSOP (DGK) Package

D

Low Noise (55 µV

rms

) With No Bypass

Capacitor (TPS77918)

D

2% Tolerance Over Specified Conditions
For Fixed-Output Versions

D

Fast Transient Response

D

Thermal Shutdown Protection

D

See the TPS773xx and TPS774xx Family of
Devices for Active Low Enable

description

The TPS779xx is a low dropout regulator with
integrated power-on reset. The device is capable
of supplying 250 mA of output current with a
dropout of 200 mV (TPS77930). Quiescent
current is 92 µA at full load dropping down to 1 µA
when the device is disabled. The device is
optimized to be stable with a wide range of output
capacitors including low ESR ceramic (10 µF) or
low capacitance (1 µF) tantalum capacitors. The
device has extremely low noise output perfor­mance (55 µV

rms

) without using any added filter
capacitors. TPS779xx is designed to have a fast
transient response for larger load current
changes.

The TPS779xx is offered in 1.8-V, 2.5-V, and 3-V fixed-voltage versions and in an adjustable version
(programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is 2% over line, load, and temperature
ranges. The TPS779xx family is available in 8-pin MSOP (DGK) packages.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 200 mV
at an output current of 250 mA for 3.3 volt option) and is directly proportional to the output current. Additionally ,
since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent
of output loading (typically 92 µA over the full range of output current, 0 mA to 250 mA). These two key
specifications yield a significant improvement in operating life for battery-powered systems.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

This document contains information on products in more than one phase
of development. The status of each device is indicated on the page(s)
specifying its electrical characteristics.

Copyright  2000, Texas Instruments Incorporated

FB/SENSE

RESET

EN

GND

OUT
OUT
IN
IN

TPS779xx

DGK PACKAGE

(TOP VIEW)

1
2
3
4

8
7
6
5

200

150

100

0
–50 –30 –10 10 30 50 70

300

350

400

90 110 130

250

50

TPS77930

DROPOUT VOLTAGE

vs

JUNCTION TEMPERATURE

TJ – Junction Temperature – °C

– Dropout Voltage – mV
V

DO

IL= 0.05 A

IL= 0.15 A

IL= 0.25 A

VI = 2.9 V

TPS77901, TPS77918, TPS77925, TPS77930
250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A – MARCH 2000 – REVISED MARCH 2000

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued)

The device is enabled when the EN pin is connected to a high-level input voltage. This LDO family also features
a sleep mode; applying a TTL low signal to EN (enable) shuts down the regulator, reducing the quiescent current
to less than 1 µA at TJ = 25°C.

The TPS779xx features an integrated power-on reset, commonly used as a supply voltage supervisor (SVS),
or reset output voltage. The RESET

output of the TPS779xx initiates a reset in DSP, microcomputer or
microprocessor systems at power-up and in the event of an undervoltage condition. An internal comparator in
the TPS779xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated
output voltage. When OUT reaches 95% of its regulated voltage, RESET will go to a high-impedance state after
a 220 ms delay . RESET will go to low-impedance state when OUT is pulled below 95% (i.e. over load condition)
of its regulated voltage.

AVAILABLE OPTIONS

T

OUTPUT

VOLTAGE

(V)

PACKAGED DEVICES

J

TYP

MSOP
(DGK)

3.0 TPS77930DGK

2.5 TPS77925DGK

–40°C to 125°C

1.8 TPS77918DGK

Adjustable

1.5 V to 5.5 V

TPS77901DGK

The TPS77901 is programmable using an external resistor divider (see
application information). The DGK package is available taped and
reeled. Add an R suffix to the device type (e.g., TPS77901DGKR).

OUT

SENSE

6

5

3

IN

IN

EN

GND

4

7

1

V

I

0.1 µF

10 µF

+

OUT

8

V

O

RESET OutputRESET

2

Figure 1. Typical Application Configuration (For Fixed Output Options)

TPS77901, TPS77918, TPS77925, TPS77930

250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A – MARCH 2000 – REVISED MARCH 2000

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagram—adjustable version

220 ms Delay

_
+

V

ref

= 1.1834 V

OUT

FB/SENSE

EN

GND

RESET

_

+

IN

External to the device

R1

R2

functional block diagram—fixed-voltage version

_
+

V

ref

= 1.1834 V

OUT

EN

GND

R1

R2

RESET

_

+

IN

SENSE

220 ms Delay

Terminal Functions (TPS779xx)

TERMINAL

NAME NO.

I/O

DESCRIPTION

FB/SENSE 1 I Feedback input voltage for adjustable device (sense input for fixed options)
RESET 2 O Reset output
EN 3 I Enable input
GND 4 Regulator ground
IN 5, 6 I Input voltage
OUT 7, 8 O Regulated output voltage

TPS77901, TPS77918, TPS77925, TPS77930
250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A – MARCH 2000 – REVISED MARCH 2000

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS779xx RESET timing diagram

†

V

res

is the minimum input voltage for a valid RESET . The symbol V

res

is not currently listed within EIA or JEDEC standards

for semiconductor symbology.

V

I

V

res

†

V

res

t

t

t

V

O

Threshold

Voltage

RESET
Output

220 ms
Delay

220 ms
Delay

Output
Undefined

Output

Undefined

V

IT+

‡

V

IT–

‡

V

IT–

‡

V

IT+

‡

‡

VIT –Trip voltage is typically 5% lower than the output voltage (95%VO) V

IT–

to V

IT+

is the hysteresis voltage.

TPS77901, TPS77918, TPS77925, TPS77930

250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A – MARCH 2000 – REVISED MARCH 2000

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating junction temperature range

(unless otherwise noted)

Ĕ

Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range at EN –0.3 V to 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum RESET voltage 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage, V

O

(OUT, FB) 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, TJ –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

‡

All voltage values are with respect to network terminal ground.

DISSIPATION RATING TABLE – FREE-AIR TEMPERATURES

PACKAGE

AIR FLOW

(CFM)

θ

JA

(°C/W)

θ

JC

(°C/W)

TA < 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

0 266.2 3.84 376 mW 3.76 mW/°C 207 mW 150 mW

DGK

150 255.2 3.92 392 mW 3.92 mW/°C 216 mW 157 mW
250 242.8 4.21 412 mW 4.12 mW/°C 227 mW 165 mW

recommended operating conditions

MIN MAX UNIT

Input voltage, V

I

§

2.7 10 V

Output voltage range, V

O

1.5 5.5 V
Output current, IO (see Note 1) 0 250 mA
Operating virtual junction temperature, TJ (see Note 1) –40 125 °C

§

To calculate the minimum input voltage for your maximum output current, use the following equation: V

I(min)

= V

O(max)

+ V

DO(max load)

.

NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the

device operate under conditions beyond those specified in this table for extended periods of time.

TPS77901, TPS77918, TPS77925, TPS77930
250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A – MARCH 2000 – REVISED MARCH 2000

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating junction temperature range (TJ = –40°C to
125°C), V

I

= V

O(typ)

+ 1 V, IO = 1 mA, EN = 5 V, CO = 10 µF (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Adjustable

1.5 V ≤ VO ≤ 5.5 V, TJ = 25°C V

O

j

voltage

1.5 V ≤ VO ≤ 5.5 V 0.98V

O

1.02V

O

p

TJ = 25°C, 2.8 V < VIN < 10 V 1.8

p

1.8 V Output

2.8 V < VIN < 10 V 1.764 1.836

Output voltage (see Notes 2 and 4)

p

TJ = 25°C, 3.5 V < VIN < 10 V 2.5

V

2.5 V Output

3.5 V < VIN < 10 V 2.45 2.55

p

TJ = 25°C, 4.0 V < VIN < 10 V 3.0

3.0 V Output

4.0 V < VIN < 10 V 2.94 3.06
TJ = 25°C 92

Quiescent current (GND current) (see Notes 2 and 4)

125

µ

A

Output voltage line regulation (∆V/V)

VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.005 %/V

gg(

OO

)

(see Note 3)

VO + 1 V < VI ≤ 10 V 0.05 %/V

Load regulation TJ = 25°C 1 mV
Output noise voltage

BW = 300 Hz to 100 kHz, TJ = 25°C,
TPS77930

55 µVrms

Output current Limit VO = 0 V 0.9 1.3 A
Peak output current 2 ms pulse width, 50% duty cycle 400 mA
Thermal shutdown junction temperature 144 °C

EN = V

I,

TJ = 25°C 1 µA

Standby current

EN = V

I

3 µA

FB input current

Adjustable
Voltage

FB = 1.5 V 1 µA

High level enable input voltage 2 V
Low level enable input voltage 0.7 V
Enable input current –1 1 µA
Power supply ripple rejection (TPS77318, TPS77418) f = 1 KHz, TJ = 25°C 55 dB

NOTES: 2. Minimum input operating voltage is 2.7 V or V

O(typ)

+ 1 V , whichever is greater. Maximum input voltage = 10 V, minimum output

current 1 mA.

3. If VO < 1.8 V then V

imax

= 10 V, V

imin

= 2.7 V:

Line Regulation (mV)

+ǒ%ńVǓ

V

O

ǒ

V

imax

*

2.7 V

Ǔ

100

1000

If VO > 2.5 V then V

imax

= 10 V, V

imin

= Vo + 1 V :

Line Regulation (mV)

+ǒ%ńVǓ

V

O

ǒ

V

imax

*ǒVO)

1

Ǔ

Ǔ

100

1000

4. IO = 1 mA to 250 mA