Texas Instruments TPS77633PWP, TPS77633PWPR, TPS77633DR, TPS77633D, TPS77628PWPR Datasheet
...
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Open Drain Power-On Reset With 200-ms
Delay (TPS775xx)
D
Open Drain Power Good (TPS776xx)
D
500-mA Low-Dropout Voltage Regulator
D
Available in 1.5-V, 1.8-V, 2.5-V, 2.8-V
(TPS77628 Only), 3.3-V Fixed Output and
Adjustable Versions
D
Dropout Voltage to 169 mV (Typ) at 500 mA
(TPS77x33)
D
Ultra Low 85 µA Typical Quiescent Current
D
Fast Transient Response
D
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
D
8-Pin SOIC and 20-Pin TSSOP PowerP AD
(PWP) Package
D
Thermal Shutdown Protection
description
The TPS775xx and TPS776xx devices are
designed to have a fast transient response and be
stable with a 10-µF low ESR capacitors. This
combination provides high performance at a
reasonable cost.
TA – Free-Air Temperature – °C
–40 0 20 120
10
3
–60 40 60 80 100
– Dropout Voltage – mV
V
DO
TPS77x33
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
10
2
10
1
10
0
10
–1
10
–2
–20 140
IO = 500 mA
IO = 10 mA
IO = 0
CO = 10 µF
t – Time – µs
TPS77x33
LOAD TRANSIENT RESPONSE
I – Output Current – mA
O
V
O
– Change in∆
Output Voltage – mV
500
0
604020 80 100 140120 160 180 200
0
0
50
–50
CO = 2x47 µF
ESR = 1/2x100 mΩ
VO = 3.3 V
VI = 4.3 V
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
NC – No internal connection
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
GND
NC
EN
IN
IN
NC
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
NC
NC
RESET
/PG
FB/NC
OUT
OUT
GND/HSINK
GND/HSINK
PWP PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
GND
EN
IN
IN
RESET
/PG
FB/NC
OUT
OUT
D PACKAGE
(TOP VIEW)
PowerPAD is a trademark of Texas Instruments Incorporated.
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 169 mV
at an output current of 500 mA for the TPS77x33) and is directly proportional to the output current. Additionally ,
since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent
of output loading (typically 85 µA over the full range of output current, 0 mA to 500 mA). These two key
specifications yield a significant improvement in operating life for battery-powered systems. This LDO family
also features a sleep mode; applying a TTL high signal to EN
(enable) shuts down the regulator, reducing the
quiescent current to 1 µA at T
J
= 25°C.
The RESET output of the TPS775xx initiates a reset in microcomputer and microprocessor systems in the event
of an undervoltage condition. An internal comparator in the TPS775xx monitors the output voltage of the
regulator to detect an undervoltage condition on the regulated output voltage.
Power good (PG) of the TPS776xx is an active high output, which can be used to implement a power-on reset
or a low-battery indicator.
The TPS775xx and TPS776xx are offered in 1.5-V , 1.8-V , 2.5-V , 2.8 V (TPS77628 only), and 3.3-V fixed-voltage
versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V for TPS77501 option and
1.2 V to 5.5 V for TPS77601 option). Output voltage tolerance is specified as a maximum of 2% over line, load,
and temperature ranges. The TPS775xx and TPS776xx families are available in 8 pin SOIC and 20 pin TSSOP
packages.
AVAILABLE OPTIONS
†
T
OUTPUT
VOLTAGE
(V)
PACKAGED DEVICES
J
TYP
TSSOP
(PWP)
SOIC
(D)
3.3 TPS77533PWP TPS77633PWP TPS77533D TPS77633D
2.5 TPS77525PWP TPS77625PWP TPS77525D TPS77625D
2.8 — TPS77628PWP — TPS77628D
1.8 TPS77518PWP TPS77618PWP TPS77518D TPS77618D
–40°C to 125°C
1.5 TPS77515PWP TPS77615PWP TPS77515D TPS77615D
Adjustable
1.2 V to 5.5 V
— TPS77601PWP — TPS77601D
Adjustable
1.5 V to 5.5 V
TPS77501PWP — TPS77501D —
The TPS77x01 is programmable using an external resistor divider (see application information). The D and PWP
packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS77501DR).
†
The TPS775xx has an open-drain power-on reset with a 200-ms delay function. The TPS776xx has an open-drain
power good function.
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
†
See application information section for capacitor selection details.
RESET/
PG
OUT
OUT
7
6
5
IN
IN
EN
GND
3
16
14
13
V
I
0.1 µF
RESET
/PG
V
O
10 µF
+
C
O
†
Figure 1. Typical Application Configuration for Fixed Output Options
functional block diagram—adjustable version
200 ms Delay
(for RESET
Option)
_
+
V
ref
= 1.1834 V
OUT
FB/NC
EN
GND
PG or RESET
_
+
IN
External to the device
R1
R2
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram—fixed-voltage version
_
+
V
ref
= 1.1834 V
OUT
EN
GND
R1
R2
PG or RESET
_
+
IN
200 ms Delay
(for RESET
Option)
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions
SOIC Package (TPS775xx)
TERMINAL
NAME NO.
I/O
DESCRIPTION
EN 2 I Enable input
FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 1 Regulator ground
IN 3, 4 I Input voltage
OUT 5, 6 O Regulated output voltage
RESET 8 O RESET output
TSSOP Package (TPS775xx)
TERMINAL
NAME NO.
I/O
DESCRIPTION
EN 5 I Enable input
FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20
Ground/heatsink
IN 6, 7 I Input voltage
NC 4, 8, 17, 18 No connect
OUT 13, 14 O Regulated output voltage
RESET 16 O RESET output
SOIC Package (TPS776xx)
TERMINAL
NAME NO.
I/O
DESCRIPTION
EN 2 I Enable input
FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 1 Regulator ground
IN 3, 4 I Input voltage
OUT 5, 6 O Regulated output voltage
PG 8 O PG output
TSSOP Package (TPS776xx)
TERMINAL
NAME NO.
I/O
DESCRIPTION
EN 5 I Enable input
FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20
Ground/heatsink
IN 6, 7 I Input voltage
NC 4, 8, 17, 18 No connect
OUT 13, 14 O Regulated output voltage
PG 16 O PG output
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS775xx RESET timing diagram
†
V
res
is the minimum input voltage for a valid RESET . The symbol V
res
is not currently listed within EIA or JEDEC standards
for semiconductor symbology.
V
I
V
res
†
V
res
t
t
t
V
O
Threshold
Voltage
RESET
Output
200 ms
Delay
200 ms
Delay
Output
Undefined
Output
Undefined
V
IT+
‡
V
IT–
‡
V
IT–
‡
V
IT+
‡
Less than 5% of the
output voltage
‡
VIT –Trip voltage is typically 5% lower than the output voltage (95%VO) V
IT–
to V
IT+
is the hysteresis voltage.
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Ĕ
Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN –0.3 V to 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum RESET
voltage (TPS775xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum PG voltage (TPS776xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, VO (OUT, FB) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
J
–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES
PACKAGE
AIR FLOW
(CFM)
TA < 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
0 568 mW 5.68 mW/°C 312 mW 227 mW
D
250 904 mW 9.04 mW/°C 497 mW 361 mW
DISSIPATION RATING TABLE 2 – FREE-AIR TEMPERATURES
PACKAGE
AIR FLOW
(CFM)
TA < 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
0 2.9 W 23.5 mW/°C 1.9 W 1.5 W
PWP
#
300 4.3 W 34.6 mW/°C 2.8 W 2.2 W
0 3 W 23.8 mW/°C 1.9 W 1.5 W
PWP
||
300 7.2 W 57.9 mW/°C 4.6 W 3.8 W
#
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper,
2-in × 2-in coverage (4 in2).
||
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer
to TI technical brief SLMA002.
recommended operating conditions
MIN MAX UNIT
Input voltage, V
I
k
2.7 10 V
p
TPS77501 1.5 5.5
Output voltage range, V
O
TPS77601 1.2 5.5
V
Output current, IO (Note 1) 0 500 mA
Operating virtual junction temperature, TJ (Note 1) –40 125 °C
k
To calculate the minimum input voltage for your maximum output current, use the following equation: V
I(min)
= V
O(max)
+ V
DO(max load)
.
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
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