Datasheet TPS767D325PWP, TPS767D325PWPR, TPS767D318PWPR, TPS767D318PWP, TPS767D301PWPR Datasheet (Texas Instruments)

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TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Dual Output Voltages for Split-Supply Applications

Output Current Range of 0 mA to 1.0 A Per Regulator

3.3-V/2.5-V, 3.3-V/1.8-V, and 3.3-V/Adjustable Output

Fast-Transient Response

2% Tolerance Over Load and Temperature

Dropout Voltage Typically 350 mV at 1 A

Ultra Low 85 µA Typical Quiescent Current

1 µA Quiescent Current During Shutdown

Dual Open Drain Power-On Reset With 200-ms Delay for Each Regulator

28-Pin PowerP AD TSSOP Package

Thermal Shutdown Protection for Each Regulator

description

The TPS767D3xx family of dual voltage regulators offers fast transient response, low dropout voltages and dual outputs in a compact package and incorporating stability with 10-µF low ESR output capacitors.

t – Time – µs

LOAD TRANSIENT RESPONSE

I – Output Current – A

– Change in∆

Output Voltage – mV

0.5

604020 80 100 140120 160 180 200

VO = 3.3 V CL =100 µF TA = 25°C

100

–50

–100

TA – Free-Air Temperature – °C

–40 0 20 120

–60 40 60 80 100

– Dropout Voltage – mV V

DROPOUT VOLTAGE

FREE-AIR TEMPERATURE

–1

–2

–20 140

IO = 1 A

IO = 10 mA

IO = 0

VO = 3.3 V CO = 10 µF

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments Incorporated.

1 2 3 4 5 6 7 8 9 10 11 12 13 14

28 27 26 25 24 23 22 21 20 19 18 17 16 15

NC NC

1GND

1EN

1IN 1IN

NC NC

2GND

2EN

2IN 2IN

NC NC

1RESET NC NC 1FB/NC 1OUT 1OUT 2RESET NC NC NC 2OUT 2OUT NC NC

PWP PACKAGE

(TOP VIEW)

NC – No internal connection

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued)

The TPS767D3xx family of dual voltage regulators is designed primarily for DSP applications. These devices can be used in any mixed-output voltage application, with each regulator supporting up to 1 A. Dual active-low reset signals allow resetting of core-logic and I/O separately.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 350 mV at an output current of 1 A for the TPS767D325) and is directly proportional to the output current. Additionally , since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN

(enable) shuts down the regulator, reducing the quiescent current

to 1 µA at T

= 25°C.

The RESET

output of the TPS767D3xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS767D3xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.

The TPS767D3xx is offered in 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS767D3xx family is available in 28 pin PWP TSSOP package. They operate over a junction temperature range of –40°C to 125°C.

AVAILABLE OPTIONS

REGULATOR 1

VO (V)

REGULATOR 2

VO (V)

TSSOP

(PWP)

Adj (1.5 – 5.5 V) 3.3 V TPS767D301PWP

–40°C to 125°C

1.8 V 3.3 V TPS767D318PWP

2.5 V 3.3 V TPS767D325PWP

The TPS767D301 is adjustable using an external resistor divider (see application information). The PWP packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS767D301PWPR).

RESET

OUT

IN IN

GND

24 23

0.1 µF

50 V

RESET

10 µF

TPS767D3xx

250 kΩ

Figure 1. Typical Application Circuit (Fixed Versions) for Single Channel

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagram—adjustable version (for each LDO)

_ +

ref

= 1.1834 V

OUT

GND

RESET

200 ms Delay

functional block diagram—fixed-voltage version (for each LDO)

200 ms Delay

_ +

ref

= 1.1834 V

OUT

FB/NC

GND

RESET

External to the device

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Terminal Functions

TERMINAL

NAME NO.

I/O

DESCRIPTION

1GND 3 Regulator #1 ground 1EN 4 I Regulator #1 enable 1IN 5, 6 I Regulator #1 input supply voltage 2GND 9 Regulator #2 ground 2EN 10 I Regulator #2 enable 2IN 11, 12 I Regulator #2 input supply voltage 2OUT 17, 18 O Regulator #2 output voltage 2RESET 22 O Regulator #2 reset signal 1OUT 23, 24 O Regulator #1 output voltage 1FB/NC 25 I Regulator #1 output voltage feedback for adjustable and no connect for fixed output 1RESET 28 O Regulator #1 reset signal NC 1, 2, 7, 8,

13–16, 19, 20,

21, 26, 27

No connection

timing diagram

†

res

is the minimum input voltage for a valid RESET

. The symbol V

res

is not currently listed within EIA or JEDEC standards

for semiconductor symbology.

res

†

res

Threshold

Voltage

RESET Output

200 ms Delay

Output Undefined

Output

Undefined

IT+

‡

IT–

IT+

‡

Less than 5% of the output voltage

‡

VIT –Trip voltage is typically 5% lower than the output voltage (95%VO)

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

†

Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (1IN, 2IN, EN) –0.3 V to VI + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage, V

(1OUT, 2OUT) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage, VO (RESET) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T

–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

‡

All voltage values are with respect to network terminal ground.

DISSIPATION RATING TABLE

PACKAGE

AIR FLOW

(CFM)

TA ≤ 25°C

POWER RATING

БББББ

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

3.58 W

35.8 mW/°C

1.97 W

1.43 W

PWP

†

250 5.07 W

50.7 mW/°C 2.79 W 2.03 W

†

This parameter is measured with the recommended copper heat sink pattern on a 4–layer PCB, 1 oz. copper on 4–in x 4–in ground layer. For more information, refer to TI technical brief literature number SLMA002.

recommended operating conditions

MIN MAX UNIT

Input voltage, V

(1IN, 2IN)

2.7 10 V Output current for each LDO, IO (Note 1) 0 1.0 A Output voltage range, VO (1OUT, 2OUT) 1.5 5.5 V Operating virtual junction temperature, T

–40 125 °C

To calculate the minimum input voltage for your maximum output current, use the following equation: V

I(min)

= V

O(max)

+ V

DO(max load)

NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the

device operate under conditions beyond those specified in this table for extended periods of time.

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics, V

= V

O(nom)

+ 1 V , IO = 1 mA, EN = 0, CO = 10 µF(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

1.5 V ≤ V

≤ 5.5 V,

TJ = 25°C V

Adjustable

10 µA < IO < 1 A

TJ = –40°C to 125°C 0.98V

1.02V

2.8 V < V

< 10 V,

TJ = 25°C 1.8

Output voltage (V

)

1.8 V Ouput

10 µA < IO < 1 A

TJ = –40°C to 125°C 1.764 1.836

g(O)

(see Note 2)

3.5 V < V

< 10 V,

TJ = 25°C 2.5

2.5 V Output

10 µA < IO < 1 A

TJ = –40°C to 125°C 2.45 2.55

4.3 V < V

< 10 V,

TJ = 25°C 3.3

3.3 V Output

10 µA < IO < 1 A

TJ = –40°C to 125°C 3.234 3.366

Quiescent current (GND current) for each LDO

10 µA < IO < 1 A, TJ = 25°C 85

(

see Note

IO = 1 A, TJ = –40°C to 125°C 125

Output voltage line regulation for each LDO (∆VO/V

)

(see Notes 2 and 3)

VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.01 %/V

Output noise voltage

BW = 300 Hz to 50 kHz, CO = 10 µF, TJ = 25°C

190 µVrms

Output current Limit for each LDO VO = 0 V 1.7 2 A Thermal shutdown juction temperature 150 °C

2.7 < VI < 10V , TJ = 25°C,

EN = V

1 µA

Standby current for each LDO

2.7 < VI < 10V , TJ = –40°C to 125°C

EN = V

10 µA

FB input current Adjustable FB = 1.5 V 2 nA High level enable input voltage 2.0 V Low level enable input voltage 0.8 V

Power supply ripple rejection (see Note 2)

f = 1 KHz, TJ = 25°C,

CO = 10 µF

60 dB

Minimum input voltage for valid RESET I

O(RESET)

= 300µA 1.1 V

Trip threshold voltage VO decreasing 92 98 %V

Hysteresis voltage Measured at V

0.5 %V

Reset

Output low voltage VI = 2.7 V, I

O(RESET)

= 1 mA 0.15 0.4 V

Leakage current V

(RESET)

= 7 V 1 µA

RESET time-out delay 200 mA

NOTES: 2. Minimum IN operating voltage is 2.7 V or V

O(typ)

+ 1 V, whichever is greater. maximum IN voltage 10V.

3. If VO ≤ 1.8 V, V

imin

= 2.7 V, and V

imax

= 10 V:

Line Reg. (mV)

+ǒ%ńVǓ

imax

2.7 V

100

1000

If VO ≥ 2.5 V, V

imin

= Vo + 1 V, and V

imax

= 10 V:

Line Reg. (mV)

+ǒ%ńVǓ

imax

*ǒVO)

100

1000

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics, V

= V

O(nom)

+ 1 V , IO = 1 mA, EN = 0, CO = 10 µF(unless otherwise noted)

(continued)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

EN = 0 V –1 0 1

Input current (EN)

EN = V

–1 1

Load regulation 3 mV

= 3.3 V,

TJ = 25°C 350

Dropout voltage (see Note 4)

IO = 1 A

TJ = –40°C to 125°C 575

NOTE 4: IN voltage equals Vo(T yp) – 100mV; Adjustable output voltage set to 3.3V nominal with external resistor divider . 1.8V , and 2.5V dropout

voltage is limited by input voltage range limitations.

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

vs Output current 2, 3, 4

Output voltage

vs Free-air temperature 5, 6, 7 Ground current vs Free-air temperature 8, 9 Power supply ripple rejection vs Frequency 10 Output spectral noise density vs Frequency 11 Output impedance vs Frequency 12 Dropout voltage vs Free-air temperature 13 Line transient response 14, 16 Load transient response 15, 17 Output voltage vs Time 18 Dropout voltage vs Input voltage 19

vs Output current, TA = 25°C 21

vs Output current, TJ = 125°C 22

Equivalent series resistance (ESR)

vs Output Current, TA = 25°C 23

vs Output current, TJ = 125°C 24

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 2

IO – Output Current – A

OUTPUT VOLTAGE

OUTPUT CURRENT

3.2830

3.2815

3.2800

0.1 0.3

3.2825

3.2820

3.2810

0.2 0.8 1

3.2835

0 0.9

– Output Voltage – V V

3.2805

0.4 0.5 0.6 0.7

VO = 3.3 V VI = 4.3 V TA = 25°C

Figure 3

IO – Output Current – A

– Output Voltage – V V

OUTPUT VOLTAGE

OUTPUT CURRENT

0.1 0.30.2 0.8 10 0.90.4 0.5 0.6 0.7

VO = 1.8 V VI = 2.8V TA = 25°C

1.7965

1.7960

1.7955

1.7950

1.7945

1.7940

Figure 4

IO – Output Current – A

OUTPUT VOLTAGE

OUTPUT CURRENT

2.4955

2.4940

2.4920

0.1 0.3

2.4950

2.4945

2.4935

0.2 0.4 0.6

2.4960

0 0.5

– Output Voltage – V V

VO = 2.5 V VI = 3.5 V TA = 25°C

2.4930

2.4925

0.80.7 0.9 1

Figure 5

TA – Free-Air Temperature – °C

OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

– Output Voltage – V

3.31

3.28

3.25 –40 0

3.30

3.29

3.27

–20 100 140

3.32

–60 120

3.26

20 40 60 80

VO = 3.3 V VI = 4.3 V

IO = 1 A

IO = 1 mA

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 6

TA – Free-Air Temperature – °C

OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

– Output Voltage – V

1.800

1.785 –40 0

1.810

1.805

1.795

–20 100 140

1.815

–60 120

1.790

20 40 60 80

IO = 1 mA

IO = 1 A

VO = 1.8 V VI = 2.8 V

Figure 7

TA – Free-Air Temperature – °C

OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

– Output Voltage – V V

–40 0–20 100–60 12020 40 60 80

2.515

2.500

2.480

2.510

2.505

2.495

2.490

2.485

VO = 2.5 V VI = 3.5 V

IO = 1 A

IO = 1 mA

TA – Free-Air Temperature – °C

GROUND CURRENT

FREE-AIR TEMPERATURE

Ground Current – Aµ

82 80

–40 0–20 100–60 12020 40 60 80 140

VO = 3.3 V VI = 4.3 V

IO = 500 mA

IO = 1 A

IO = 1 mA

Figure 8 Figure 9

TA – Free-Air Temperature – °C

GROUND CURRENT

FREE-AIR TEMPERATURE

Ground Current – Aµ

92 90

84 82 80 78 76

–40 0–20 100–60 12020 40 60 80 140

IO = 500 mA

IO = 1 A

IO = 1 mA

VO = 1.8 V VI = 2.8 V

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 10

100k10k

PSRR – Power Supply Ripple Rejection – dB

f – Frequency – Hz

POWER SUPPLY RIPPLE REJECTION

FREQUENCY

60 50 40

–10

90 80

1k10010

VO = 3.3 V VI = 4.3 V CO = 10 µF IO = 1 A TA = 25°C

Figure 11

f – Frequency – Hz

–5

–6

–8

–7

OUTPUT SPECTRAL NOISE DENSITY

FREQUENCY

IO = 7 mA

IO = 1 A

VI = 4.3 V CO = 10 µF TA = 25°C

– Output Spectral Noise Density – V/ HzV

Figure 12

f – Frequency – kHz

– Output Impedance –Z

Ω

OUTPUT IMPEDANCE

FREQUENCY

–1

–2

IO = 1 mA

IO = 1 A

VI = 4.3 V CO = 10 µF TA = 25°C

Figure 13

TA – Free-Air Temperature – °C

–40 0 20 120

–60 40 60 80 100

– Dropout Voltage – mV

DROPOUT VOLTAGE

FREE-AIR TEMPERATURE

–1

–2

–20 140

IO = 1 A

IO = 10 mA

IO = 0

VO = 3.3 V CO = 10 µF

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 14

– Change in

3.8

2.8

LINE TRANSIENT RESPONSE

t – Time – µs

0604020 80 100 140120 160 180 200

– Input Voltage – V

∆

Output Voltage – mV

VO = 1.8 V IL = 10 mA CL = 10 µF TA = 25°C

–20

Figure 15

t – Time – µs

LOAD TRANSIENT RESPONSE

I – Output Current – A

– Change in∆

Output Voltage – mV

VO = 1.8 V VI = 2.8 V CL = 100 µF TA = 25°C

0.5

0604020 80 100 140120 160 180 200

100

–50

–100

Figure 16

LINE TRANSIENT RESPONSE

t – Time – µs

– Change in

– Input Voltage – V

∆

Output Voltage – mV

5.3

604020 80 100 140120 160 180 200

VO = 3.3 V CL = 10 µF TA = 25°C

4.3

–10

Figure 17

t – Time – µs

LOAD TRANSIENT RESPONSE

I – Output Current – A

– Change in∆

Output Voltage – mV

0.5

604020 80 100 140120 160 180 200

VO = 3.3 V CL =100 µF TA = 25°C

100

–50

–100

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 18

t – Time – µs

OUTPUT VOLTAGE

TIME (AT STARTUP)

604020 80 100 140120 160 180 2000

– Output Voltage – V

Enable Pulse – V

Figure 19

VI – Input Voltage – V

600

300

500

400

200

3.52.5

– Dropout Voltage – mV

100

4.5 5

DROPOUT VOLTAGE

INPUT VOLTAGE

900

800

700

TA = 125°C

TA = –40°C

TA = 25°C

IO = 1A

OUT

GND

ESR

To Load

Figure 20. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (fixed output options)

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 21

0.1 0 200 400 600 800 1000

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

IO – Output Current – mA

ESR – Equivalent series restance – Ω

Vo = 3.3V CL = 4.7µF VI = 4.3V TA = 25°C

Region of Stability

Region of Instability

Figure 22

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

IO – Output Current – mA

ESR – Equivalent Series Resistance –

Ω

0.1 0 200 400 600 800 1000

Region of Stability

Region of Instability

VO = 3.3 V Cl = 4.7 µF VI = 4.3 V TJ = 125°C

Figure 23

0.1 0 200 400 600 800 1000

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

IO – Output Current – mA

ESR – Equivalent series restance – Ω

Region of Instability

Region of Stability

VO = 3.3V CL = 22µF VI = 4.3V TA = 25°C

Figure 24

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

0.1 0 200 400 600 800 1000

IO – Output Current – mA

VO = 3.3V Cl = 22µF VI = 4.3V TJ = 125°C

Region of Stability

Region of Instability

ESR – Equivalent Series Resistance –

Ω

†

Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

The features of the TPS767D3xx family (low-dropout voltage, ultra low quiescent current, power-saving shutdown mode, and a supply-voltage supervisor) and the power-dissipation properties of the TSSOP PowerPAD package have enabled the integration of the dual LDO regulator with high output current for use in DSP and other multiple voltage applications. Figure 25 shows a typical dual-voltage DSP application.

NC NC 1GND 1EN 1IN 1IN NC NC 2GND 2EN 2IN 2IN NC NC

1RESET

NC NC

1FB/NC

1OUT 1OUT

2RESET

NC NC

NC 2OUT 2OUT

28 27 26 25 24 23 22 21 20 19 18 17 16 15

1 2 3 4 5 6 7 8

9 10 11 12 13 14

1 µF

TPS767D325

33 µF

3.3 V

GND

100 kΩ

5 V

DL5817

2.5 V

DL4148

33 µF

(Core Supply)

(I/O Supply)

GND

VC549

DSP

RESET to DSP

1 µF

Figure 25. Dual-Voltage DSP Application

DSP power requirements include very high transient currents that must be considered in the initial design. This design uses higher-valued output capacitors to handle the large transient currents.

device operation

The TPS767D3xx features very low quiescent current, which remain virtually constant even with varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current through the regulator (IB = IC/β). Close examination of the data sheets reveals that these devices are typically specified under near no-load conditions; actual operating currents are much higher as evidenced by typical quiescent current versus load current curves. The TPS767D3xx uses a PMOS transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range. The TPS767D3xx specifications reflect actual performance under load condition.

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. The TPS767D3xx quiescent current remains low even when the regulator drops out, eliminating both problems.

The TPS767D3xx family also features a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to under 2 µA. If the shutdown feature is not used, EN should be tied to ground. Response to an enable transition is quick; regulated output voltage is typically reestablished in 120 µs.

minimum load requirements

The TPS767D3xx family is stable even at zero load; no minimum load is required for operation.

FB - pin connection (adjustable version only)

The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output voltage is sensed through a resistor divider network as is shown in Figure 27 to close the loop. Normally , this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally , FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential. In fixed output options this pin is a no connect.

external capacitor requirements

An input capacitor is not required; however, a ceramic bypass capacitor (0.047 pF to 0.1 µF) improves load transient response and noise rejection when the TPS767D3xx is located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated.

Like all low dropout regulators, the TPS767D3xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR (equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described previously.

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

external capacitor requirements (continued)

When necessary to achieve low height requirements along with high output current and/or high ceramic load capacitance, several higher ESR capacitors can be used in parallel to meet the previous guidelines.

RESET

OUT

IN IN

GND

24 23

0.1 µF

50 V

RESET

10 µF

TPS767D3xx

250 kΩ

Figure 26. Typical Application Circuit (Fixed Versions) for Single Channel

programming the TPS767D301 adjustable LDO regulator

The output voltage of the TPS767D301 adjustable regulator is programmed using an external resistor divider as shown in Figure 27. The output voltage is calculated using:

VO+

ref

ǒ1

)

R1 R2

(1)

Where:

ref

= 1.1834 V typ (the internal reference voltage)

Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:

ref

(2)

OUTPUT

VOLTAGE

R1 R2

2.5 V

3.3 V

3.6 V

4 75V

UNIT

33.2

53.6

61.9

90.8

30.1

kΩ kΩ kΩ kΩ

OUTPUT VOLTAGE

PROGRAMMING GUIDE

RESET

OUT

FB / NC

GND

<0.5V

>2.7 V

TPS767D301

RESET

Output

0.1 µF 250 kΩ

10 µF

Figure 27. TPS767D301 Adjustable LDO Regulator Programming

TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Reset indicator

The TPS767D3xx features a RESET output that can be used to monitor the status of the regulator . The internal comparator monitors the output voltage: when the output drops to 95% (typical) of its regulated value, the RESET output transistor turns on, taking the signal low . The open-drain output requires a pullup resistor . If not used, it can be left floating. RESET

can be used to drive power-on reset circuitry or as a low-battery indicator.

regulator protection

The TPS767D3xx PMOS-pass transistor has a built-in back-gate diode that safely conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate.

The TPS767D3xx also features internal current limiting and thermal protection. During normal operation, the TPS767D3xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes.

power dissipation and junction temperature

Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P

D(max)

, and the actual dissipation, PD, which must be less than

or equal to P

D(max)

The maximum-power-dissipation limit is determined using the following equation:

D(max)

TJmax*T

Where:

max is the maximum allowable junction temperature

is the ambient temperature.

θJA

is the thermal resistance junction-to-ambient for the package, i.e., 27.9°C/W for the 28-terminal

PWP with no airflow.

The regulator dissipation is calculated using:

PD+ǒVI*

Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit.

TPS767D301, TPS767D318, TPS767D325 DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE

4073225/E 03/97

0,50

0,75

0,25

0,15 NOM

Thermal Pad (See Note D)

Gage Plane

2824

7,70

7,90

6,40

6,60

9,60

9,80

6,60 6,20

0,19

4,50 4,30

0,15

0,30

1,20 MAX

1614

5,10

4,90

PINS **

4,90

5,10

DIM

A MIN

A MAX

0,05

Seating Plane

0,65

0,10

0°–8°

20-PIN SHOWN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusions. D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically

and thermally connected to the backside of the die and possibly selected leads.

E. Falls within JEDEC MO-153

PowerPAD is a trademark of Texas Instruments Incorporated.

IMPORTANT NOTICE

T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Datasheet TPS767D325PWP, TPS767D325PWPR, TPS767D318PWPR, TPS767D318PWP, TPS767D301PWPR Datasheet (Texas Instruments)

Specifications and Main Features

Frequently Asked Questions

User Manual