150
−100
100
200
0
100
0
t − Time − µs
CO= 4.7 µF
ESR = 0.25 Ω
TJ= 25°C
0 604020 80 100 140120 160 180 200
I − Output Current − mA
O
V
O
− Change in
∆
Output Voltage − mV
−200
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Design
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
TPS763 Low-Power, 150-mA, Low-Dropout Linear Regulator
TPS763
1 Features
1
• 150-mA, low-dropout regulator
• Output voltage: 5 V, 3.8 V, 3.3 V, 3 V, 2.8 V,
2.7 V, 2.5 V, 1.8 V, 1.6 V, and variable
• Dropout voltage, typically 300 mV at 150 mA
• Thermal protection
• Overcurrent limitation
• Less than 2-µA quiescent current in shutdown
mode
• –40°C to 125°C operating junction temperature
range
• 5-pin SOT-23 (DBV) package
2 Applications
• Electricity meters
• Solar inverters
• HVAC systems
• Servo drives and motion control
• Sensor transmitters
TPS76350 Load Transient Response
3 Description
The TPS763xx family of low-dropout (LDO) voltage
regulators offers the benefits of low-dropout voltage,
low-power operation, and miniaturized packaging.
These regulators feature low dropout voltages and
quiescent currents compared to conventional LDO
regulators. Offered in a 5-pin, small outline
integrated-circuit SOT-23 package, the TPS763xx
series devices are ideal for cost-sensitive designs
and for applications where board space is at a
premium.
A combination of new circuit design and process
innovation has enabled the usual pnp pass transistor
to be replaced by a PMOS pass element. Because
the PMOS pass element behaves as a low-value
resistor, the dropout voltage is low—typically 300 mV
at 150 mA of load current (TPS76333)—and is
directly proportional to the load current. Because the
PMOS pass element is a voltage-driven device, the
quiescent current is low (140 µA maximum) and is
stable over the entire range of output load current
(0 mA to 150 mA). Intended for use in portable
systems such as laptops and cellular phones, the
low-dropout voltage feature and low-power operation
result in a significant increase in system battery
operating life.
The TPS763xx also features a logic-enabled sleep
mode to shut down the regulator, reducing quiescent
current to 1 µA maximum at TJ= 25°C.The
TPS763xx is offered in 1.6-V ,1.8-V, 2.5-V, 2.7-V,
2.8-V, 3-V, 3.3-V, 3.8-V, and 5-V fixed-voltage
versions and in a variable version (programmable
over the range of 1.5 V to 6.5 V).
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS763xx SOT-23 (5) 2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
(1)
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
www.ti.com
Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 3
7 Absolute Maximum Ratings.................................. 3
8 ESD Ratings ........................................................... 3
9 Recommended Operating Conditions ................. 3
10 Thermal Information.............................................. 4
11 Electrical Characteristics ..................................... 4
11.1 Typical Characteristics............................................ 7
12 Detailed Description ........................................... 11
12.1 Overview............................................................... 11
12.2 Functional Block Diagram..................................... 11
12.3 Feature Description............................................... 11
12.4 Device Functional Modes...................................... 12
13 Application and Implementation........................ 13
13.1 Application Information.......................................... 13
13.2 Typical Application................................................ 13
14 Power Supply Recommendations ..................... 16
14.1 Power Dissipation and Junction Temperature...... 16
15 Layout................................................................... 16
15.1 Layout Guidelines................................................. 16
15.2 Layout Example.................................................... 16
16 Device and Documentation Support ................. 17
16.1 Receiving Notification of Documentation Updates 17
16.2 Community Resources.......................................... 17
16.3 Trademarks........................................................... 17
16.4 Electrostatic Discharge Caution............................ 17
16.5 Glossary................................................................ 17
17 Mechanical, Packaging, and Orderable
Information........................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (December 2016) to Revision J Page
• Changed minimum specification from 4.75 V to 4.85 V in VOparameter for TPS76350, IO= 1 mA to 150 mA row in
Electrical Characteristics table ............................................................................................................................................... 5
Changes from Revision H (January 2004) to Revision I Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
• Deleted Legacy Applications and Non-Ceramic Capacitor Stability from Applications ......................................................... 1
• Added Electricity Meters, Solar Inverters, HVAC Systems, Servo Drives and Motion Control, and Sensor
Transmitters to Applications ................................................................................................................................................... 1
• Deleted Dissipation Ratings table........................................................................................................................................... 3
• Added Thermal Information table ........................................................................................................................................... 4
2
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Product Folder Links: TPS763
3
2
4
5
1
IN
GND
EN
OUT
NC/FB
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SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
Pin Functions
PIN
NO. NAME
1 IN I Input supply voltage
2 GND — Ground
3 EN I Enable input
4 NC/FB —/I No connection (fixed-voltage option only) or feedback voltage (TPS76301 only)
5 OUT O Regulated output voltage
I/O DESCRIPTION
6 Specifications
TPS763
7 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Input voltage –0.3 10 V
Voltage at EN –0.3 VI+ 0.3 V
Voltage on OUT, FB 7 V
Peak output current Internally limited
Operating junction temperature, T
Storage temperature, T
stg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
J
(1)
MIN MAX UNIT
–40 150 °C
–65 150 °C
8 ESD Ratings
VALUE UNIT
V
Electrostatic discharge
(ESD)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
Charged-device model (CDM), per JEDEC specification JESD22-C101
(1)
(2)
±2000
±250
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
9 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
I
I
O
T
J
Input voltage
Continuous output current 0 150 mA
Operating junction temperature –40 125 °C
(1) To calculate the minimum input voltage for your maximum output current, use the following equation: V
(1)
2.7 10 V
I(min)
= V
O(max)
+ V
DO(max load)
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SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
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10 Thermal Information
TPS763xx
THERMAL METRIC
(1)
UNITDBV (SOT-23)
5 PINS
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
Junction-to-ambient thermal resistance 205.3 °C/W
Junction-to-case (top) thermal resistance 125.1 °C/W
Junction-to-board thermal resistance 34.6 °C/W
Junction-to-top characterization parameter 15.2 °C/W
Junction-to-board characterization parameter 33.8 °C/W
Junction-to-case (bottom) thermal resistance — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
11 Electrical Characteristics
over recommended operating free-air temperature range, VI= V
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
3.25 V > VI≥ 2.7 V,
2.5 V ≥ VO≥ 1.5 V,
IO= 1 mA to 75 mA, TJ= 25°C
3.25 V > VI≥ 2.7 V,
2.5 V ≥ VO≥ 1.5 V,
IO= 1 mA to 75 mA
TPS76301
V
O
Output voltage
TPS76316
TPS76318
VI≥ 3.25 V, 5 V ≥ VO≥ 1.5 V,
IO= 1 mA to 100 mA, TJ= 25°C
VI≥ 3.25 V, 5 V ≥ VO≥ 1.5 V,
IO= 1 mA to 100 mA
VI≥ 3.25 V, 5 V ≥ VO≥ 1.5 V,
IO= 1 mA to 150 mA, TJ= 25°C
VI≥ 3.25 V, 5 V ≥ VO≥ 1.5 V,
IO= 1 mA to 150 mA
VI= 2.7 V, 1 mA < IO< 75 mA,
TJ= 25°C
VI= 2.7 V, 1 mA < IO< 75 mA 1.552 1.6 1.648
VI= 3.25 V, 1 mA < IO< 100 mA,
TJ= 25°C
VI= 3.25 V, 1 mA < IO< 100 mA 1.552 1.6 1.648
VI= 3.25 V, 1 mA < IO< 150 mA,
TJ= 25°C
VI= 3.25 V, 1 mA < IO< 150 mA 1.536 1.6 1.664
VI= 2.7 V, 1 mA < IO< 75 mA,
TJ= 25°C
VI= 2.7 V, 1 mA < IO< 75 mA 1.746 1.8 1.854
VI= 3.25 V, 1 mA < IO< 100 mA,
TJ= 25°C
VI= 3.25 V, 1 mA < IO< 100 mA 1.746 1.8 1.854
VI= 3.25 V, 1 mA < IO< 150 mA,
TJ= 25°C
VI= 3.25 V, 1 mA < IO< 150 mA 1.733 1.8 1.867
+ 1 V, IO= 1 mA, EN = IN, and CO= 4.7 µF (unless
O(typ)
0.98 × V
0.97 × V
0.98 × V
0.97 × V
0.975 × V
0.9625 × V
O
O
O
O
O
O
V
1.02 × V
O
V
1.03 × V
O
V
1.02 × V
O
V
1.03 × V
O
VO1.025 × V
VO1.0375 × V
1.568 1.6 1.632
1.568 1.6 1.632
1.56 1.6 1.64
1.764 1.8 1.836
1.764 1.8 1.836
1.755 1.8 1.845
O
O
O
O
O
O
V
4
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O Im ax O
V (V (V 1))
100
- +
= ´ ´
O Im ax
V (V 3.5 V)
100
-
= ´ ´
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Electrical Characteristics (continued)
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
over recommended operating free-air temperature range, VI= V
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IO= 1 mA to 100 mA, TJ= 25°C 2.45 2.5 2.55
TPS76325
TPS76327
TPS76328
O
Output voltage
(continued)
TPS76330
V
TPS76333
TPS76338
TPS76350
I
(Q)
Quiescent current
(GND pin current)
Standby current
V
Output noise voltage BW = 300 Hz to 50 kHz, TJ= 25°C, CO= 10 µF
n
IO= 1 mA to 150 mA, TJ= 25°C
IO= 1 mA to 150 mA
EN < 0.5 V, TJ= 25°C 0.5 1
EN < 0.5 V 2
PSRR Ripple rejection f = 1 kHz, CO= 10 µF, TJ= 25°C
Current limit TJ= 25°C
Output voltage line
regulation
(ΔVO/VO)
V
V
IH
IL
EN high level input
EN low level input
(3)
VO+ 1 V < VI≤ 10 V, VI≥ 3.5 V, TJ= 25°C 0.04% 0.07%
VO+ 1 V < VI≤ 10 V, VI≥ 3.5 V 0.1%
(2)
(2)
IO= 1 mA to 100 mA 2.425 2.5 2.575
IO= 1 mA to 150 mA, TJ= 25°C 2.438 2.5 2.562
IO= 1 mA to 150 mA 2.407 2.5 2.593
IO= 1 mA to 100 mA, TJ= 25°C 2.646 2.7 2.754
IO= 1 mA to 100 mA 2.619 2.7 2.781
IO= 1 mA to 150 mA, TJ= 25°C 2.632 2.7 2.767
IO= 1 mA to 150 mA 2.599 2.7 2.801
IO= 1 mA to 100 mA, TJ= 25°C 2.744 2.8 2.856
IO= 1 mA to 100 mA 2.716 2.8 2.884
IO= 1 mA to 150 mA, TJ= 25°C 2.73 2.8 2.87
IO= 1 mA to 150 mA 2.695 2.8 2.905
IO= 1 mA to 100 mA, TJ= 25°C 2.94 3 3.06
IO= 1 mA to 100 mA 2.91 3 3.09
IO= 1 mA to 150 mA, TJ= 25°C 2.925 3 3.075
IO= 1 mA to 150 mA 2.888 3 3.112
IO= 1 mA to 100 mA, TJ= 25°C 3.234 3.3 3.366
IO= 1 mA to 100 mA 3.201 3.3 3.399
IO= 1 mA to 150 mA, TJ= 25°C 3.218 3.3 3.382
IO= 1 mA to 150 mA 3.177 3.3 3.423
IO= 1 mA to 100 mA, TJ= 25°C 3.724 3.8 3.876
IO= 1 mA to 100 mA 3.705 3.8 3.895
IO= 1 mA to 150 mA, TJ= 25°C 3.686 3.8 3.914
IO= 1 mA to 150 mA 3.667 3.8 3.933
IO= 1 mA to 100 mA, TJ= 25°C 4.875 5 5.125
IO= 1 mA to 100 mA 4.825 5 5.175
IO= 1 mA to 150 mA, TJ= 25°C 4.85 5 5.15
IO= 1 mA to 150 mA 4.8 5 5.2
(1)
(2)
(2)
(3)
+ 1 V, IO= 1 mA, EN = IN, and CO= 4.7 µF (unless
O(typ)
85 100
(2)
140 µV
60 dB
0.5 0.8 1.5 A
1.4 2 V
0.5 1.2 V
140
V
µA
µA
V
(1) Minimum IN operating voltage is 2.7 V or V
(2) Test conditions includes output voltage VO= 0 V (for variable device FB is shorted to VO), and pulse duration = 10 mS.
(3) If VO< 2.5 V and V
If VO> 2.5 V and V
Imax
Imax
= 10 V, V
= 10 V, V
= 3.5 V:
Imin
= VO + 1 V:
Imin
+ 1 V, whichever is greater.
O(typ)
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TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
Electrical Characteristics (continued)
www.ti.com
over recommended operating free-air temperature range, VI= V
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
I
V
DO
EN input current
Dropout voltage
EN = 0 V –0.01 –0.5
EN = IN –0.01 –0.5
IO= 0 mA, TJ= 25°C 0.2
IO= 1 mA, TJ= 25°C 3
IO= 50 mA, TJ= 25°C 120 150
IO= 50 mA 200
TPS76325
TPS76333
TPS76350
IO= 75 mA, TJ= 25°C 180 225
IO= 75 mA 300
IO= 100 mA, TJ= 25°C 240 300
IO= 100 mA 400
IO= 150 mA, TJ= 25°C 360 450
IO= 150 mA 600
IO= 0 mA, TJ= 25°C 0.2
IO= 1 mA, TJ= 25°C 3
IO= 50 mA, TJ= 25°C 100 125
IO= 50 mA 166
IO= 75 mA, TJ= 25°C 150 188
IO= 75 mA 250
IO= 100 mA, TJ= 25°C 200 250
IO= 100 mA 333
IO= 150 mA, TJ= 25°C 300 375
IO= 150 mA 500
IO= 0 mA, TJ= 25°C 0.2
IO= 1 mA, TJ= 25°C 2
IO= 50 mA, TJ= 25°C 60 75
IO= 50 mA 100
IO= 75 mA, TJ= 25°C 90 113
IO= 75 mA 150
IO= 100 mA, TJ= 25°C 120 150
IO= 100 mA 200
IO= 150 mA, TJ= 25°C 180 225
IO= 150 mA 300
+ 1 V, IO= 1 mA, EN = IN, and CO= 4.7 µF (unless
O(typ)
µA
mV
6
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TJ− Junction Temperature − °C
1.74
−35 5
1.8
1.78
−15 25 125
1.82
−55
45 65 85 105
IO= 150 mA
IO= 1 mA
− Output Voltage − V
V
O
1.75
1.79
1.76
1.81
1.77
VI= 3.5 V
CI= CO= 4.7 µF
TJ− Junction Temperature − °C
5.02
4.98
4.94
4.9
−35 5
5.04
5
4.96
4.92
−15 25 125
5.1
−55
45 65
5.06
5.08
85 105
IO= 150 mA
IO= 1 mA
− Output Voltage − V
V
O
VI= 6 V
CI= CO= 4.7 µF
IO− Output Current − mA
5
4.97
4.95
30 90
4.99
4.98
4.96
60 120 180
5.01
0 150
− Output Voltage − V
V
O
VI= 6 V
CI= CO= 4.7 µF
TJ= 25°C
TJ− Junction Temperature − °C
2.49
2.47
−35 5
2.5
2.48
−15 25 125
2.53
−55
45 65
2.51
2.52
85 105
IO= 150 mA
IO= 1 mA
− Output Voltage − V
V
O
VI= 3.5 V
CI= CO= 4.7 µF
IO− Output Current − mA
2.5
2.485
2.475
30 90
2.495
2.49
2.48
60 120 180
2.505
0 150
VI= 3.5 V
CI= CO= 4.7 µF
TJ= 25°C
− Output Voltage − V
V
O
IO− Output Current − mA
1.795
1.780
1.770
30 90
1.790
1.785
1.775
60 120 180
1.805
0
150
− Output Voltage − V
V
O
1.800
VI= 3.5 V
CI= CO= 4.7 µF
TJ= 25°C
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11.1 Typical Characteristics
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
Figure 1. TPS76325 Output Voltage
vs Output Current
Figure 3. TPS76350 Output Voltage
vs Output Current
Figure 2. TPS76318 Output Voltage
vs Output Current
Figure 4. TPS76325 Output Voltage
vs Output Current
Figure 5. TPS76318 Output Voltage
vs Free-Air Temperature
Product Folder Links: TPS763
Figure 6. TPS76350 Output Voltage
vs Free-Air Temperature
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7
V
O
− Change in
4
2
3
1
0
−20
20
V
I
t − Time − µs
0 604020 80 100 140120 160 180 200
− Input Voltage − V
∆
Output Voltage − mV
−30
CO= 4.7 µF
ESR = 0.25 Ω
TJ= 25°C
dv
dt
1 V
10 µs
5
=
10 M1 M100 k10 k1 k100
Ripple Rejection − dB
f − Frequency − Hz
70
60
50
40
30
20
10
0
−10
10
CO= 4.7 µF
ESR = 1 Ω
TJ= 25°C
IO= 150 mA
IO= 1 mA
0.1
0.1 1 1000
10
0.01 10
1
f − Frequency − kHz
100
− Output Impedance −Z
o
Ω
CI= CO= 4.7 µF
ESR = 1 Ω
TJ= 25°C
IO= 150 mA
IO= 1 mA
TJ− Junction Temperature − °C
200
0
−35 5
300
100
−15 25 125
600
−55
45 65
400
500
VI= EN = 2.7 V
CI= CO= 4.7 µF
85 105
1 mA
− Dropout Voltage − mV
V
DO
150 mA
0 mA
TJ− Junction Temperature − °C
100
10
−35 5−15 25 125−55
45 65
1000
85 105
Ground Current − A
µ
VI= 6 V
CI= CO= 4.7 µF
IO= 0 mA and 150 mA
f − Frequency − Hz
1k 10k 100k
250
CO= 4.7 µF
IO= 1 mA
CO= 4.7 µF
IO= 150 mA
CO= 10 µF
IO= 150 mA
CO= 10 µF
IO= 1 mA
TJ= 25°C
3µV HzÖ
2µV HzÖ
1µV HzÖ
0µV HzÖ
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
Typical Characteristics (continued)
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Figure 7. TPS76350 Ground Current
Figure 8. Output Noise vs Frequency
vs Free-Air Temperature
Figure 9. Output Impedance vs Frequency Figure 10. TPS76325 Dropout Voltage
vs Free-Air Temperature
8
Figure 11. TPS76325 Ripple Rejection vs Frequency
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Figure 12. TPS76318 Line Transient Response
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0.1
0.01
0 50 100 150 200 250
10
100
IO− Output Current − mA
1
Region of Instability
CSR − Compensation Series Resistance −
Ω
Region of Instability
CO= 10 µF
0.1
0.01
0 0.1 0.2 0.3 0.4 0.5
10
100
Added Ceramic Capacitance − µF
0.6 0.7 0.8 0.9 1
1
Region of Instability
Region of Instability
CSR − Compensation Series Resistance −
Ω
I = 150 mA
CO= 4.7 µF
TJ= 25°C
150
−100
100
200
0
100
0
t − Time − µs
CO= 4.7 µF
ESR = 0.25 Ω
TJ= 25°C
0 604020 80 100 140120 160 180 200
I − Output Current − mA
O
V
O
− Change in
∆
Output Voltage − mV
−200
0.1
0.01
0 50 100 150 200 250
10
100
IO− Output Current − mA
CSR − Compensation Series Resistance −
Ω
1
Region of Instability
CO= 4.7 µF
TJ= 25°C
Region of Instability
5
−50
0
−100
7
6
8
t − Time − µs
0 15010050 200 250 350300 400 450 500
V
O
− Change in
V
I
− Input Voltage − V
∆
Output Voltage − mV
50
dv
dt
1 V
10 µs
CO= 4.7µF
ESR = 0.25 Ω
TJ= 25°C
=
50
−50
0
−100
100
0
200
t − Time − µs
CO= 4.7 µF
ESR = 0.25 Ω
TJ= 25°C
0 604020 80 100 140120 160 180 200
I − Output Current − mA
O
V
O
− Change in
∆
Output Voltage − mV
−150
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Typical Characteristics (continued)
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
Figure 13. TPS76318 Load Transient Response
Figure 15. TPS76350 Load Transient Response
Figure 14. TPS76350 Line Transient Response
Figure 16. Compensation Series Resistance (CSR)
vs Output Current
Figure 17. Compensation Series Resistance (CSR)
vs Added Ceramic Capacitance
Figure 18. Compensation Series Resistance (CSR)
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vs Output Current
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0.1
0.01
0 0.1 0.2 0.3 0.4 0.5
10
100
Added Ceramic Capacitance − µF
1
0.6 0.7 0.8 0.9 1
CSR − Compensation Series Resistance −
Ω
CO= 10 µF
Region of Instability
Region of Instability
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
Typical Characteristics (continued)
Figure 19. Compensation Series Resistance (CSR) vs Added Ceramic Capacitance
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10
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TPS76316/ 18/ 25/ 27/ 28/ 30/ 33/ 38/ 50
V
REF
Current Limit/
Thermal
Protection
IN
EN
GND
OUT
FB
V
REF
Current Limit/
Thermal
Protection
IN
EN
OUT
TPS76301
TPS763
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SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
12 Detailed Description
12.1 Overview
The TPS763xx devices uses a PMOS pass element to dramatically reduce both dropout voltage and supply
current over more conventional PNP pass element LDO designs. The PMOS pass element is a voltagecontrolled device that, unlike a PNP transistor, does not require increased drive current as output current
increases. Supply current in the TPS763xx is essentially constant from no-load to maximum load.
Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation.
The device switches into a constant-current mode at approximately 1 A; further load reduces the output voltage
instead of increasing the output current. The thermal protection shuts the regulator off if the junction temperature
rises above 165°C. Recovery is automatic when the junction temperature drops approximately 25°C below the
high temperature trip point. The PMOS pass element includes a back diode that safely conducts reverse current
when the input voltage level drops below the output voltage level.
A logic low on the enable input, EN shuts off the output and reduces the supply current to less than 2 µA. EN
must be tied high in applications where the shutdown feature is not used.
12.2 Functional Block Diagram
12.3 Feature Description
12.3.1 Regulator Protection
The TPS763xx features internal current limiting and thermal protection. During normal operation, the TPS763xx
limits output current to approximately 800 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
take care not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds
165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below 140°C, regulator
operation resumes.
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11
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
www.ti.com
Feature Description (continued)
12.3.2 Enable
The enable signal (VEN) is an active-high digital control that enables the LDO when the enable voltage is past the
rising threshold (VEN≥ V
(VEN≤ V
). The exact enable threshold is between V
IL(EN)
) and disables the LDO when the enable voltage is below the falling threshold
IH(EN)
IH(EN)
and V
because EN is a digital control. In
IL(EN)
applications that do not use the enable control, connect EN to VIN.
12.4 Device Functional Modes
Table 1 provides a quick comparison between the regulation and disabled operation.
Table 1. Device Functional Modes Comparison
OPERATING MODE
Regulation
Disabled
(1) All table conditions must be met.
(2) The device is disabled when any condition is met.
(1)
(2)
VIN> V
V
IN
OUT(nom)
+ V
DO
— VEN< V
VEN> V
EN I
12.4.1 Regulation
The device regulates the output to the targeted output voltage when all the conditions in Table 1 are met.
PARAMETER
IH(EN)
IL(EN)
OUT
I
< I
OUT
CL
— TJ> T
T
TJ< T
J
sd
sd
12.4.2 Disabled
When disabled, the pass device is turned off, the internal circuits are shutdown.
12
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Product Folder Links: TPS763
TPS76301
IN
EN
1
1 µF
V
I
3
•2 V
GND
2
FB
OUT
4
5
R1
R2
V
o
CSR=1 Ÿ
4.7 µF
+
TPS763
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SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
13 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
13.1 Application Information
The TPS763xx low-dropout (LDO) regulators are part of a family of regulators which have been optimized for use
in battery-operated equipment and feature extremely low dropout voltages, low quiescent current (140 µA), and
an enable input to reduce supply currents to less than 2 µA when the regulator is turned off.
13.2 Typical Application
Figure 20. Typical Application Circuit
13.2.1 Design Requirements
Although not required, TI recommends a 0.047-µF or larger ceramic bypass input capacitor, connected between
IN and GND and placed close to the TPS763xx, to improve transient response and noise rejection. A highervalue electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the
device is placed several inches from the power source. Follow the programming guidelines from Table 2.
Table 2. Output Voltage Programming Guide
OUTPUT VOLTAGE (V)
2.5 187 169
3.3 301 169
3.6 348 169
4 402 169
5 549 169
6.45 750 169
(1) 1% values shown
Product Folder Links: TPS763
DIVIDER RESISTANCE (kΩ)
R1 R2
(1)
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13
TPS76301
IN
EN
1
1 µF
V
I
3
•2 V
GND
2
FB
OUT
4
5
R1
R2
V
o
CSR=1 Ÿ
4.7 µF
+
O
ref
V
0.995 V
æ ö
= - ´
ç ÷
´
è ø
O ref
R1
V 0.995 V 1
R2
æ ö
= ´ ´ +
ç ÷
è ø
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
www.ti.com
13.2.2 Detailed Design Procedure
13.2.2.1 Capacitor Selection
Like all low dropout regulators, the TPS763xx requires an output capacitor connected between OUT and GND to
stabilize the internal loop control. The minimum recommended capacitance value is 4.7 µF and the ESR
(equivalent series resistance) must be between 0.3 Ω and 10 Ω. Capacitor values 4.7 µF or larger are
acceptable, provided the ESR is less than 10 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer
ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the
commercially available 4.7 µF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet,
and Nichico, meet the ESR requirements stated above (see Table 3).
Table 3. Capacitor Selection
PART NO. MFR VALUE MAX ESR SIZE (H × L × W)
T494B475K016AS Kemet 4.7 µF 1.5 Ω 1.9 × 3.5 × 2.8
195D106x0016x2T Sprague 10 µF 1.5 Ω 1.3 × 7 × 2.7
695D106x003562T Sprague 10 µF 1.3 Ω 2.5 × 7.6 × 2.5
TPSC475K035R0600 AVX 4.7 µF 0.6 Ω 2.6 × 6 × 3.2
13.2.2.2 Output Voltage Programming
The output voltage of the TPS76301 adjustable regulator is programmed using an external resistor divider as
shown in Figure 21. The output voltage is calculated using Equation 1.
where
• Vref = 1.192 V typical (the internal reference voltage)
• 0.995 is a constant used to center the load regulator (1%) (1)
Resistors R1 and R2 must be chosen for approximately 7-µA divider current. Lower value resistors can be used
but offer no inherent advantage and waste more power. Higher values must be avoided as leakage currents at
FB increase the output voltage error. TI recommends choosing a design procedure of R2 = 169 kΩ to set the
divider current at 7 µA and then calculate R1 using Equation 2.
(2)
Figure 21. TPS76301 Adjustable LDO Regulator Programming
14
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0.1
0.01
0 50 100 150 200 250
10
100
IO− Output Current − mA
CSR − Compensation Series Resistance −
Ω
1
Region of Instability
CO= 4.7 µF
TJ= 25°C
Region of Instability
0.1
0.01
0 0.1 0.2 0.3 0.4 0.5
10
100
Added Ceramic Capacitance − µF
1
0.6 0.7 0.8 0.9 1
CSR − Compensation Series Resistance −
Ω
CO= 10 µF
Region of Instability
Region of Instability
TPS763
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SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
13.2.2.3 Reverse Current
The TPS763xx pass element has a built-in back diode that safely conducts reverse currents when the input
voltage drops below the output voltage (for example, during power down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be
appropriate.
13.2.3 Application Curves
Figure 22. Compensation Series Resistance (CSR)
vs Output Current
Figure 23. Compensation Series Resistance (CSR) vs
Added Ceramic Capacitance
Product Folder Links: TPS763
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15
C
OUT
V
OUT
V
IN
GND PLANE
C
IN
Represents via used for
application specific connections
1
2
3
4
5
EN
D I O O
J A
D(max)
JA
T max T
R
q
-
=
TPS763
SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
www.ti.com
14 Power Supply Recommendations
A 1-µF or larger input capacitor must be used.
14.1 Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
allowable to avoid damaging the device is 150°C. This restriction limits the power dissipation the regulator can
handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the
maximum allowable dissipation, P
P
.
D(max)
The maximum-power-dissipation limit is determined using Equation 3.
where
• TJmax is the maximum allowable junction temperature
• R
is the thermal resistance junction-to-ambient for the package, see Thermal Information
θJA
• TAis the ambient temperature (3)
The regulator dissipation is calculating using Equation 4.
Power dissipation resulting from quiescent current is negligible.
, and the actual dissipation, PD, which must be less than or equal to
D(max)
(4)
15 Layout
15.1 Layout Guidelines
• Place input and output capacitors as close to the device as possible.
• Use copper planes for device connections to optimize thermal performance.
• Place thermal vias around the device to distribute the heat.
15.2 Layout Example
Figure 24. Layout Example for DBV Package
16
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TPS763
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SLVS181J –DECEMBER 1998–REVISED SEPTEMBER 2019
16 Device and Documentation Support
16.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
16.2 Community Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
16.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
16.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
16.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
17 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Product Folder Links: TPS763
Submit Documentation FeedbackCopyright © 1998–2019, Texas Instruments Incorporated
17
PACKAGE OPTION ADDENDUM
www.ti.com
PACKAGING INFORMATION
Orderable Device Status
TPS76301DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PAZI
TPS76301DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PAZI
TPS76301DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PAZI
TPS76316DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBHI
TPS76316DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBHI
TPS76316DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBHI
TPS76318DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI
TPS76318DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI
TPS76318DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI
TPS76318DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI
TPS76325DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBBI
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
10-Dec-2020
Samples
(4/5)
TPS76325DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBBI
TPS76325DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBBI
TPS76327DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBCI
TPS76327DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBCI
TPS76327DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBCI
TPS76328DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBDI
TPS76328DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBDI
TPS76330DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBII
TPS76330DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBII
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device Status
TPS76333DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI
TPS76333DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI
TPS76333DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI
TPS76333DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI
TPS76338DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBFI
TPS76338DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBFI
TPS76350DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI
TPS76350DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI
TPS76350DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI
TPS76350DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
10-Dec-2020
(4/5)
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Samples
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
10-Dec-2020
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS763 :
Automotive: TPS763-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
TPS76301DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS76301DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76301DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS76301DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76316DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76316DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76318DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS76318DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TPS76318DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76318DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS76325DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76325DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76327DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76327DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76328DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76328DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76330DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76330DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)B0(mm)K0(mm)P1(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2021
Device Package
TPS76333DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS76333DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76333DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76333DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS76338DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76338DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76350DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS76350DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)B0(mm)K0(mm)P1(mm)W(mm)
Pin1
Quadrant
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS76301DBVR SOT-23 DBV 5 3000 200.0 183.0 25.0
TPS76301DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76301DBVT SOT-23 DBV 5 250 200.0 183.0 25.0
TPS76301DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76316DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76316DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76318DBVR SOT-23 DBV 5 3000 200.0 183.0 25.0
TPS76318DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76318DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2021
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS76318DBVT SOT-23 DBV 5 250 200.0 183.0 25.0
TPS76325DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76325DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76327DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76327DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76328DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76328DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76330DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76330DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76333DBVR SOT-23 DBV 5 3000 200.0 183.0 25.0
TPS76333DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76333DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76333DBVT SOT-23 DBV 5 250 200.0 183.0 25.0
TPS76338DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76338DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS76350DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS76350DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
Pack Materials-Page 3
PACKAGE OUTLINE
PIN 1
INDEX AREA
2X 0.95
1.9
0.5
5X
0.3
0.2 C A B
A
3.05
2.75
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
C
0.1 C
1.45
0.90
(1.1)
0.15
0.00
TYP
SCALE 4.000
3.0
2.6
1.75
1.45
1
2
3
B
5
1.9
4
0.25
GAGE PLANE
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
0.22
0.08
TYP
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
2X (0.95)
(R0.05) TYP
SOLDER MASK
OPENING
5X (0.6)
5X (1.1)
PKG
1
2
3
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
METAL
METAL UNDER
SOLDER MASK
5
SYMM
(1.9)
4
SOLDER MASK
OPENING
EXPOSED METAL
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
EXPOSED METAL
0.07 MIN
ARROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
4214839/E 09/2019
www.ti.com
5X (0.6)
2X(0.95)
1
2
EXAMPLE STENCIL DESIGN
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
5
SYMM
(1.9)
(R0.05) TYP
3
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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