Texas Instruments TPS73HD325PWPR, TPS73HD325PWP, TPS73HD318PWPR, TPS73HD318PWP, TPS73HD301PWPR Datasheet

TPS73HD301, TPS73HD318, TPS73HD325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

D

Dual Output Voltages for Split-Supply
Applications

D

3.3-V/Adjustable Output, 3.3 V/1.8 V, and

3.3 V/2.5

D

Dropout Voltage < 80 mV Max at
I

= 100 mA (3.3-V option)

O

D

Low Quiescent Current, Independent of
Load . . . 340 µA Typ Per Regulator

D

Ultra-Low-Current Sleep State...2 µA Max

D

Dual Active-Low Reset Signals with 200-ms
Pulse Width

D

Output Current Range of 0 mA to 750 mA
Per Regulator

D

28-Pin PowerP AD TSSOP Package

description

NC
NC

1GND

1EN

1IN
1IN

NC
NC

2GND

2EN

2IN
2IN

NC
NC

NC – No internal connection

PWP PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10
11
12
13
14

28
27
26
25
24
23
22
21
20
19
18
17
16
15

1RESET
NC
NC
1FB/SENSE
1OUT
1OUT
2RESET
NC
NC
2SENSE
2OUT
2OUT
NC
NC

The TPS73HD3xx family of dual voltage regulators offers very low dropout voltages and dual outputs in a
compact package. Designed primarily for DSP applications, these devices can be used in any mixed-output
voltage application with each regulator supporting up to 750 mA. Output current can be allocated as desired
between the two regulators and used to power many of todays DSPs. Low quiescent current and very low
dropout voltage assure maximum power usage in battery-powered applications. T exas Instruments PowerP AD
TSSOP package allows use of these devices with any voltage/current combination within the range of the listed
specifications without thermal problems, provided proper device mounting procedures are followed. Separate
inputs allow the designer to configure the source power as desired. Dual active-low reset signals allow resetting
of core-logic and I/O separately. Remote sense/feedback terminals provide regulation at the load. The
TPS73HD3xx are available in 28-pin PowerPAD TSSOP. They operate over a free-air temperature range of
–40°C to 125°C.

T

A

–40°C to 125°C

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

REGULATOR 1

VO (V)

Adj (1.2 – 9.75 V) 3.3 V TPS73HD301PWPR

1.8 V 3.3 V TPS73HD318PWPR

2.5 V 3.3 V TPS73HD325PWPR

AVAILABLE OPTIONS

REGULATOR 2

VO (V)

TSSOP

(PWP)

Copyright  1999, Texas Instruments Incorporated

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

TPS73HD301, TPS73HD318, TPS73HD325

I/O

DESCRIPTION

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

functional block diagram

IN

EN

V

= 1.182 V

ref

GND

†

Switch positions shown with EN

†† †

–
+

low (active).

OUTPUT VOLTAGE

Adjustable 0

1.8 V 122 233 kΩ

2.5 V 260 233 kΩ

3.3 V 420 233 kΩ

R1 R2 UNIT

Delayed

Reset

∞

OUT
RESET

SENSE/FB

R1

R2

Ω

Terminal Functions

TERMINAL

NAME NO.

NC 1, 2, 7, 8,

13–16, 20,

21, 26, 27
1GND 3 Regulator #1 ground
1EN 4 I Regulator #1 enable, low = enable
1IN 5, 6 I Regulator #1 input supply voltage
2GND 9 Regulator #2 ground
2EN 10 I Regulator #2 enable, low = enable
2IN 11, 12 I Regulator #2 input supply voltage
2OUT 17, 18 O Regulator #2 output voltage
2SENSE 19 I Regulator #2 output voltage sense (fixed output)
2RESET 22 O Regulator #2 reset signal, low = reset
1OUT 23, 24 O Regulator #1 output voltage
1FB/SENSE 25 I Regulator #1 output voltage feedback (adjustable output)
1RESET 28 O Regulator #1 reset signal, low = reset

No connection

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PWP

‡

PWP

§

TPS73HD301, TPS73HD318, TPS73HD325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Input voltage range, V
Differential input voltage,V
Output current, I

(xIN, xRESET, xSENSE, xEN) –0.3 V to 11 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

(1GND to 2GND) 2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(1OUT, 2OUT) 2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

ID

†

Continuous total power dissipation See Dissipation Rating Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T
Storage temperature range, T

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES

PACKAGE

‡

This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper,
2-in × 2-in coverage (4 in2).

§

This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2).

AIR FLOW

(CFM)

0 2.9 W 23.5 mW/°C 1.9 W 1.5 W

300 4.3 W 34.6 mW/°C 2.8 W 2.2 W

0 3 W 23.8 mW/°C 1.9 W 1.5 W

300 7.2 W 57.9 mW/°C 4.6 W 3.8 W

TA < 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

POWER RATING

‡

TA = 70°C

TA = 85°C

POWER RATING

recommended operating conditions

MIN MAX UNIT

V

I(min)

†

I

†

I

+

Input voltage, V
Input voltage, V
High-level input voltage at EN, V
Low-level input voltage at EN, V
Total output current range (per regulator), I
Operating virtual junction temperature range, T

†

Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage, VDO,
at the maximum specified load range (750 mA). Since dropout voltage is a function of output current, the usable range can be extended for lighter
loads. To calculate the minimum input voltage for the maximum load current used in a given application, use the following equation:

Because regulator 1 of the TPS373HD301 is programmable, r
equation for calculating VDO from r
the absolute lower limit for the recommended input voltage range for the TPS73HD301. With 2.97-V input voltage, the LDO may be in dropout
and will not meet the 3% regulaotr output or 750-mA load current specification.

Adjustable output (regulator #1) 2.97 10 V

3.3–V output (regulator #2) 3.97 10 V
IH

IL

O

–40 125 °C

V

O(max)

)

V

DO(max load)

DS(on)

J

should be used to calculate VDO before applying the above equation. The

is given in Note 3 in the TPS73HD301 electrical characteristics table. The minimum value of 3.5 V is

DS(on)

2 V

0.5 V

0 750 mA

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

TPS73HD301, TPS73HD318, TPS73HD325

Quiescent current (active mode), each regulator

0 mA ≤ I

≤ 750 mA

A

ICCSupply current (standby mode), each regulator

I

,

A

IOOutput current limit, each regulator

V

V

V

A

I

Pass-element leakage current (standby mode)

I

,

A

Logic high (EN) (standby mode)

I

,

40°C to 125°C

V

Logic low (EN) (active mode)

See NOTE 2

V

IIInput current (EN)

0 V ≤ V

V

A

Minimum input voltage, for active pass element

V

Minimum input voltage, for valid RESET

I

300 µA

V

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

electrical characteristics, V

= 4.3 V, IO = 10 mA, EN = 0 V, CO = 4.7 µF/CSR‡ = 1 Ω,

I(IN)

SENSE/FB shorted to OUT (unless otherwise noted)

= 10

§

,

T

J

25°C 340 415

–40°C to 125°C 550

25°C 0.01 0.5

–40°C to 125°C 2

25°C 0.8 1.2 2

–40°C to 125°C 2

25°C 0.01 0.5

–40°C to 125°C 1

°

–

25°C 0.5

–40°C to 125°C 0.5

25°C –0.5 0.001 0.5

–40°C to 125°C –0.5 0.5

25°C 2.05 2.5

–40°C to 125°C 2.5

25°C 1 1.5

–40°C to 125°C 1.9

MIN TYP MAX UNIT

°

2

2.7

µ

µ

µ

µ

PARAMETER TEST CONDITIONS

EN ≤ 0.5 V,

See NOTE 2

pp

p

lkg

Output voltage temperature coefficient –40°C to 125°C 61 75 ppm/°C
Thermal shutdown junction temperature 165 °C

V

hys

‡

CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor,
any series resistance added externally, and PWB trace resistance to CO.

§

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

NOTE 2: Minimum input voltage is 3.5V or Vo(typ) + 1V whichever is greater.
The minimum value of 3.5 V is the absolute lower limit for the recommended input voltage range for the TPS73HD301.

Hysteresis voltage (EN) 25°C 50 mV

p

p

p

p

EN = V
NOTE 2

O

EN = V
See NOTE 2

2.5 V ≤ V
6 V ≤ VI ≤ 10 V

O(RESET)

O

,

= 0,

,

≤ 10

I

I

≤ 6 V,

= –

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Reference voltage (1FB)

O

,

V

µ

O

,

(

Ω

Output regulation
Ripple rejection

dB

CSR = 1 Ω

VOLLow-level output voltage (RESET)

§

V

I

400 µA

V

IIInput current (1FB)

nA

TPS73HD301, TPS73HD318, TPS73HD325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

electrical characteristics, V

= 4.3 V, IO = 10 mA, EN = 0 V, CO = 4.7 µF/CSR† = 1 Ω,

I(IN)

SENSE/FB shorted to OUT (unless otherwise noted) (continued)

adjustable regulator

PARAMETER TEST CONDITIONS

5 mA ≤ I
See NOTE 2

Reference voltage temperature coef­ficient

50 µA ≤ I

Pass-element series resistance (see
Note 3)

Input regulation VI = 3.5 V, 50 µA ≤ IO ≤ 750 mA 25°C 3 mV

p

pp

Output noise-spectral density f = 120 Hz 25°C 2 mV/√Hz

Output noise voltage

V

Trip-threshold voltage (RESET)

(TO)

V

Hysteresis voltage (RESET)

hys

p

p

†

CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor,
any series resistance added externally, and PWB trace resistance to CL.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

§

Output voltage programmed to 2.5 V with closed-loop configuration (see application information)

NOTE 3: To calculate dropout voltage, use equation:

§

See NOTE 2
VI = 3.9 V, 50 µA ≤ IO ≤ 750 mA

VI = 5.9 V, 50 µA ≤ IO ≤ 750 mA 25°C 0.23

IO = 5 mA to 750 mA,
See NOTE 2

IO = 50 µA to 750 mA,
See NOTE 2

f = 120 Hz, IO = 50 µA 25°C 59
f = 120 Hz, IO = 500 mA 25°C 54

10 Hz ≤ f ≤ 100 kHz,

§

V

O(FB)

Measured at V

I

≤ 750 mA,

≤ 750 mA,

=

decreasing –40°C to 125°C 1.101 1.145 V

O(ER)

= 2.13 V,

O(RESET)

‡

CL = 4.7 µF 25°C 95
CL = 10 µF 25°C 89

CL = 100 µF 25°C 74

=

T

J

25°C 1.182

–40°C to 125°C 1.147 1.217
–40°C to 125°C 61 75 ppm/°C

25°C 0.52 1

–40°C to 125°C 1

25°C 0.32

25°C 7 mV

25°C 10 mV

25°C 12 mV
25°C 0.1 0.4

–40°C to 125°C 0.4

25°C –10 0.1 10

–40°C to 125°C –20 20

MIN TYP MAX UNIT

µV/rms

VDO+

r
dropout conditions for programmed output voltages of 4 V and 6 V respectively . For other programmed values, refer to Figure 29.

is a function of both output current and input voltage. This parametric table lists r

DS(ON)

IO

r

DS(ON)

for VI = 3.9 V and 5.9 V , which corresponds to

DS(ON)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

TPS73HD301, TPS73HD318, TPS73HD325

VOOutput voltage

4.3 V ≤ V

V

V

(

O)O

I

,

Ω

Output regulation

mV

Ripple rejection

dB

CSR = 1 Ω

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

electrical characteristics, V

= 4.3 V, IO = 10 mA, EN = 0 V, CO = 4.7 µF/CSR† = 1 Ω, SENSE/FB

I(IN)

shorted to OUT (unless otherwise noted) (continued)

1.8-V regulator (TPS73HD318)

= 3.5 V,

2SENSE

‡

= 0 V

T

J

25°C 1.746 1.8 1.854

–40°C to 125°C 1.728 1.872

§

25°C 0.5 1

–40°C to 125°C 1.2

MIN TYP MAX UNIT

µV/rms

PARAMETER TEST CONDITIONS

p

Pass-element series (3.5 V – V
resistance

Input regulation 50 µA ≤ IO ≤ 750 mA, See NOTE 2 25°C 6 mV

p

pp

Output noise-spectral density f = 120 Hz 25°C 2 mV/√Hz

Output noise voltage

†

CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any
series resistance added externally, and PWB trace resistance to CL.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

§

Pass-element series resistance measured with sense pin disconnected from output to allow output voltge to rise to full saturation.

IO = 750 mA, V

IO = 5 mA to 750 mA, See NOTE 2 25°C 14
IO = 50 µA to 750 mA, See NOTE 2 25°C 18
f = 120 Hz, IO = 50 µA 25°C 51
f = 120 Hz, IO = 500 mA 25°C 49

10 Hz ≤ f ≤ 100 kHz,

≤ 10

I

)/I

=

V

,

CL = 4.7 µF 25°C 274
CL = 10 µF 25°C 228

CL = 100 µF 25°C 159

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

VOOutput voltage

4.3 V ≤ V

V

V

Output regulation

Ripple rejection

dB

CSR = 1 Ω

V

g

V

I

mA

V

Ti

(RESET)

See Figure 3

ms

TPS73HD301, TPS73HD318, TPS73HD325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

electrical characteristics, V

= 4.3 V, IO = 10 mA, EN = 0 V, CO = 4.7 µF/CSR† = 1 Ω, SENSE/FB

I(IN)

shorted to OUT (unless otherwise noted) (continued)

2.5-V regulator (TPS73HD325)

PARAMETER TEST CONDITIONS

p

Dropout voltage IO = 750 mA, VI = 3.5 V –40°C to 125°C 800 mV
Input regulation 50 µA ≤ IO ≤ 750 mA, See NOTE 2 25°C 6 mV

p

pp

Output noise-spectral density f = 120 Hz 25°C 2 mV/√Hz

Output noise voltage

Trip-threshold voltage

V

(TO)

(RESET

)

V

Hysteresis voltage (RESET) 25°C 18 mV

hys

Low-level output voltage

OL

(RESET)

†

CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any
series resistance added externally, and PWB trace resistance to CL.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

§

Pass-element series resistance measured with sense pin disconnected from output to allow output voltge to rise to full saturation.

IO = 5 mA to 750 mA, See NOTE 2 25°C 20 mV
IO = 50 µA to 750 mA, See NOTE 2 25°C 25 mV
f = 120 Hz, IO = 50 µA 25°C 51
f = 120 Hz, IO = 500 mA 25°C 49

10 Hz ≤ f ≤ 100 kHz,

VO decreasing –40°C to 125°C 2.172 V

I

=

= 2.8 V,

≤ 10

I

CL = 4.7 µF 25°C 274
CL = 10 µF 25°C 228

CL = 100 µF 25°C 159

‡

O(RESET)

= –1

T

J

25°C 2.45 2.5 2.55

–40°C to 125°C 2.425 2.575

25°C 0.17 0.4

–40°C to 125°C 0.4

MIN TYP MAX UNIT

µV/rms

switching characteristics

PARAMETER TEST CONDITIONS T

me-out delay

J

25°C 140 200 260

–40°C to 125°C 100 300

MIN TYP MAX UNIT

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

7

TPS73HD301, TPS73HD318, TPS73HD325

VOOutput voltage

4.3 V ≤ V

V

V

Dropout voltage

mV

I

750 mA

V

3.23 V

(

O)O

I

,

Ω

Output regulation

Ripple rejection

dB

CSR = 1 Ω

V

g

V

I

mA

V

Ti

(RESET)

See Figure 3

ms

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

electrical characteristics, V

= 4.3 V, IO = 10 mA, EN = 0 V, CO = 4.7 µF/CSR† = 1 Ω, SENSE/FB

I(IN)

shorted to OUT (unless otherwise noted) (continued)

3.3-V regulator (TPS73HD301)

PARAMETER TEST CONDITIONS

p

IO = 10 mA, VI = 3.23 V 25°C 4.5 10

p

Pass-element series (3.23 V – V
resistance

Input regulation 50 µA ≤ IO ≤ 750 mA, See NOTE 2 25°C 6 mV

p

pp

Output noise-spectral density f = 120 Hz 25°C 2 mV/√Hz

Output noise voltage

Trip-threshold voltage

V

(TO)

(RESET

)

V

Hysteresis voltage (RESET) 25°C 18 mV

hys

Low-level output voltage

OL

(RESET)

†

CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any
series resistance added externally, and PWB trace resistance to CL.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

IO = 100 mA, VI = 3.23 V 25°C 44 100

O

IO = 750 mA

IO = 5 mA to 750 mA, See NOTE 2 25°C 30 mV
IO = 50 µA to 750 mA, See NOTE 2 25°C 37 mV
f = 120 Hz, IO = 50 µA 25°C 51
f = 120 Hz, IO = 500 mA 25°C 49

10 Hz ≤ f ≤ 100 kHz,

VO decreasing –40°C to 125°C 2.868 V

=

=

= 2.8 V,

I

≤ 10

I

,

)/I

V

,

CL = 4.7 µF 25°C 274
CL = 10 µF 25°C 228

CL = 100 µF 25°C 159

‡

=

I

= 3.23 V,

O(RESET)

= –1

T

J

25°C 3.3

–40°C to 125°C 3.23 3.37

25°C 353 750

–40°C to 125°C 800

25°C 0.44 1

–40°C to 125°C 1.07

25°C 0.17 0.4

–40°C to 125°C 0.4

MIN TYP MAX UNIT

µV/rms

switching characteristics

me-out delay

8

PARAMETER TEST CONDITIONS T

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

J

25°C 140 200 260

–40°C to 125°C 100 300

MIN TYP MAX UNIT

TPS73HD301, TPS73HD318, TPS73HD325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

PARAMETER MEASUREMENT INFORMATION

V

O

V

RESET

V

I

IN

RESET

250 kΩ

IT+

t

0.1 µf

EN

SENSE

GND

TEST CIRCUIT

OUT

+

CSR

V

O

10 µF

RESET

Figure 1. Test Circuit and Voltage Waveforms

V

I

†

IN

EN

GND

Ceramic capacitor

OUT

SENSE

+

CSR

C

O

RESET

Timeout Delay

VOLTAGE WAVEFORMS

†

C

CER

RL

t

Figure 2. Test Circuit for Typical Regions of Stability (Refer to Figures 29 through 32)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

9