TEXAS INSTRUMENTS TPS736xx Technical data

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DCQ PACKAGE

SOT223

(TOP VIEW)

DBV PACKAGE

SOT23

(TOP VIEW)

IN

GND

EN

NR/FB

OUT

1
2
3

4

5

1 2 3 4 5

IN

OUT

GND

NR/FB

EN

TAB IS GND

IN
N/C
N/C
EN

8
7
6
5

OUT

N/C

NR/FB

GND

1
2
3
4

DRB PACKAGE

3mm x 3mm SON

(TOP VIEW)

TPS736xx

GNDEN NR

IN OUT

V

IN

V

OUT

Optional Optional

Optional

Typical Application Circuit for Fixed Voltage Versions

Cap-Free, NMOS, 400mA Low-Dropout Regulator

with Reverse Current Protection

FEATURES DESCRIPTION

• Stable with No Output Capacitor or Any Value

or Type of Capacitor

• Input Voltage Range of 1.7V to 5.5V

• Ultra-Low Dropout Voltage: 75mV typ

• Excellent Load Transient Response—with or

without Optional Output Capacitor

• New NMOS Topology Delivers Low Reverse

Leakage Current

• Low Noise: 30µV

• 0.5% Initial Accuracy

• 1% Overall Accuracy Over Line, Load, and

Temperature

• Less Than 1µA max IQin Shutdown Mode

• Thermal Shutdown and Specified Min/Max

Current Limit Protection

• Available in Multiple Output Voltage Versions

– Fixed Outputs of 1.20V to 4.3V
– Adjustable Output from 1.20V to 5.5V
– Custom Outputs Available

typ (10Hz to 100kHz)

RMS

TPS736xx

SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

The TPS736xx family of low-dropout (LDO) linear
voltage regulators uses a new topology: an NMOS
pass element in a voltage-follower configuration. This
topology is stable using output capacitors with low
ESR, and even allows operation without a capacitor.
It also provides high reverse blockage (low reverse
current) and ground pin current that is nearly constant
over all values of output current.

The TPS736xx uses an advanced BiCMOS process
to yield high precision while delivering very low
dropout voltages and low ground pin current. Current
consumption, when not enabled, is under 1µA and
ideal for portable applications. The extremely low
output noise (30µV
powering VCOs. These devices are protected by
thermal shutdown and foldback current limit.

RMS

with 0.1µF C

) is ideal for

NR

APPLICATIONS

• Portable/Battery-Powered Equipment

• Post-Regulation for Switching Supplies

• Noise-Sensitive Circuitry such as VCOs

• Point of Load Regulation for DSPs, FPGAs,

ASICs, and Microprocessors

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2003–2005, Texas Instruments Incorporated

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TPS736xx

SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.

ORDERING INFORMATION

PRODUCT V

TPS736 xxyyyz XX is nominal output voltage (for example, 25 = 2.5V, 01 = Adjustable

(1)

(2)

OUT

(3)

).

YYY is package designator.
Z is package quantity.

(1) For the most current specification and package information, refer to the Package Option Addendum located at the end of this datasheet

or see the TI website at www.ti.com .

(2) Additional output voltages from 1.25V to 4.3V in 100mV increments are available on a quick-turn basis using innovative factory

EEPROM programming. Minimum order quantities apply; contact factory for details and availability.

(3) For fixed 1.2V operation, tie FB to OUT.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

VINrange -0.3 to 6.0 V
V

range -0.3 to 6.0 V

EN

V

range -0.3 to 5.5 V

OUT

Peak output current Internally limited
Output short-circuit duration Indefinite
Continuous total power dissipation See Dissipation Ratings Table
Junction temperature range, T
Storage temperature range -65 to +150 °C
ESD rating, HBM 2 kV
ESD rating, CDM 500 V

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics
is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

J

(1)

TPS736xx UNIT

-55 to +150 °C

POWER DISSIPATION RATINGS

BOARD PACKAGE R

(2)

Low-K

(3)

High-K

(2)

Low-K

(3) (4)

High-K

DBV 64°C/W 255°C/W 3.9mW/°C 390mW 215mW 155mW

DBV 64°C/W 180°C/W 5.6mW/°C 560mW 310mW 225mW
DCQ 15°C/W 53°C/W 18.9mW/°C 1.89W 1.04W 0.76W
DRB 1.2°C/W 40°C/W 25.0mW/°C 2.50W 1.38W 1.0W

Θ JC

(1)

R

Θ JA

DERATING FACTOR TA≤ 25°C TA= 70°C TA= 85°C

ABOVE TA= 25°C POWER RATING POWER RATING POWER RATING

(1) See Power Dissipation in the Applications section for more information related to thermal design.
(2) The JEDEC Low-K (1s) board design used to derive this data was a 3inch x 3inch, 2-layer board with 2-ounce copper traces on top of

the board.

(3) The JEDEC High-K (2s2p) board design used to derive this data was a 3inch x 3inch, multilayer board with 1-ounce internal power and

ground planes and 2-ounce copper traces on the top and bottom of the board.

(4) Based on preliminary thermal simulations.

2

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TPS736xx

SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

ELECTRICAL CHARACTERISTICS

Over operating temperature range (T
C

= 0.1µF, unless otherwise noted. Typical values are at TJ= 25°C.

OUT

= -40°C to +125°C), V

J

= V

IN

OUT(nom)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

IN

V

FB

Input voltage range
Internal reference (TPS73601) TJ= 25°C 1.198 1.20 1.210 V

(1) (2)

Output voltage range
(TPS73601)

V

OUT

Accuracy

∆ V

%/ ∆ V

OUT

∆ V

%/ ∆ I

OUT

V

DO

Line regulation

IN

Load regulation %/mA

OUT

Dropout voltage
(V

= V

IN

ZO(DO) Output impedance in dropout 1.7V ≤ VIN≤ V

I

CL

I

SC

I

REV

I

GND

I

SHDN

I

FB

PSRR dB

V

N

t

STR

Output current limit

Short-circuit current V
Reverse leakage current

Ground pin current µA

Shutdown current (I
FB pin current (TPS73601) 0.1 0.3 µA

Power-supply rejection ratio
(ripple rejection)

Output noise voltage
BW = 10Hz - 100KHz

Startup time 600 µs

Nominal TJ= 25°C -0.5 +0.5

(1)

over VIN, I
and T 10mA ≤ I

(1)

(3)

OUT(nom)

- 0.1V)

, V

OUT

+ 0.5V ≤ VIN≤ 5.5V;

OUT

V

O(nom)

1mA ≤ I
10mA ≤ I

I

OUT

V

OUT

≤ 400mA

OUT

+ 0.5V ≤ VIN≤ 5.5V 0.01 %/V

≤ 400mA 0.002

OUT

≤ 400mA 0.0005

OUT

= 400mA 75 200 mV

+ V

OUT

DO

= 0.9 × V

OUT(nom)

3.6V ≤ VIN≤ 4.2V, 0°C ≤ TJ≤ 70°C 500 800 mA
= 0V 450 mA

) V

IN

OUT

≤ 0.5V, 0V ≤ VIN≤ V

EN

I

= 10mA (IQ) 400 550

OUT

I

= 400mA 800 1000

OUT

≤ 0.5V, V

EN

f = 100Hz, I
f = 10KHz, I
C

OUT

C

OUT

V

OUT

C

= 0.01µF

NR

OUT

OUT

OUT

= 10µF, No C
= 10µF, C
= 3V, RL= 30 Ω C

OUT

≤ VIN≤ 5.5 0.02 1 µA

= 400mA 58

= 400mA 37

NR

= 0.01µF 8.5 × V

NR

= 1µF,

OUT

) V

GND

(4)

(-I

VEN(HI) Enable high (enabled) 1.7 V
VEN(LO) Enable low (shutdown) 0 0.5 V
IEN(HI) Enable pin current (enabled) V

T

SD

T

J

Thermal shutdown temperature °C

Operating junction temperature -40 125 °C

= 5.5V 0.02 0.1 µA

EN

Shutdown, temperature increasing 160
Reset, temperature decreasing 140

(1)

+ 0.5V

, I

OUT

= 10mA, V

= 1.7V, and

EN

1.7 5.5 V

V

FB

5.5 - V

DO

-1.0 ±0.5 +1.0

0.25 Ω

400 650 800 mA

0.1 10 µA

27 × V

OUT

OUT

IN

V

%

µV

RMS

V

(1) Minimum VIN= V
(2) For V

(3) V
(4) Refer to Applications section for more information.

OUT(nom)

this situation, disable the device before powering down the VIN.

is not measured for the TPS73615 (V

DO

+V

OUT

<1.6V, when VIN≤ 1.6V, the output will lock to VINand may result in a damaging over-voltage level on the output. To avoid

or 1.7V, whichever is greater.

DO

OUT(nom)

= 1.5V) since minimum VIN= 1.7V.

3

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Servo

Error
Amp

Ref

27k

Ω

8k

Ω

Current

Limit

Thermal

Protection

Bandgap

NR

OUT

R

1

R

2

EN

GND

IN

R

1

+ R2= 80k

Ω

4MHz

Charge Pump

V

O

1.2V

1.5V

1.8V

2.5V

2.8V

3.0V

3.3V

R

1

Short

23.2kΩ

28.0kΩ

39.2kΩ

44.2kΩ

46.4kΩ

52.3kΩ

R

2

Open

95.3kΩ

56.2kΩ

36.5kΩ

33.2kΩ

30.9kΩ

30.1kΩ

Table 1. Standard 1%

Resistor Values for

Common Output Voltages

NOTE: V

OUT

= (R1 + R2)/R2 × 1.2 04;
R1R2 ≅ 19kΩ for best
accuracy.

Servo

Error

Amp

Ref

Current

Limit

Thermal

Protection

Bandgap

OUT

FB

R

1

R

2

EN

GND

IN

80k

Ω

8k

Ω

27k

Ω

4MHz

Charge Pump

TPS736xx

SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

FUNCTIONAL BLOCK DIAGRAMS

4

Figure 1. Fixed Voltage Version

Figure 2. Adjustable Voltage Version

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DCQ PACKAGE

SOT223

(TOP VIEW)

1 2 3 4 5

IN

OUT

GND

NR/FB

EN

DBV PACKAGE

SOT23

(TOP VIEW)

IN

GND

EN NR/FB

OUT1
2
3 4

5

TAB IS GND

IN
N/C
N/C
EN

8
7
6
5

OUT

N/C

NR/FB

GND

1
2
3
4

DRB PACKAGE

3mm x 3mm SON

(TOP VIEW)

TPS736xx

SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

PIN ASSIGNMENTS

Terminal Functions

SOT23 SOT223 3x3 SON

NAME PIN NO. PIN NO. PIN NO. DESCRIPTION

IN 1 1 8 Unregulated input supply
GND 2 3 4, Pad Ground
EN 3 5 5 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the

NR 4 4 3 Fixed voltage versions only—connecting an external capacitor to this pin bypasses

FB 4 4 3 Adjustable voltage version only—this is the input to the control loop error amplifier,

OUT 5 2 1 Output of the Regulator. There are no output capacitor requirements for stability.

(DBV) (DCQ) (DRB)

regulator into shutdown mode. Refer to the Shutdown section under Applications
Information for more details. EN can be connected to IN if not used.

noise generated by the internal bandgap, reducing output noise to very low levels.

and is used to set the output voltage of the device.

5

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0.5

0.4

0.3

0.2

0.1
0

−

0.1

−

0.2

−

0.3

−

0.4

−

0.5

Change in V

OUT

(%)

0 50 100 150 300 350200 250 400

I

OUT

(mA)

Referred to I

OUT

= 10mA

−

40C

+125C

+25C

0.20

0.15

0.10

0.05

0

−

0.05

−

0.10

−

0.15

−

0.20

Change in V

OUT

(%)

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

IN

−

V

OUT

(V)

+125C

+25C

−

40C

Referred to VIN= V

OUT

+ 0.5V at I

OUT

= 10mA

100

80

60

40

20

0

V

DO

(mV)

0 50 100 150 200 400250 300 350

I

OUT

(mA)

+125C

+25C

−

40C

TPS73625DBV

100

80

60

40

20

0

V

DO

(mV)

−

50−25 0 25 50 75 100 125

Temperature (C)

TPS73625DBV

30

25

20

15

10

5

0

Percent of Units (%)

−

1.0

−

0.9

−

0.8

−

0.7

−

0.6

−

0.5

−

0.4

−

0.3

−

0.2

−

0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

V

OUT

Error (%)

I

OUT

= 10mA

18
16
14
12
10

8
6
4
2
0

Percent of Units (%)

−

100

−

90

−

80

−

70

−

60

−

50

−

40

−

30

−

20

−

10

0

10

20

30

40

50

60

70

80

90

100

Worst Case dV

OUT

/dT (ppm/C)

I

OUT

= 10mA

All VoltageVersions

TPS736xx

SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

For all voltage versions, at TJ= +25°C, V

LOAD REGULATION LINE REGULATION

Figure 3. Figure 4.

DROPOUT VOLTAGE vs OUTPUT CURRENT DROPOUT VOLTAGE vs TEMPERATURE

TYPICAL CHARACTERISTICS

= V

IN

OUT(nom)

+ 0.5V, I

noted.

OUT

= 10mA, V

= 1.7V, and C

EN

OUT

= 0.1µF, unless otherwise

OUTPUT VOLTAGE ACCURACY HISTOGRAM OUTPUT VOLTAGE DRIFT HISTOGRAM

6

Figure 5. Figure 6.

Figure 7. Figure 8.

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1000

900
800
700
600
500
400
300
200
100

0

I

GND

(

µ

A)

0 100 200 300 400

I

OUT

(mA)

VIN= 5.5V
VIN= 4V
VIN= 2V

1000

900
800
700
600
500
400
300
200
100

0

I

GND

(

µ

A)

−

50−25 0 25 50 75 100 125

Temperature (C)

I

OUT

= 400mA

VIN= 5.5V
VIN= 3V
VIN= 2V

800
700
600
500
400
300
200
100

0

Current Limit (mA)

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

V

OUT

(V)

TPS73633

I

CL

I

SC

1

0.1

0.01

I

GND

(

µ

A)

−

50−25 0 25 50 75 100 125

Temperature (C)

V

ENABLE

= 0.5V

VIN= VO+ 0.5V

800
750
700
650
600
550
500
450
400

Current Limit (mA)

1.5 2.5 3.0 3.5 4.0 4.5 5.02.0 5.5
V

IN

(V)

800
750
700
650
600
550
500
450
400

Current Limit (mA)

−

50−25 0 25 50 75 100 125

Temperature (C)

TYPICAL CHARACTERISTICS (continued)

For all voltage versions, at TJ= +25°C, V
noted.

GROUND PIN CURRENT vs OUTPUT CURRENT GROUND PIN CURRENT vs TEMPERATURE

Figure 9. Figure 10.

TPS736xx

SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

= V

IN

OUT(nom)

+ 0.5V, I

OUT

= 10mA, V

= 1.7V, and C

EN

OUT

= 0.1µF, unless otherwise

CURRENT LIMIT vs V

(FOLDBACK) vs TEMPERATURE

OUT

Figure 11. Figure 12.

CURRENT LIMIT vs V

IN

GROUND PIN CURRENT in SHUTDOWN

CURRENT LIMIT vs TEMPERATURE

Figure 13. Figure 14.

7