TEXAS INSTRUMENTS TPS735xx Technical data
DRBPACKAGE
3mmx3mmSON
(TOPVIEW)
8
7
6
5
OUT
N/C
NR/FB
GND
IN
N/C
N/C
EN
1
2
3
4
GND
DRVPACKAGE
2mmx2mmSON
IN
N/C
EN
6
5
4
OUT
NR/FB
GND
1
2
3
GND
(TOPVIEW)
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TPS735xx
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500mA, Low Quiescent Current, Ultra-Low Noise, High PSRR
Low Dropout Linear Regulator
1
FEATURES
2
• 500mA Low Dropout Regulator with EN
• Low IQ: 46μA
• Multiple Output Voltage Versions Available:
– Fixed Outputs of 1.0V to 4.3V Using
Innovative Factory EEPROM Programming
– Adjustable Outputs from 1.25V to 6.0V
• High PSRR: 60dB at 1kHz
• Ultra-low Noise: 28μV
• Fast Start-Up Time: 45μs
• Stable with a Low-ESR, 2.0μF Typical Output
Capacitance
• Excellent Load/Line Transient Response
• 2% Overall Accuracy (Load/Line/Temp,
V
> 2.2V)
OUT
• Very Low Dropout: 280mV at 500mA
• 2mm × 2mm SON-6 and 3mm × 3mm SON-8
Packages
RMS
SBVS087H –JUNE 2008–REVISED NOVEMBER 2009
DESCRIPTION
The TPS735xx family of low-dropout (LDO),
low-power linear regulators offers excellent ac
performance with very low ground current. High
power-supply rejection ratio (PSRR), low noise, fast
start-up, and excellent line and load transient
response are provided while consuming a very low
46μA (typical) ground current. The TPS735xx is
stable with ceramic capacitors and uses an advanced
BiCMOS fabrication process to yield a typical dropout
voltage of 250mV at 500mA output. The TPS735xx
uses a precision voltage reference and feedback loop
to achieve overall accuracy of 2% (V
all load, line, process, and temperature variations. It
is fully specified from TJ= –40°C to +125°C and is
offered in low-profile, 2mm x 2mm SON and 3mm ×
3mm SON packages that are ideal for wireless
handsets, printers, and WLAN cards.
> 2.2V) over
OUT
APPLICATIONS
• WiFi, WiMax
• Printers
• Cellular Phones, SmartPhones
• Handheld Organizers, PDAs
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2009, Texas Instruments Incorporated
TPS735xx
SBVS087H –JUNE 2008–REVISED NOVEMBER 2009
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PRODUCT V
(1)
OUT
(2)
TPS735xx yyy z XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Output voltages from 1.0V to 3.6V in 50mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted).
PARAMETER TPS735xx UNIT
VINrange –0.3 to +7.0 V
VENrange –0.3 to VIN+0.3 V
V
range –0.3 to VIN+0.3 V
OUT
VFBrange –0.3 to VFB(TYP) +0.3 V
Peak output current Internally limited
Continuous total power dissipation See Dissipation Ratings Table
Junction temperature range, T
Storage temperature range , T
ESD rating, HBM 2 kV
ESD rating, CDM 500 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
J
STG
(1)
–55 to +150 °C
–55 to +150 °C
DISSIPATION RATINGS
BOARD PACKAGE R
(1)
Low-K
High-K
High-K
(2)
(2) (3)
DRV 20°C/W 140°C/W 7.1mW/°C 715mW 395mW 285mW
DRV 20°C/W 65°C/W 15.4mW/°C 1.54W 845mW 615mW
DRB 1.2°C/W 40°C/W 25mW/°C 2.5W 1.38W 1.0W
θJC
R
θJA
(1) The JEDEC low-K (1s) board used to derive this data was a 3in × 3in (7,62cm × 7,62cm), two-layer board with 2-ounce (56,699g)
copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in (7,62cm × 7,62cm), multilayer board with 1-ounce (28,35g)
internal power and ground planes and 2-ounce (56,699g) copper traces on top and bottom of the board.
(3) The R
value of the DRB package is junction-to-pad; note that this is not junction-to-case (top center of IC package).
θJC
2 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated
DERATING FACTOR
ABOVE TA= +25°C TA< +25°C TA= +70°C TA= +85°C
TPS735xx
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ELECTRICAL CHARACTERISTICS
Over operating temperature range (TJ= –40°C to +125°C), VIN= V
VEN= VIN, C
Typical values are at TJ= +25°C.
V
IN
V
FB
V
OUT
V
OUT
V
OUT
ΔV
%/ ΔVINLine regulation
OUT
ΔV
%/ ΔI
OUT
V
DO
I
CL
I
GND
I
SHDN
I
FB
PSRR VIN= 3.85V, V
V
N
T
STR
V
EN(HI)
V
EN(LO)
I
EN(HI)
T
SD
T
UVLO
(1) Minimum VIN= V
(2) VDOis not measured for devices with V
= 2.2μF, CNR= 0.01μF, unless otherwise noted. For TPS73501, V
OUT
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range
(1)
Internal reference (TPS73501) 1.184 1.208 1.232 V
Output voltage range (TPS73501) V
Output accuracy Nominal TJ= +25°C –1.0 +1.0 %
V
+ 0.3V ≤ VIN≤ V
DRB
package
over VIN,
I
, Temp
OUT
Output accuracy
(1)
DRV
package
over VIN,
I
, Temp
OUT
(1)
Load regulation 500μA ≤ I
OUT
Dropout voltage
(VIN= V
OUT(NOM)
(2)
– 0.1V)
Output current limit VIN= V
Ground pin current 500μA ≤ I
Shutdown current (I
) VEN≤ 0.4V 0.15 1.0 μA
GND
OUT
1mA ≤ I
OUT
V
+ 0.3V ≤ VIN≤ 6.5V
OUT
1mA ≤ I
OUT
V
+ 0.3V ≤ VIN≤ V
OUT
VIN≤ 6.5V –2.0 ±1.0 +2.0 %
1mA ≤ I
OUT
V
+ 0.3V ≤ VIN≤ V
OUT
VIN≤ 6.5V –3.0 ±1.0 +3.0 %
1mA ≤ I
OUT
V
OUT(NOM)
OUT
I
= 500mA 280 500 mV
OUT
V
= 0.9 × V
OUT
OUT(NOM)
VIN≥ 2.7V
OUT
Feedback pin current (TPS73501) –0.5 0.5 μA
f = 100Hz 60 dB
Power-supply rejection ratio
= 2.85V,
CNR= 0.01μF, I
OUT
OUT
= 100mA
f = 1kHz 56 dB
f = 10kHz 41 dB
f = 100kHz 28 dB
Output noise voltage
BW = 10Hz to 100kHz, V
Startup time, V
90%
V
= 2.85V,
OUT
RL= 14Ω, C
OUT
= 0% to
OUT
= 2.2μF
OUT
= 2.8V
CNR= 0.01μF 11 x V
CNR= none 95 x V
CNR= none 45 μs
CNR= 0.001μF 45 μs
CNR= 0.01μF 50 μs
CNR= 0.047μF 50 μs
Enable high (enabled) 1.2 V
Enable low (shutdown) 0 0.4 V
Enable pin current, enabled VEN= VIN= 6.5V 0.03 1.0 μA
Thermal shutdown temperature
J
Operating junction temperature –40 +125 °C
Shutdown, temperature increasing 165 °C
Reset, temperature decreasing 145 °C
Under-voltage lock-out VINrising 1.90 2.20 2.65 V
Hysteresis VINfalling 70 mV
+ VDOor 2.7V, whichever is greater.
OUT
OUT(NOM)
< 2.8V because minimum VIN= 2.7V.
SBVS087H –JUNE 2008–REVISED NOVEMBER 2009
OUT(TYP)
+ 0.5V or 2.7V, whichever is greater; I
= 3.0V.
OUT
OUT
= 1mA,
2.7 6.5 V
6.0 V
≤ 500mA, V
≤ 500mA, V
≤ 500mA, V
≤ 500mA, V
OUT
OUT
OUT
> 6.5V
OUT
OUT
+ 3.0V,
OUT
+ 3.0V,
OUT
> 2.2V
≤ 2.2V
> 2.2V
> 2.2V
FB
–2.0 ±1.0 +2.0 %
–3.0 ±1.0 +3.0 %
+ 0.3V ≤ VIN≤ 6.5V 0.02 %/V
≤ 500mA 0.005 %/mA
OUT(NOM)
+ 0.9V, 800 1170 1720 mA
≤ 500mA 45 65 μA
OUT
OUT
μV
RMS
μV
RMS
V
IN
Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 3
Thermal
Shutdown
UVLO
Current
Limit
3.3MW
Overshoot
Detect
500kW
1.208V
Bandgap
IN
EN
FB
OUT
GND
400W
Thermal
Shutdown
UVLO
Current
Limit
2 Am
Overshoot
Detect
500kW
Quickstart
1.208V
Bandgap
(1)
IN
EN
NR
OUT
GND
400W
NOTE(1): Fixedvoltageversionsbetween1.0Vto1.2Vhavea1.0Vbandgapcircuit
insteadofa1.208Vbandgapcircuit.
8
7
6
5
OUT
N/C
NR/FB
GND
IN
N/C
N/C
EN
1
2
3
4
GND
IN
N/C
EN
6
5
4
OUT
NR/FB
GND
1
2
3
GND
TPS735xx
SBVS087H –JUNE 2008–REVISED NOVEMBER 2009
查询"TPS73512"供应商
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. Fixed Voltage Versions Figure 2. Adjustable Voltage Versions
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DEVICE INFORMATION
PIN CONFIGURATIONS
DRB PACKAGE
3mm × 3mm SON-6
(TOP VIEW)
TPS735xx
NAME DRV DRB DESCRIPTION
IN 6 8 Input supply.
GND 3, Pad 4 Ground. The pad must be tied to GND.
EN 4 5
NR 2 3
FB 2 3
OUT 1 1
N/C 5 2, 6, 7 Not internally connected. This pin must either be left open, or tied to GND.
4 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated
DRV PACKAGE
2mm × 2mm SON-6
(TOP VIEW)
PIN DESCRIPTIONS
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into
shutdown mode. EN can be connected to IN if not used.
Fixed voltage versions only; connecting an external capacitor to this pin bypasses noise
generated by the internal bandgap. This allows output noise to be reduced to very low levels.
Adjustable version only; this is the input to the control loop error amplifier, and is used to set the
output voltage of the device.
Output of the regulator. A small capacitor (total typical capacitance ≥ 2.0μF ceramic) is needed
from this pin to ground to assure stability.
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
-
-
-
-
-
ChangeinV (%)
OUT
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
V (V)
IN
TJ= 40 C- °
TJ=0 C°
TJ=+125 C°
TJ=+85 C°
TJ=+25 C°
I =100mA
OUT
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
-
-
-
-
-
ChangeinV (%)
OUT
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
V (V)
IN
TJ= 40 C- °
TJ=0 C°
TJ=+125 C°
TJ=+85 C°
TJ=+25 C°
I =100mA
OUT
2.86
2.85
2.84
2.83
2.82
2.81
2.80
2.79
2.78
2.77
2.76
2.75
2.74
V (V)
OUT
0 50 100 150 200 250 300 350 400 450 500
Load(mA)
TJ= 40 C- °
TJ=+125 C°
TJ=+85 C°
Y-axisrangeis 2%of2.8V±
2.55
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
2.46
2.45
V (V)
OUT
0 50 100 150 200 250 300 350 400 450 500
Load(mA)
TJ= 40 C- °
TJ=+125 C°
TJ=+85 C°
TJ=0 C°
TJ=+25 C°
Y-axisrangeis 2%of2.5V±
500
450
400
350
300
250
200
150
100
50
0
I (na)
GND
-40 -25 -10 5 20 35 50 65 80 95 110 125
T ( )JC
°
VIN=6.5V
VEN=0.4V
VIN=5.0V
VIN=3.3V
60
50
40
30
20
10
0
I ( A)m
GND
0 50 100 150 200 250 300 350 400 450 500
I (mA)
OUT
TJ= 40 C- °
TJ=+125 C°
TJ=+85 C°
TJ=0 C°
TJ=+25 C°
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TYPICAL CHARACTERISTICS
Over operating temperature range (TJ= –40°C to +125°C), VIN= V
VEN= VIN,C
= 2.2μF, CNR= 0.01μF, unless otherwise noted. For TPS73501, V
OUT
+25°C.
TPS73501 LINE REGULATION TPS73525 LINE REGULATION
Figure 3. Figure 4.
TPS73501 LOAD REGULATION TPS73525 LOAD REGULATION
OUT(TYP)
SBVS087H –JUNE 2008–REVISED NOVEMBER 2009
+ 0.5V or 2.7V, whichever is greater; I
= 2.8V. Typical values are at TJ=
OUT
OUT
= 1mA,
Figure 5. Figure 6.
TPS73525 GROUND PIN CURRENT vs TPS73525 GROUND PIN CURRENT (DISABLE) vs
OUTPUT CURRENT TEMPERATURE
Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 5
Figure 7. Figure 8.
400
350
300
250
200
150
100
50
0
V (mV)
DO
0 50 100 150 200 250 300 350 400 450 500
I (mA)
OUT
TJ= 40 C- °
TJ=+125 C°
TJ=+85 C°
TJ=0 C°
TJ=+25 C°
10 100
1k
10k 100k
1M
10M
Frequency(Hz)
90
80
70
60
50
40
30
20
10
0
PSRR(dB)
C =2.2 F
OUT
m
C =0.01 FNRm
I =250mA
OUT
I =
100mA
OUT
I =
500mA
OUT
I =200mA
OUT
I =1mA
OUT
10 100
1k
10k 100k
1M
10M
Frequency(Hz)
90
80
70
60
50
40
30
20
10
0
PSRR(dB)
C =2.2 F
OUT
m
C =0.01 FNRm
I =200mA
OUT
I =
100mA
OUT
I =
500mA
OUT
I =250mA
OUT
I =1mA
OUT
10 100
1k
10k 100k
1M
10M
Frequency(Hz)
90
80
70
60
50
40
30
20
10
0
PSRR(dB)
C =10 F
OUT
m
C =0.01 FNRm
I =200mA
OUT
I =
100mA
OUT
I =
500mA
OUT
I =
200mA
OUT
I =1mA
OUT
TPS735xx
SBVS087H –JUNE 2008–REVISED NOVEMBER 2009
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ= –40°C to +125°C), VIN= V
VEN= VIN,C
= 2.2μF, CNR= 0.01μF, unless otherwise noted. For TPS73501, V
OUT
OUT(TYP)
+25°C.
TPS73501 DROPOUT VOLTAGE vs POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY
OUTPUT CURRENT (VIN– V
Figure 9. Figure 10.
POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY
(VIN– V
= 0.5V) (VIN– V
OUT
+ 0.5V or 2.7V, whichever is greater; I
= 2.8V. Typical values are at TJ=
OUT
= 1.0V)
OUT
= 0.3V)
OUT
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= 1mA,
OUT
Figure 11. Figure 12.
6 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated
30
25
20
15
10
5
0
TotalNoise( V )m
RMS
0
5
10 15 20 25
C ( F)m
OUT
I =1mA
C =0.01 F
OUT
NR
m
140
120
100
80
60
40
20
0
TotalNoise( V )m
RMS
0.01 0.1
1
10
C (nF)
NR
I =1mA
C =2.2 F
OUT
OUT
m
10 s/divm
V
OUT
V
EN
C =10 F
OUT
m
C =2.2 F
OUT
m
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.5-
Voltage(V)
10 s/divm
V
EN
V
OUT
C =2.2 F
OUT
m
C =10 F
OUT
m
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.5-
Voltage(V)
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ= –40°C to +125°C), VIN= V
VEN= VIN,C
+25°C.
= 2.2μF, CNR= 0.01μF, unless otherwise noted. For TPS73501, V
OUT
TPS73525 TPS73525
TOTAL NOISE vs C
NR
Figure 13. Figure 14.
TPS73525
TURN-ON RESPONSE TPS73525
(VIN= VEN) EN RESPONSE OVER STABLE V
OUT(TYP)
SBVS087H –JUNE 2008–REVISED NOVEMBER 2009
+ 0.5V or 2.7V, whichever is greater; I
= 2.8V. Typical values are at TJ=
OUT
TOTAL NOISE vs C
OUT
IN
OUT
= 1mA,
Figure 15. Figure 16.
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