Available in 5-V, 4.85-V, 3.3-V, 3.0-V, 2.75-V§,
and 2.5-V Fixed-Output and Adjustable
Versions
D
Dropout Voltage <85 mV Max at
I
= 100 mA (TPS7250)
O
D
Low Quiescent Current, Independent of
SENSE†/FB
RESET/PG
D, P, OR PW PACKAGE
(TOP VIEW)
‡
GND
EN
1
2
3
4
8
7
6
5
OUT
OUT
IN
IN
Load, 180 µA Typ
†
D
8-Pin SOIC and 8-Pin TSSOP Package
D
Output Regulated to ±2% Over Full
Operating Range for Fixed-Output Versions
D
Extremely Low Sleep-State Current,
0.5 µA Max
D
Power-Good (PG) Status Output
description
The TPS72xx family of low-dropout (LDO) voltage
regulators offers the benefits of low-dropout
SENSE – Fixed voltage options only
(TPS7225, TPS7228
TPS7248, and TPS7250)
‡
FB – Adjustable version only (TPS7201)
600
TA = 25°C
500
400
§
, TPS7230, TPS7233,
TPS7225
TPS7230
voltage, micropower operation, and miniaturized
packaging. These regulators feature extremely
300
low dropout voltages and quiescent currents
compared to conventional LDO regulators.
Offered in small-outline integrated-circuit (SOIC)
packages and 8-terminal thin shrink small-outline
(TSSOP), the TPS72xx series devices are ideal
for cost-sensitive designs and for designs where
board space is at a premium.
A combination of new circuit design and process
innovation has enabled the usual pnp pass
200
– Dropout Voltage – mV
DO
V
100
0
050100150
IO – Output Current – mA
TPS7250
TPS7248
transistor to be replaced by a PMOS device.
Because the PMOS pass element behaves as a
low-value resistor, the dropout voltage is very low
Figure 1. Typical Dropout Voltage Versus
Output Current
– maximum of 85 mV at 100 mA of load current
(TPS7250) – and is directly proportional to the
load current (see Figure 1). Since the PMOS pass
element is a voltage-driven device, the quiescent current is very low (300 µA maximum) and is stable over the
entire range of output load current (0 mA to 250 mA). Intended for use in portable systems such as laptops and
cellular phones, the low-dropout voltage and micropower operation result in a significant increase in system
battery operating life.
TPS7233
200250
The TPS72xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current
to 0.5 µA maximum at T
= 25°C. Other features include a power-good function that reports low output voltage
J
and may be used to implement a power-on reset or a low-battery indicator.
The TPS72xx is offered in 2.5-V , 2.75-V
§
, 3-V , 3.3-V , 4.85-V, and 5-V fixed-voltage versions and in an adjustable
version (programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum
of 2% over line, load, and temperature ranges (3% for adjustable version).
§
This device is in the product preview stage of development. Please contact the local TI sales office for availability.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
This document contains information on products in more than one phase
of development. The status of each device is indicated on the page(s)
specifying its electrical characteristics.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1998, Texas Instruments Incorporated
1
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
T
–55 C to 150 C
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
AVAILABLE OPTIONS
OUTPUT VOLTAGE
J
–
°
The D package is available taped and reeled. Add R suffix to device type (e.g., TPS7250QDR). The PW package is only available left-end
taped and reeled. The TPS7201Q is programmable using an external resistor divider (see application information). The chip form is tested
at 25°C.
NOTE A: Capacitor selection is nontrivial. See application information section
for details.
5
IN
6
IN
SENSE
4
EN
GND
3
†
, TPS7230Q, TPS7233Q, TPS7248Q, TPS7250Q
PG
OUT
OUT
2
1
7
8
PG
250 kΩ
V
O
C
O
(see Note A)
+
10 µF
CSR = 1 Ω
Figure 2. Typical Application Configuration
†
This device is in the product preview stage of development. Please contact the local TI sales office for availability.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
TPS72xx chip information
These chips, when properly assembled, display characteristics similar to the TPS72xxQ. Thermal compression
or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
7
(7)
57
1
(1)
(2)
(6)
6
2
functional block diagram
(5)
5
69
(4)
4
(5)
(3)
IN
(2)
EN
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
†
Fixed-voltage options only (TPS7225, TPS7228#,
3
(3)
TPS7230, TPS7233, TPS7248, and TPS7250)
‡
Adjustable version only (TPS7201)
NOTE A. For most applications, OUT and SENSE should
be tied together as close as possible to the device;
for other implementations, refer to the SENSE-pin
connection discussion in the application
information section of this data sheet.
TPS72xx
(1)
GND
(6)
(4)
(7)
SENSE
ĕ
FB
OUT
PG
Ĕ
IN
_
+
§
1.12 V
GND
low (active).
+
_
EN
V
= 1.188 V
ref
§
Switch positions are shown with EN
¶
For most applications, SENSE should be externally connected to OUT as close as possible to the device.
For other implementations, refer to the SENSE-pin connection discussion in application information section.
#
This device is in the product preview stage of development. Please contact the local TI sales office for availability.
§§
PG
OUT
SENSE¶/FB
R1
R2
RESISTOR DIVIDER OPTIONS
DEVICE
TPS7201
TPS7225
TPS7228
TPS7230
TPS7233
TPS7248
TPS7250
NOTE A: Resistors are nominal values only.
#
0
257
306
357
420
726
756
COMPONENT COUNT
MOS transistors
Bilpolar transistors
Diodes
Capacitors
Resistors
∞
233
233
233
233
233
233
UNITR1R2
Ω
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
108
41
4
15
75
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
PACKAGE
A
PPW1175 mW
8.74 mW/°C
782 mW
650 mW
301 mW
PACKAGE
C
PPW2738 mW
20.49 mW/°C
1816 mW
1508 mW
689 mW
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
ĕ
Input voltage range
Output current, I
Continuous total power dissipation See Dissipation Rating Tables 1 and 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
All voltage values are with respect to network ground terminal.
D
D
NOTE 1: Dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute
maximum of 150°C. For guidelines on maintaining junction temperature within the recommended operating range,
see application information section.
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERA TURE (see Note 1 and Figure 3)
T
≤ 25°CDERATING FACTORT
POWER RATINGABOVE TA = 25°CAPOWER RATINGAPOWER RATINGAPOWER RATING
725 mW
525 mW
DISSIPATION RATING TABLE 2 – CASE TEMPERA TURE (see Note 1 and Figure 4)
T
≤ 25°CDERATING FACTORT
POWER RATINGABOVE TC = 25°CCPOWER RATINGCPOWER RATINGCPOWER RATING
2063 mW
2900 mW
5.8 mW/°C
4.2 mW/°C
16.5 mW/°C
23.2 mW/°C
J
= 70°CT
464 mW
°
336 mW
= 70°CT
1320 mW
°
1856 mW
= 85°CT
377 mW
273 mW
= 85°CT
1073 mW
1508 mW
= 125°C
145 mW
105 mW
= 125°C
413 mW
580 mW
Ĕ
MAXIMUM CONTINUOUS DISSIPATION
vs
FREE-AIR TEMPERATURE
1200
1100
1000
900
800
700
600
500
400
300
200
– Maximum Continuous Dissipation – mW
D
100
P
0
255075100
P Package
R
= 114.4°C/W
θJA
D Package
R
PW Package
R
= 238°C/W
θJA
TA – Free-Air Temperature – ° C
θJA
Figure 3
= 172°C/W
125150
MAXIMUM CONTINUOUS DISSIPATION
vs
CASE TEMPERATURE
3000
2500
2000
1500
1000
500
– Maximum Continuous Dissipation – mW
D
P
0
255075100
P Package
R
= 48.8°C/W
θJC
PW Package
R
= 43.1°C/W
θJC
D Package
R
= 60.6°C/W
θJC
TC – Case Temperature – °C
Figure 4
125150
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
†
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
recommended operating conditions
MINMAXUNIT
TPS7201Q310
TPS7225Q3.6510
TPS7228Q
Input voltage, V
High-level input voltage at EN, V
Low-level input voltage at EN, V
Output current, I
Operating virtual junction temperature, T
†
Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage at the
maximum specified load range. Since dropout voltage is a function of output current, the usable range can be extended for lighter loads. To
calculate the minimum input voltage for the maximum load current used in a given application, use the following equation:
V
Because the TPS7201 is programmable, r
calculating VDO from r
lower limit for the recommended input-voltage range for the TPS7201.
‡
This device is in the product preview stage of development. Please contact the local TI sales office for availability.
I(min)
+
I
O
V
O(max)
DS(on)
IH
IL
J
)
V
DO(max load)
is given in Note 3 under the TPS7201 electrical characteristics table. The minimum value of 3 V is the absolute
should be used to calculate VDO before applying the above equation. The equation for
‡
TBD10
V
2V
0.5V
0250mA
–40125°C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
PARAMETER
TEST CONDITIONS
‡
T
UNIT
,
,
Ground current (active mode)
EN≤0.5V,
V
I
V
O
V,
A
Input current (standby mode)
EN
V
3 V ≤ V
V
A
Output current limit threshold
V
V
V
V
A
g
EN
V
3 V ≤ V
V
A
PG leak
t
V
Normal operation
A
EN logic high (standb
)
40°C to 125°C
V
EN logic l
)
3 V ≤ V
V
V
EN i
t
0 V ≤ V
V
A
Minimum V
for active pass element
V
Minimum V
for valid PG
I
300 µA
V
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
electrical characteristics, IO = 10 mA, EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE/FB shorted to OUT
(unless otherwise noted)
J
EN ≤ 0.5 V
0 mA ≤ IO ≤ 250 mA
p
p
Pass-element leakage current in
standby mode
age curren
Output voltage temperature coefficient–40°C to 125°C3175 ppm/°C
Thermal shutdown junction temperature165°C
y mode
ow (active mode
EN hysteresis voltage25°C50mV
nput curren
I
I
†
CSR(compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any
series resistance added externally, and PWB trace resistance to CO.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
p
=
,
I
= 0
O
=
,
I
= 10 V,
PG
3 V ≤ VI ≤ 6 V
6 V ≤ VI ≤ 10 V
≤ 10
I
≤ 10
I
=
PG
V
= V
= 10
I
+ 1 V
+1
≤ 10
I
≤ 10
I
p
25°C180225
–40°C to 125°C325
25°C0.5
–40°C to 125°C1
25°C0.61
–40°C to 125°C1.5
25°C0.5
–40°C to 125°C1
25°C0.5
–40°C to 125°C0.5
°
–
–40°C to 125°C0.5
–40°C to 125°C–0.50.5
–40°C to 125°C2.5
–40°C to 125°C1.9
°
25°C0.5
25°C–0.50.5
25°C1.92.5
25°C1.11.5
TPS72xxQ
MINTYPMAX
µ
µ
µ
µ
2
2.7
µ
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
‡
T
UNIT
g(
V
50 µA ≤ I
250 mA
Ω
Input regulation
I
,
µ
O
,
mV
O
,
I
,
Output regulation
mV
O
µ,
I
,
I
A
Ripple rejection
f
120 H
dB
O
,
†
CSR
†
Ω
PG
¶
I
400 µA
V
2.13 V
V
FB input current
nA
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
TPS7201Q electrical characteristics, IO = 10 mA, V
= 3.5 V, EN = 0 V, CO = 4.7 µF (CSR† = 1 Ω), FB
I
shorted to OUT at device leads (unless otherwise noted)
J
Reference voltage (measured
at FB with OUT connected to
FB)
Reference voltage
temperature coefficient
Pass-element series
resistance (see Note 3)
p
p
pp
Output noise spectral densityf = 120 Hz25°C2
Output noise voltage
PG trip-threshold voltage
PG hysteresis voltage
p
output low voltage
p
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
§
This voltage is not recommended.
¶
Output voltage programmed to 2.5 V with closed-loop configuration (see application information).
NOTES: 2. When VI < 2.9 V and IO > 100 mA simultaneously, pass element r
dropout voltage prevents the regulator from maintaining the specified tolerance range.
3. To calculate dropout voltage, use equation:
r
DS(on)
5.9 V , which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V , 4 V, and 6 V , respectively. For other
programmed values, refer to Figures 10 and 11.
¶
¶
VDO = IO
is a function of both output current and input voltage. The parametric table lists r
VI = 3.5 V,IO = 10 mA25°C1.188V
3 V ≤ VI ≤ 10 V,
See Note 2
VI = 2.4 V,
VI = 2.4 V,
I
VI = 3.9 V,50 µA ≤ IO ≤ 250 mA25°C1
VI = 5.9 V,50 µA ≤ IO ≤ 250 mA25°C0.8
CO = 4.7 µF25°C235
CO = 10 µF25°C190
CO = 100 µF25°C125
PG
=
I
–40°C to 125°C1.1521.224V
–40°C to 125°C3175 ppm/°C
25°C1.62.7
–40°C to 125°C4.5
25°C23
–40°C to 125°C36
25°C1525
–40°C to 125°C36
25°C1727
–40°C to 125°C43
25°C4960
–40°C to 125°C32
25°C4550
–40°C to 125°C30
–40°C to 125°C
25°C12mV
25°C0.10.4
–40°C to 125°C0.4
25°C–100.110
–40°C to 125°C–2020
increases (see Figure 10) to a point such that the resulting
DS(on)
TPS7201Q
MINTYPMAX
0.95 ×
V
FB(nom)
for VI = 2.4 V, 2.9 V, 3.9 V, and
DS(on)
µV/√Hz
µVrms
V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
PARAMETER
TEST CONDITIONS
‡
T
UNIT
Output voltage
V
D
I
250 mA
V
V
Pass-element series resistance
(
O)O
,
I
,
Ω
Input regulation
V
50 µA ≤ I
250 mA
mV
I
250 mA
V
V
Output regulation
mV
I
250 mA
V
V
I
A
Ripple rejection
f
120 H
dB
I
250 mA
CSR
†
Ω
PG output low voltage
I
1.2 mA
V
2.13 V
V
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
TPS7225Q electrical characteristics, IO = 10 mA, V
= 3.5 V , EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE
I
shorted to OUT (unless otherwise noted)
J
p
ropout voltage
p
p
pp
Output noise spectral densityf = 120 Hz25°C2
Output noise voltage
PG trip-threshold voltage
PG hysteresis voltage
p
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
VI = 3.5 V,IO = 10 mA25°C2.5
3.5 V ≤ VI ≤ 10 V,5 mA ≤ IO ≤ 250 mA–40°C to 125°C2.452.55
=
O
(2.97 V – V
IO = 250 mA
= 3.5 V to 10 V,
I
= 5 mA to
O
= 50 µA to
O
=
10 Hz ≤ f ≤ 100 kHz,
VO voltage decreasing from above V
=
PG
†
= 1
=
,
)/I
,V
z
,
= 2.97
I
= 2.97 V,
,3.5 V ≤
,3.5 V ≤
= 50 µ
O
=
O
CO = 4.7 µF
CO = 10 µF
CO = 100 µF
=
I
O
I
I
≤
≤ 10
≤ 10
PG
25°C560850mV
–40°C to 125°C1.1V
25°C2.243.4
–40°C to 125°C3.84
25°C927
–40°C to 125°C33
25°C2836
–40°C to 125°C60
25°C2441
–40°C to 125°C73
25°C4758
–40°C to 125°C45
25°C4046
–40°C to 125°C38
25°C248
25°C200
25°C130
–40°C to 125°C
25°C50mV
25°C0.30.44
–40°C to 125°C0.5
TPS7225Q
MINTYPMAX
0.95 ×
V
O(nom)
µV/√Hz
µVrms
V
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
‡
T
UNIT
Output voltage
V
I
V
V
D
I
100 mA
V
V
mV
I
250 mA
V
V
Pass-element series resistance
(
O)O
,
I
,
Ω
Input regulation
V
50 µA ≤ I
250 mA
mV
I
250 mA
V
V
Output regulation
mV
I
250 mA
V
V
I
50 µA
Ripple rejection
f
120 H
dB
I
250 mA
CSR
†
Ω
PG output low voltage
I
V
V
V
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
TPS7228Q electrical characteristics, IO = 10 mA, V
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
VI = 3.75 V,IO = 10 mA25°C2.75
3.75 V ≤VI ≤ 10 V,5 mA ≤ IO ≤ 250 mA–40°C to 125° C2.692.81
= 10 mA,
O
=
O
=
O
(2.69 V – V
IO = 250 mA
= 3.75 V to 10 V,
I
= 5 mA to
O
= 50 µA to
O
=
10 Hz ≤ f ≤ 100 kHz,
VO voltage decreasing from above V
= 1.2 mA,
PG
†
= 1
=
z
,
,
)/I
,V
= 2.69
I
= 2.69
I
= 2.69
I
= 2.69 V,
,3.75 V ≤
,3.75 V ≤
=
O
=
O
CO = 4.7 µF
CO = 10 µF
CO = 100 µF
= 2.34
I
O
≤
≤ 10
I
≤ 10
I
PG
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
–40°C to 125°CTBD
25°CTBD
25°CTBD
25°CTBD
–40°C to 125°CTBDV
25°CTBDmV
25°CTBD
–40°C to 125°CTBD
TPS7228Q
MINTYPMAX
µVrms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
PARAMETER
TEST CONDITIONS
‡
T
UNIT
Output voltage
V
I
100 mA
V
V
D
mV
I
250 mA
V
V
Pass-element series resistance
(
O)O
,
I
,
Ω
Input regulation
V
50 µA ≤ I
250 mA
mV
I
250 mA
V
V
Output regulation
mV
I
250 mA
V
V
I
A
Ripple rejection
f
120 H
dB
I
250 mA
CSR
†
Ω
PG output low voltage
I
V
V
V
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
TPS7230Q electrical characteristics, IO = 10 mA, V
= 4 V , EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
VI = 4 V,IO = 10 mA25°C3
4 V ≤VI ≤ 10 V,5 mA ≤ IO ≤ 250 mA–40°C to 125° C2.943.06
=
O
=
O
(2.97 V – V
IO = 250 mA
= 4 V to 10 V,
I
= 5 mA to
O
= 50 µA to
O
=
10 Hz ≤ f ≤ 100 kHz,
VO voltage decreasing from above V
= 1.2 mA,
PG
†
= 1
=
z
,
,
)/I
,V
,4 V ≤
,4 V ≤
= 2.97
I
= 2.97
I
= 2.97 V,
O
≤ 10
I
≤ 10
I
= 50 µ
O
=
O
CO = 4.7 µF
CO = 10 µF
CO = 100 µF
= 2.55
I
≤
PG
25°C145185
–40°C to 125°C270
25°C390502
–40°C to 125°C900
25°C1.562.01
–40°C to 125°C3.6
25°C927
–40°C to 125°C33
25°C3445
–40°C to 125°C74
25°C4260
–40°C to 125°C98
25°C4556
–40°C to 125°C44
25°C4045
–40°C to 125°C38
25°C256
25°C206
25°C132
–40°C to 125°C
25°C50mV
25°C0.250.44
–40°C to 125°C0.44
TPS7230Q
MINTYPMAX
0.95 ×
V
O(nom)
µVrms
V
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
‡
T
UNIT
Output voltage
V
I
V
V
D
I
100 mA
V
V
mV
I
250 mA
V
V
Pass-element series resistance
(
O)O
,
I
,
Ω
Input regulation
V
50 µA ≤ I
250 mA
mV
I
250 mA
V
V
Output regulation
mV
I
250 mA
V
V
I
50 µA
Ripple rejection
f
120 H
dB
I
250 mA
CSR
†
Ω
PG output low voltage
I
V
V
V
TPS7201Q, TPS7225Q, TPS7228Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102F – MARCH 1995 – REVISED NOVEMBER 1998
TPS7233Q electrical characteristics, IO = 10 mA, V
= 4.3 V , EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE
I
shorted to OUT (unless otherwise noted)
J
p
ropout voltage
p
p
pp
Output noise spectral densityf = 120 Hz25°C2
Output noise voltage
PG trip-threshold voltage
PG hysteresis voltage
p
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
VI = 4.3 V,IO = 10 mA25°C3.3
4.3 V ≤ VI ≤ 10 V,5 mA ≤ IO ≤ 250 mA–40°C to 125° C3.233.37
= 10 mA,
O
=
O
=
O
(3.23 V – V
IO = 250 mA
= 4.3 V to 10 V,
I
= 5 mA to
O
= 50 µA to
O
=
10 Hz ≤ f ≤ 100 kHz,
VO voltage decreasing from above V
= 1.2 mA,
PG
†
= 1
,
,
)/I
,V
z
=
= 3.23
I
= 3.23
I
= 3.23
I
= 3.23 V,
,4.3 V ≤
,4.3 V ≤
=
O
=
O
CO = 4.7 µF
CO = 10 µF
CO = 100 µF
= 2.8
I
O
I
I
≤
≤ 10
≤ 10
PG
25°C1420
–40°C to 125°C30
25°C140180
–40°C to 125°C232
25°C360460
–40°C to 125°C610
25°C1.51.84
–40°C to 125°C2.5
25°C825
–40°C to 125°C33
25°C3242
–40°C to 125°C71
25°C4155
–40°C to 125°C98
25°C4052
–40°C to 125°C38
25°C3544
–40°C to 125°C33
25°C265
25°C212
25°C135
–40°C to 125°C
25°C32mV
25°C0.220.4
–40°C to 125°C0.4
TPS7233Q
MINTYPMAX
0.95 ×
V
O(nom)
µV/√Hz
µVrms
V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
11
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