TEXAS INSTRUMENTS TPS715xx Technical data
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324
5
DCK PACKAGE
(TOP VIEW)
1FB/NC
GND
NC
OUT
IN
GND
TPS715xx
OUT
IN
MSP430
Solar
Cell
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50 mA, 24 V, 3.2 µA Supply Current
Low-Dropout Linear Regulator in SC70 Package
FEATURES APPLICATIONS
• 24-V Maximum Input Voltage
• Low 3.2-µA Quiescent Current at 50 mA
• Stable With Any Capacitor ( ≥ 0.47 µF)
• 50-mA Low-Dropout Regulator
• Available in 1.8 V, 1.9 V, 2.3 V, 2.5 V, 3.0 V, 3.3
V, 3.45 V, 5.0 V, and Adjustable (1.2 V to 15 V)
• Designed to Support MSP430 Families:
– 1.9 V version ensured to be higher than
minimum V
– 2.3 V version ensured to meet 2.2 V
minimum V
– 3.45 V version ensured to be lower than
maximum V
– Wide variety of fixed output voltage options
to match V
desired MSP430 speed
• Minimum/Maximum Specified Current Limit
• 5-Pin SC70/SOT-323 (DCK) Package
• -40°C to +125°C Specified Junction
Temperature Range
• For 80mA Rated Current and Higher Power
Package, see TPS715Axx
of 1.8 V
IN
for FLASH on MSP430F2xx
IN
of 3.6 V
IN
to the minimum required for
IN
TPS715xx
SLVS338K – MAY 2001 – REVISED SEPTEMBER 2005
• Ultra Low Power Microcontrollers
• Cellular/Cordless Handsets
• Portable/Battery-Powered Equipment
DESCRIPTION
The TPS715xx low-dropout (LDO) voltage regulators
offer the benefits of high input voltage, low-dropout
voltage, low-power operation, and miniaturized packaging. The devices, which operate over an input
range of 2.5 V to 24 V, are stable with any capacitor
( ≥ 0.47 µF). The low dropout voltage and low
quiescent current allow operations at extremely low
power levels. Therefore, the devices are ideal for
powering battery management ICs. Specifically, since
the devices are enabled as soon as the applied
voltage reaches the minimum input voltage, the
output is quickly available to power continuously
operating battery charging ICs.
The usual PNP pass transistor has been replaced by
a PMOS pass element. Because the PMOS pass
element behaves as a low-value resistor, the low
dropout voltage, typically 415 mV at 50 mA of load
current, is directly proportional to the load current.
The low quiescent current (3.2 µA typically) is stable
over the entire range of output load current (0 mA to
50 mA).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2005, Texas Instruments Incorporated
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TPS715xx
SLVS338K – MAY 2001 – REVISED SEPTEMBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
PRODUCT V
TPS715 xxyyyz XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
(2) Output voltages from 1.25V to 5.4V in 50mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
(1)
(2)
OUT
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted)
VINrange -0.3 V to 24 V
Peak output current Internally limited
ESD rating, HBM 2 kV
ESD rating, CDM 500 V
Continuous total power dissipation See Dissipation Rating Table
Junction temperature range, T
Storage temperature range, T
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
J
stg
(1) (2)
UNIT
-40°C to +150°C
-65°C to +150°C
DISSIPATION RATING TABLE
BOARD PACKAGE R
(1)
Low-K
(2)
High-K
(1) The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2 ounce copper traces on top
of the board.
(2) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
2
DCK 165 395 2.52 mW/°C 250 mW 140 mW 100 mW
DCK 165 315 3.18 mW/°C 320 mW 175 mW 130 mW
°C/W R
θ JC
°C/W
θ JA
DERATING FACTOR TA≤ 25°C TA= 70°C TA= 85°C
ABOVE TA= 25°C POWER RATING POWER RATING POWER RATING
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SLVS338K – MAY 2001 – REVISED SEPTEMBER 2005
ELECTRICAL CHARACTERISTICS
over operating junction temperature range (T
otherwise noted. Typical values are at TJ= 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage
V
OUT
V
OUT
Ground pin current I
Load regulation ∆ V
Output voltage
line regulation
Output noise voltage V
Output current limit I
Power-supply ripple rejection PSRR f = 100 kHz, C
Dropout voltage
VIN= V
(1)
V
IN
voltage range (TPS71501) 1.2 15 V
accuracy
(1)
Over VIN, I
OUT
∆ V
OUT
(1)
OUT(NOM)
- 1 V
, and T -4.0 +4.0 %
OUT
GND
/ ∆ I
OUT
/ ∆ V
IN
n
CL
V
DO
= -40°C to 125°C) , V
J
= V
IN
OUT(NOM)
+ 1 V, I
OUT
= 1 mA, C
= 1 µF unless
OUT
IO= 10 mA 2.5 24
IO= 50 mA 3 24
VIN+ 1.0 V ≤ VIN≤ 24 V
100 µA ≤ I
0 ≤ I
OUT
0 mA ≤ I
0 mA ≤ I
I
= 100 µA to 50 mA 22 mV
OUT
V
+ 1 V < VIN≤ 24 V 20 60 mV
OUT
BW = 200 Hz to 100 kHz, C
I
= 50 mA
OUT
≤ 50 mA
OUT
≤ 50 mA, TJ= -40°C to +85°C 3.2 4.2
≤ 50 mA 3.2 4.8 µA
OUT
≤ 50 mA, VIN= 24 V 5.8
OUT
= 10 µF,
OUT
575 µVrms
VO= 0 V 125 750 mA
= 10 µF 60 dB
OUT
I
= 50 mA 415 750 mV
OUT
TPS715xx
V
(1) Minimum VIN= V
+ V
OUT
or the value shown for Input voltage in this table, whichever is greater.
DO
3
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_
+
Current
Sense
R1
R2
V
(IN)
GND
V
(OUT)
ILIM
Bandgap
Reference
V
ref
= 1.205 V
FB
_
+
Current
Sense
R1
R2
V
(IN)
GND
V
(OUT)
ILIM
Bandgap
Reference
V
ref
= 1.205 V
R2 = 840 kΩ
TPS715xx
SLVS338K – MAY 2001 – REVISED SEPTEMBER 2005
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
Table 1. Terminal Functions
TERMINAL
NAME
FB 1 Adjustable version. This terminal is used to set the output voltage.
NC 1 No connection
GND 2 2 Ground
NC 3 3 No connection
IN 4 4 Input supply.
OUT 5 5 Output of the regulator, any output capacitor ≥ 0.47 µF can be used for stability.
4
FIXED ADJ.
NO. DESCRIPTION
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