Texas Instruments TPS7150QPWR, TPS7150QPWLE, TPS7150QP, TPS7150QDR, TPS7150QD Datasheet

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y

LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

D

Available in 5-V, 4.85-V, and 3.3-V
Fixed-Output and Adjustable Versions

D

Very Low-Dropout Voltage ...Maximum of
32 mV at IO = 100 mA (TPS7150)

D

Very Low Quiescent Current – Independent
of Load . . . 285 µA Typ

D

Extremely Low Sleep-State Current

0.5 µA Max

D

2% Tolerance Over Specified Conditions
For Fixed-Output Versions

D

Output Current Range of 0 mA to 500 mA

D

TSSOP Package Option Offers Reduced
Component Height for Space-Critical
Applications

D

Power-Good (PG) Status Output

description

The TPS71xx integrated circuits are a family
of micropower low-dropout (LDO) voltage
regulators. An order of magnitude reduction in
dropout voltage and quiescent current over
conventional LDO performance is achieved by
replacing the typical pnp pass transistor with a
PMOS device.

D OR P PACKAGE

(TOP VIEW)

20
19
18
17
16
15
14
13
12
11

8
7
6
5

PG
SENSE
OUT
OUT

PG
NC
NC

‡

FB
NC
SENSE
OUT
OUT
NC
NC

†

†

/FB

GND

GND
GND
GND

NC – No internal connection
†

SENSE – Fixed voltage options only
(TPS7133, TPS7148, and TPS7150)

‡

FB – Adjustable version only (TPS7101)

1

EN

2

IN

3
4

IN

PW PACKAGE

(TOP VIEW)

1
2
3
4

NC

5

NC

6

EN

7

NC

8

IN

9

IN

10

IN

‡

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (maximum of 32
mV at an output current of 100 mA for the TPS7150) and is directly proportional to the output current (see
Figure 1). Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very
low and remains independent of output loading (typically 285 µA over the full range of output current, 0 mA to
500 mA). These two key specifications yield a significant improvement in operating life for battery-powered
systems. The LDO family also features a sleep mode; applying a TTL high signal to EN

(enable) shuts down

the regulator, reducing the quiescent current to 0.5 µA maximum at TJ = 25°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1997, Texas Instruments Incorporated

1

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

T

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

description (continued)

0.25
TA = 25°C

0.2

0.15

0.1

Dropout Voltage – V

0.05

0

0 0.05 0.1 0.15 0.2 0.25 0.3

TPS7133

TPS7148

TPS7150

0.35 0.4 0.45 0.5

IO – Output Current – A

Figure 1. Dropout Voltage Versus Output Current

Power good (PG) reports low output voltage and can be used to implement a power-on reset or a low-battery
indicator.

The TPS71xx is offered in 3.3-V, 4.85-V, and 5-V fixed-voltage versions and in an adjustable version
(programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2%
over line, load, and temperature ranges (3% for adjustable version). The TPS71xx family is available in PDIP
(8 pin), SO (8 pin), and TSSOP (20-pin) packages. The TSSOP has a maximum height of 1.2 mm.

AVAILABLE OPTIONS

OUTPUT VOLTAGE

J

–40°C to 125°C

†

The D and PW packages are available taped and reeled. Add R suffix to device type (e.g., TPS7150QDR). The TPS7101Q is
programmable using an external resistor divider (see application information). The chip form is tested at 25°C.

(V)

MIN TYP MAX

4.9 5 5.1 TPS7150QD TPS7150QP TPS7150QPW TPS7150Y

4.75 4.85 4.95 TPS7148QD TPS7148QP TPS7148QPW TPS7148Y

3.23 3.3 3.37 TPS7133QD TPS7133QP TPS7133QPW TPS7133Y
Adjustable

1.2 V to 9.75 V

†

SMALL OUTLINE

(D)

TPS7101QD TPS7101QP TPS7101QPW TPS7101Y

PACKAGED DEVICES

PLASTIC DIP

(P)

TSSOP

(PW)

CHIP FORM

(Y)

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y

LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

SENSE

GND

†

PG

OUT
OUT

20
15
14
13

321

+

CSR

PG

C

10 µF

V

O

‡

O

TPS71xx

8

10

IN

9

IN
IN

6

EN

V

I

0.1 µF

†

TPS7133, TPS7148, TPS7150 (fixed-voltage options)

‡

Capacitor selection is nontrivial. See application information section
for details.

Figure 2. Typical Application Configuration

TPS71xx chip information

These chips, when properly assembled, display characteristics similar to the TPS71xxQ. Thermal compression
or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with
conductive epoxy or a gold-silicon preform.

80

BONDING PAD ASSIGNMENTS

(6)

(7)

(2)

(1)

(5)

92

(3)

(4)

(5)

(3)

IN

(2)

EN

CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.

§

SENSE – Fixed voltage options only (TPS7133, TPS7148,
and TPS7150)

¶

FB – Adjustable version only (TPS7101)

NOTE A: For most applications, OUT and SENSE should

be tied together as close as possible to the device;
for other implementations, refer to SENSE-pin
connection discussion in the Applications
Information section of this data sheet.

TPS71xx

(1)

GND

(6)
(4)
(7)

SENSE

¶

FB
OUT
PG

§

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

PACKAGE

A

DP725 mW

5.8 mW/ C

464 mW

145 mW

PACKAGE

C

P

2738 mW

21.9 mW/°C

1752 mW

548 mW

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

functional block diagram

IN

EN

V

= 1.178 V

ref

†

Switch positions are shown with EN

‡

For most applications, SENSE should be externally connected to OUT as close as possible to the device. For other implementations, refer to
SENSE-pin connection discussion in Applications Information section.

†

_
+

1.12 V

low (active).

††

+
_

GND

PG

OUT

SENSE‡/FB

R1

R2

RESISTOR DIVIDER OPTIONS

DEVICE UNITR1 R2

TPS7101
TPS7133
TPS7148
TPS7150

NOTE A: Resistors are nominal values only.

0
420
726
756

COMPONENT COUNT

MOS transistors
Bilpolar transistors
Diodes
Capacitors
Resistors

∞

233
233
233

Ω

kΩ
kΩ
kΩ

464

41

4
17
76

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage range¶, VI, PG, SENSE, EN –0.3 V to 11 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output current, IO 2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Tables 1 and 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, TJ –55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

§

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

¶

All voltage values are with respect to network terminal ground.

DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURE (see Figure 3)

POWER RATING ABOVE TA = 25°CAPOWER RATINGAPOWER RATING

D 725 mW 5.8 mW/°C 464 mW 145 mW

||

PW

DISSIPATION RATING TABLE 2 – CASE TEMPERATURE (see Figure 4)

POWER RATING ABOVE TC = 25°CCPOWER RATINGCPOWER RATING

D

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

#

T

≤ 25°C DERATING FACTOR T

1175 mW

700 mW 5.6 mW/°C 448 mW 140 mW

T

≤ 25°C DERATING FACTOR T

2188 mW

9.4 mW/°C

17.5 mW/°C

= 70°C T

752 mW

= 70°C T

1400 mW

= 125°C

235 mW

#

= 125°C

438 mW

§

||

PW

#

Dissipation rating tables and figures are provided for maintenance of junction temperature at or below
absolute maximum temperature of 150°C. For guidelines on maintaining junction temperature within
recommended operating range, see the Thermal Information section.

||

Refer to Thermal Information section for detailed power dissipation considerations when using the TSSOP packages.

4

4025 mW

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

32.2 mW/°C

2576 mW

805 mW

Input voltage, V

‡

V

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y

LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

DISSIPATION DERATING CURVE

vs

FREE-AIR TEMPERATURE

1400

1200

P Package
R

1000

800

600

400

PW and PWP

200

– Maximum Continuous Dissipation – mW

D

P

0

25 50 75 100

Package
R

= 178°C/W

θJA

TA – Free-Air Temperature – °C

= 106°C/W

θJA

D Package
R

= 172°C/W

θJA

Figure 3

†

Dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute maximum temperature of 150°C.
For guidelines on maintaining junction temperature within recommended operating range, see the Thermal Information section.

†

125 150

DISSIPATION DERATING CURVE

vs

CASE TEMPERATURE

4800
4400

4000
3600
3200
2800
2400
2000
1600
1200

800

– Maximum Continuous Dissipation – mW

D

400

P

0

25 50 75 100

PW Package
R

= 31°C/W

θJC

P Package
R

θJC

D Package

R

= 57°C/W

θJC

TC – Case Temperature – °C

= 46°C/W

Figure 4

†

125 150

recommended operating conditions

MIN MAX UNIT

TPS7101Q 2.5 10

p

High-level input voltage at EN, V
Low-level input voltage at EN, V
Output current range, I
Operating virtual junction temperature range, T

‡

Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage at the
maximum specified load range. Since dropout voltage is a function of output current, the usable range can be extended for lighter loads. To
calculate the minimum input voltage for your maximum output current, use the following equation: V
Because the TPS7101 is programmable, r
VDO from r
recommended input voltage range for the TPS7101.

I

IH

IL

O

is given in Note 2 in the electrical characteristics table. The minimum value of 2.5 V is the absolute lower limit for the

DS(on)

DS(on)

TPS7133Q 3.77 10
TPS7148Q 5.2 10
TPS7150Q 5.33 10

2 V

0.5 V

0 500 mA

J

= V

should be used to calculate VDO before applying the above equation. The equation for calculating

I(min)

–40 125 °C

+ V

O(max)

DO(max load)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

‡

J

,

,

Ground current (active mode)

EN ≤ 0.5 V,

V

I

V

O

V,

A

Input current (standby mode)

EN

V

2.7 V ≤ V

V

A

Output current limit

V

V

V

A

gy

EN

V

2.7 V ≤ V

≤ 10 V

A

PG leak

t

Normal operation

V

V

A

EN logic high (standb

)

40°C to 125°C

V

EN logic l

)

2.7 V ≤ V

V

V

EN i

t

0 V ≤ V

≤ 10 V

0 V ≤ V

≤ 10 V

A

Minimum V

for active pass element

V

Minimum V

for valid PG

I

300 µA

I

300 µA

V

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

electrical characteristics at IO = 10 mA, EN = 0 V , CO = 4.7 µF/CSR† = 1 Ω, SENSE/FB shorted to OUT
(unless otherwise noted)

TPS7101Q, TPS7133Q

PARAMETER

EN ≤ 0.5 V
0 mA ≤ IO ≤ 500 mA

p

p

Pass-element leakage current in standby
mode

age curren

Output voltage temperature coefficient –40°C to 125°C 61 75 ppm/°C
Thermal shutdown junction temperature 165 °C

y mode

ow (active mode

EN hysteresis voltage 25°C 50 mV

nput curren

I

I

†

CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any
series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

p

2.5 V ≤ VI ≤ 6 V
6 V ≤ VI ≤ 10 V

TEST CONDITIONS

=

,

I

= 0,

O

=

,

I

p

≤ 10

I

I

=

PG

V

= V

+ 1 V

+ 1

≤ 10

I

= 10

I

I

,

PG

PG

= 10

=

I

T

25°C 285 350

–40°C to 125°C 460

25°C 0.5

–40°C to 125°C 2

25°C 1.2 2

–40°C to 125°C 2

25°C 0.5

–40°C to 125°C 1

25°C 0.02 0.5

–40°C to 125°C 0.5

°

–

25°C 0.5

–40°C to 125°C 0.5

25°C –0.5 0.5

–40°C to 125°C –0.5 0.5

25°C 2.05 2.5

–40°C to 125°C 2.5

25°C 1.06 1.5

–40°C to 125°C 1.9

TPS7148Q, TPS7150Q

MIN TYP MAX

°

2

2.7

UNIT

µ

µ

µ

µ

µ

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

‡

T

UNIT

Reference voltage (measured at FB
V

2.4 V

50 µA ≤ I

≤ 150 mA

V

O

Ω

V

50 µA ≤ I

500 mA

Input regulation

I

,

µ

O

,

mV

O

,

I

,

mV

Output regulation

O

µ ,

I

,

mV

I

A

Ripple rejection

f

120 H

dB

O

,

†

CSR

†

Ω

PG

§

I

400 µA

V

V

V

FB input current

nA

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y

LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

TPS7101 electrical characteristics at IO = 10 mA, V

= 3.5 V, EN = 0 V, CO = 4.7 µF/CSR† = 1 Ω, FB

I

shorted to OUT at device leads (unless otherwise noted)

J

VI = 3.5 V, IO = 10 mA 25°C 1.178 V

with OUT connected to FB)

Reference voltage temperature
coefficient

Pass-element series resistance
(see Note 2)

p

p

pp

Output noise-spectral density f = 120 Hz 25°C 2

Output noise voltage

PG trip-threshold voltage
PG hysteresis voltage

p

output low voltage

p

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

§

Output voltage programmed to 2.5 V with closed-loop configuration (see application information).

NOTES: 1. When VI < 2.9 V and IO > 150 mA simultaneously, pass element r

dropout voltage prevents the regulator from maintaining the specified tolerance range.

2. To calculate dropout voltage, use equation:

r

DS(on)

5.9 V , which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V , 4 V, and 6 V, respectively. For other
programmed values, refer to Figure 26.

§

§

VDO = IO

⋅ r

is a function of both output current and input voltage. The parametric table lists r

2.5 V ≤ VI ≤ 10 V,
See Note 1

,

=

I

= 2.4 V,

I

= 2.9 V,

I

VI = 3.9 V, 50 µA ≤ IO ≤ 500 mA 25°C 0.32
VI = 5.9 V, 50 µA ≤ IO ≤ 500 mA 25°C 0.23

V

= 2.5 V to 10 V, 50 µA ≤ I

See Note 1
I

= 5 mA to 500 mA, 2.5 V ≤ V

See Note 1
I

= 50 µA to 500 mA, 2.5 V ≤ V

See Note 1

=

z

10 Hz ≤ f ≤ 100 kHz,

= 1

VFB voltage decreasing from above V

DS(on)

Measured at V

=

PG

FB

,

5 mA ≤ IO ≤ 500 mA,

O

150 mA ≤ I
mA

= 50 µ

O

I

= 500 mA,

See Note 1

CO = 4.7 µF 25°C 95
CO = 10 µF 25°C 89
CO = 100 µF 25°C 74

= 2.13

I

≤ 500

≤

O

≤ 500 mA,

≤ 10 V,

≤ 10 V,

PG

DS(on)

–40°C to 125°C 1.143 1.213 V

–40°C to 125°C 61 75 ppm/°C

25°C 0.7 1

–40°C to 125°C 1

25°C 0.83 1.3

–40°C to 125°C

25°C 0.52 0.85

–40°C to 125°C 0.85

25°C 18

–40°C to 125°C 25

25°C 14

–40°C to 125°C 25

25°C 22

–40°C to 125°C 54

25°C 48 59

–40°C to 125°C 44

25°C 45 54

–40°C to 125°C 44

–40°C to 125°C 1.101 1.145 V

25°C 12 mV
25°C 0.1 0.4

–40°C to 125°C 0.4

25°C –10 0.1 10

–40°C to 125°C –20 20

increases (see Figure 27) to a point such that the resulting

DS(on)

TPS7101Q

MIN TYP MAX

1.3

µV/√Hz

µVrms

for VI = 2.4 V, 2.9 V, 3.9 V, and

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

7

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

PARAMETER

TEST CONDITIONS

‡

T

UNIT

Output voltage

V

I

10 mA

V

3.23 V

D

I

100 mA

V

3.23 V

mV

I

500 mA

V

V

Pass-element series resistance

(

O)O

,

I

,

Ω

Input regulation

V

4.3 V to 10 V

50 µA ≤ I

≤ 500 mA

mV

I

500 mA

V

V

mV

Output regulation

I

500 mA

V

V

mV

I

A

Ripple rejection

f

120 H

dB

I

500 mA

CSR

†

Ω

PG output low voltage

I

1 mA

V

2.8 V

V

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

TPS7133 electrical characteristics at IO = 10 mA, V

= 4.3 V , EN = 0 V , CO = 4.7 µF/CSR† = 1 Ω, SENSE

I

shorted to OUT (unless otherwise noted)

J

p

ropout voltage

p

p

pp

Output noise-spectral density f = 120 Hz 25°C 2

Output noise voltage

PG trip-threshold voltage
PG hysteresis voltage

p

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

VI = 4.3 V, IO = 10 mA 25°C 3.3

4.3 V ≤ VI ≤ 10 V, 5 mA ≤ IO ≤ 500 mA –40°C to 125°C 3.23 3.37
25°C 4.5 7

–40°C to 125°C 8

25°C 47 60

–40°C to 125°C 80

25°C 235 300

–40°C to 125°C 400

25°C 0.47 0.6

–40°C to 125°C 0.8

25°C 20

–40°C to 125°C 27

25°C 21 38

–40°C to 125°C 75

25°C 30 60

–40°C to 125°C 120

25°C 43 54

–40°C to 125°C 40

25°C 39 49

–40°C to 125°C 36

25°C 274
25°C 228
25°C 159

–40°C to 125°C 2.868 3 V

25°C 35 mV
25°C 0.22 0.4

–40°C to 125°C 0.4

=

†

= 1

=

,

,

,

)/I

, V

,

z

,

=

I

=

I

= 3.23

I

= 3.23 V,

,4.3 V ≤

,4.3 V ≤

= 50 µ

O

=

O

CO = 4.7 µF
CO = 10 µF
CO = 100 µF

=

I

O

I

I

=

O

=

O

=

O

(3.23 V – V
IO = 500 mA

=

I

= 5 mA to

O

= 50 µA to

O

=

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

PG

≤ 10

≤ 10

PG

TPS7133Q

MIN TYP MAX

µV/√Hz

µVrms

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

‡

T

UNIT

Output voltage

V

I

10 mA

V

4.75 V

D

I

100 mA

V

4.75 V

mV

I

500 mA

V

V

Pass-element series resistance

(

O)O

,

I

,

Ω

Input regulation

V

5.85 V to 10 V

50 µA ≤ I

≤ 500 mA

mV

I

500 mA

V

V

mV

Output regulation

I

500 mA

V

V

mV

I

A

Ripple rejection

f

120 H

dB

I

500 mA

CSR

†

Ω

PG

I

V

V

V

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y

LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

TPS7148 electrical characteristics at IO = 10 mA, V

= 5.85 V , EN = 0 V , CO = 4.7 µF/CSR† = 1 Ω, SENSE

I

shorted to OUT (unless otherwise noted)

J

p

ropout voltage

p

p

pp

Output noise-spectral density f = 120 Hz 25°C 2 µV/√Hz

Output noise voltage

PG trip-threshold voltage
PG hysteresis voltage

output low voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

VI = 5.85 V, IO = 10 mA 25°C 4.85

5.85 V ≤ VI ≤ 10 V, 5 mA ≤ IO ≤ 500 mA –40°C to 125°C 4.75 4.95

=

O

=

O

=

O

(4.75 V – V
IO = 500 mA

=

I

= 5 mA to

O

= 50 µA to

O

=

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

PG

,

z

†

= 1

=

= 1.2 mA,

,

,

)/I

, V

,

,5.85 V ≤

,5.85 V ≤

=

I

=

I

= 4.75

I

= 4.75 V,

O

= 50 µ

O

=

O

CO = 4.7 µF
CO = 10 µF
CO = 100 µF

= 4.12

I

≤ 10

I

≤ 10

I

PG

25°C 2.9 6

–40°C to 125°C 8

25°C 30 37

–40°C to 125°C 54

25°C 150 180

–40°C to 125°C 250

25°C 0.32 0.35

–40°C to 125°C 0.52

25°C 27

–40°C to 125°C 37

25°C 12 42

–40°C to 125°C 80

25°C 42 60

–40°C to 125°C 130

25°C 42 53

–40°C to 125°C 39

25°C 39 50

–40°C to 125°C 35

25°C 410
25°C 328
25°C 212

–40°C to 125°C 4.5 4.7 V

25°C 50 mV
25°C 0.2 0.4

–40°C to 125°C 0.4

TPS7148Q

MIN TYP MAX

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

9

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q

PARAMETER

TEST CONDITIONS

‡

T

UNIT

Output voltage

V

I

10 mA

V

4.88 V

D

I

100 mA

V

4.88 V

mV

I

500 mA

V

V

Pass-element series resistance

(

O)O

,

I

,

Ω

Input regulation

V

6 V to 10 V

50 µA ≤ I

≤ 500 mA

mV

I

500 mA

V

V

mV

Output regulation

I

500 mA

V

V

mV

I

A

Ripple rejection

f

120 H

dB

I

500 mA

CSR

†

Ω

PG output low voltage

I

1.2 mA

V

4.25 V

V

TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS

SLVS092F – NOVEMBER 1994 – REVISED JANUAR Y 1997

TPS7150 electrical characteristics at IO = 10 mA, V

= 6 V , EN = 0 V, CO = 4.7 µF/CSR† = 1 Ω, SENSE

I

shorted to OUT (unless otherwise noted)

J

p

ropout voltage

p

p

pp

Output noise-spectral density f = 120 Hz 25°C 2

Output noise voltage

PG trip-threshold voltage
PG hysteresis voltage

p

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.

VI = 6 V, IO = 10 mA 25°C 5
6 V ≤ VI ≤ 10 V, 5 mA ≤ IO ≤ 500 mA –40°C to 125°C 4.9 5.1

25°C 2.9 6

–40°C to 125°C 8

25°C 27 32

–40°C to 125°C 47

25°C 146 170

–40°C to 125°C 230

25°C 0.29 0.32

–40°C to 125°C 0.47

25°C 25

–40°C to 125°C 32

25°C 30 45

–40°C to 125°C 86

25°C 45 65

–40°C to 125°C 140

25°C 45 55

–40°C to 125°C 40

25°C 42 52

–40°C to 125°C 36

25°C 430
25°C 345
25°C 220

–40°C to 125°C 4.55 4.75 V

25°C 53 mV
25°C 0.2 0.4

–40°C to 125°C 0.4

=

†

= 1

=

,

,

,

)/I

, V

,

z

,

=

I

=

I

= 4.88

I

= 4.88 V,

,6 V ≤

,6 V ≤

= 50 µ

O

=

O

CO = 4.7 µF
CO = 10 µF
CO = 100 µF

=

I

O

≤ 10

I

≤ 10

I

=

O

=

O

=

O

(4.88 V – V
IO = 500 mA

=

I

= 5 mA to

O

= 50 µA to

O

=

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

PG

PG

TPS7150Q

MIN TYP MAX

µV/√Hz

µVrms

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265