Texas Instruments TPS65980EVM User Manual

TPS65980EVM
User's Guide
Literature Number: SLVUA50
April 2014
Contents
1 Introductions....................................................................................................................... 4
2 Setup.................................................................................................................................. 4
2.1 Power Supply Inputs..................................................................................................... 4
2.2 Jumper Settings .......................................................................................................... 5
2.4 Test Points ................................................................................................................ 8
3 Board Assembly and Layout ................................................................................................. 9
4 Schematic ......................................................................................................................... 11
5 Bill of Materials .................................................................................................................. 12
2
Table of Contents SLVUA50–April 2014
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1 Connection Points ........................................................................................................... 4
2 Low Voltage Input............................................................................................................ 6
3 High Voltage Input During Sleep .......................................................................................... 6
4 High Voltage Input With Lower CBL_OUT Current Limit............................................................... 7
5 High Voltage Input With Higher CBL_OUT Current Limit .............................................................. 7
6 Top Layer Assembly......................................................................................................... 9
7 Bottom Layer Assembly..................................................................................................... 9
8 Top Layer Routing ......................................................................................................... 10
9 Bottom Layer Routing...................................................................................................... 10
10 Schematic ................................................................................................................... 11
List of Figures
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TBT
IN
+
-
J1
DEV_EN
J5
OFF|ON
CBL_ILIM
J6
HI|LOW
+
-
J2
+
-
J3
+
-
J4
DEV OUT
TBT
OUT
CBL
OUT
TPS65980EVM
1 Introductions
The Texas Instruments TPS65980EVM evaluation module (EVM) helps designers evaluate the operation and performance of the TPS65980: a DC/DC switching regulator that receives power from a Thunderbolt bus ranging from 2.5V to 15.75V on TBT_IN and generates three separate 3.3V supply outputs TBT_OUT, CBL_OUT, and DEV_OUT.
The TBT_OUT supply provides power to the local peripheral Thunderbolt™ controller and support circuitry. The CBL_OUT supply provides power back to the Thunderbolt™ cable and has adjustable current limit. The DEV_OUT supply provides power to all other circuitry in the device to perform its designed function.
The TPS65980 is available in a 24-pin 5mm x 4mm x 0.9mm QFN package.
User's Guide
SLVUA50–April 2014
Table 1. Device and Package Configurations
CONVERTER IC PACKAGE
U1 TPS65980RHF RHF
2 Setup
This section describes the jumpers and connectors on the EVM as well as how to properly connect, set up, and use the TPS65980EVM.
2.1 Power Supply Inputs
Figure 1 shows the connection points needed to fully and correctly interface with the TPS65980EVM.
Figure 1. Connection Points
4
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The TPS65980 has three operating modes dictated by the voltage applied on TBT_IN. The total power available at each of the outputs is determined by the operating mode. Table 2 summarizes the operating modes in terms of input voltage range and output current ranges.
Operating Mode TBT_IN Vrange TBT_OUT Irange
Low Voltage 2.5V – 3.4V 5mA – 50mA Output Disabled Output Disabled High Voltage 10V – 15.75V 235mA – 1A 0 – 1.44A High Voltage
(Sleep)
(1)
Note: the total combined output current from TBT_OUT, CBL_OUT, and DEV_OUT should never exceed 3.5A.
2.2 Jumper Settings
There are two digital input signals which can be set with jumpers as defined in Table 3. These signals can be set to a logical value of “0” or “1” by moving the jumper between the 2 available positions (left and right). See the TPS65980 data sheet for more information on the functionality of these signals.
Header Name Logic Jumper Position Effect
J5 DEV_EN 1 Left (TBT_OUT) DEV_OUT
J6 CBL_ILIM 1 Left (TBT_OUT) CBL_OUT using
Input/Output Supply Ranges
(1)
CBL_OUT DEV_OUT
(1)
Irange
(1)
5.2V – 15.75V 5mA – 31mA 0 – 235mA 0 – 700mA
Irange
0 – 2.5A
(1)
Digital Signal Jumpers
Disabled
DEV_EN 0 Right (GND) DEV_OUT Enabled
higher current limit
CBL_ILIM 0 Right (GND) CBL_OUT using
lower current limit
Setup
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TBT
IN
+
-
J1
DEV_EN
J5
OFF|ON
CBL_ILIM
J6
HI|LOW
+
-
J2
+
-
J3
+
-
J4
DEV OUT
TBT
OUT
CBL
OUT
3.0V – 3.319V 0mA – 700mA
3.221V – 3.319V 5mA – 31mA
3.171V – 3.319V 0mA – 235mA
5.2V – 15.75V
TBT
IN
+
-
J1
DEV_EN
J5
OFF|ON
CBL_ILIM
J6
HI|LOW
+
-
J2
+
-
J3
+
-
J4
DEV OUT
TBT
OUT
CBL
OUT
OUTPUT OFF
3.135V – 3.4V 5mA – 50mA
OUTPUT OFF
2.5V – 3.4V
Setup
2.3 Device Configurations
Figure 2, Figure 3, Figure 4, and Figure 5illustrate the three operating modes discussed in section 2.1 as
well as the two programmable CBL_OUT current limits.
This is the average output voltage range for normal loads. During light load, the peak output voltage from TBT_OUT may surpass 3.4V, but not exceeding 3.42V
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Figure 2. Low Voltage Input
This is the average output voltage range for normal loads. During light load, the average output voltage from CBL_OUT may reach 3.4 with peaks not exceeding 3.42V.
6
TPS65980EVM SLVUA50–April 2014
Figure 3. High Voltage Input During Sleep
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TBT
IN
+
-
J1
DEV_EN
J5
OFF|ON
CBL_ILIM
J6
HI|LOW
+
-
J2
+
-
J3
+
-
J4
DEV OUT
TBT
OUT
CBL
OUT
3.0V – 3.319V 0mA – 2500mA
3.221V – 3.319V 235mA – 1000mA
3.12V – 3.319V 0mA – 1440mA
TBT
IN
+
-
J1
DEV_EN
J5
OFF|ON
CBL_ILIM
J6
HI|LOW
+
-
J2
+
-
J3
+
-
J4
DEV
OUT
TBT
OUT
CBL
OUT
3.0V – 3.319V 0mA – 2500mA
3.221V – 3.319V 235mA – 1000mA
3.171V – 3.319V 0mA – 720mA
5.2V – 15.75V
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A This is the average output voltage range for normal loads. During light load, the average output voltage from
TBT_OUT and CBL_OUT may reach 3.4 with peaks not exceeding 3.42V
B The total combined output current from TBT_OUT, CBL_OUT, and DEV_OUT should never exceed 3.5A.
Figure 4. High Voltage Input With Lower CBL_OUT Current Limit
Setup
A This is the average output voltage range for normal loads. During light load, the average output voltage from
TBT_OUT and CBL_OUT may reach 3.4 with peaks not exceeding 3.42V
B The total combined output current from TBT_OUT, CBL_OUT, and DEV_OUT should never exceed 3.5A.
Figure 5. High Voltage Input With Higher CBL_OUT Current Limit
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7
Setup
2.4 Test Points
Several test points are provided solely for the purpose measuring certain signals. It is NOT recommended to use the test points to supply power to TBT_IN or load TBT_OUT, CBL_OUT, or DEV_OUT.
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Table 2. Test Point Descriptions
Test Point Signal Description
TP1 GND TP2 DEV_OUT TP3 Switching Node TP4 BOOT TP5 GND TP6 TBT_IN TP7 GND TP8 TBT_OUT
TP9 Compensation Pin TP10 GND TP11 GND TP12 Soft Start Pin TP13 RESET_N Signal TP14 HV_OK Signal TP15 GND TP16 CBL_OUT
8
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3 Board Assembly and Layout
Figure 6 and Figure 7 show the top and bottom assembly for the TPS65980EVM.
Board Assembly and Layout
Figure 6. Top Layer Assembly
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Figure 7. Bottom Layer Assembly
9
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Board Assembly and Layout
Figure 8 and Figure 9 show the top and bottom layout for the TPS65980EVM.
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Figure 8. Top Layer Routing
10
TPS65980EVM SLVUA50–April 2014
Figure 9. Bottom Layer Routing
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4 Schematic
The Schematic for the EVM is given in Figure 10.
Schematic
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Figure 10. Schematic
11
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Bill of Materials
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5 Bill of Materials
This section contains details on the bill of materials for the TPS65980EVM. Unpopulated items have a quantity of 0.
Bill of Materials
Designator Quantity Value Description Package Reference Part Number Manufacturer Alternate Part Alternate
Number Manufacturer
!PCB 1 Printed Circuit Board HVL071 Any
C1, C2, C8, C9 4 10µF CAP, CERM, 10µF, 25V, ±20%, X7R, 1210 1210 C3225X7R1E106M250AC TDK
C5, C15, C16 3 1µF CAP, CERM, 1µF, 10V, ±10%, X5R, 0603 0603 GRM188R61A105KA61D MuRata C6, C12, C13 3 0.01µF CAP, CERM, 0.01µF, 25V, ±10%, X7R, 0402 0402 GRM155R71E103KA01D MuRata
C10 1 0.1µF CAP,CERM, 0.1µF, 25V, ±10%, X5R, 0402 0402 GRM155R61E104KA87D MuRata
D1, D2 2 Blue LED, Blue, SMD BLUE 0603 LED LB Q39G-L2N2-35-1 OSRAM
H9, H10, H11, 4 Bumpon, Hemisphere, 0.44 X 0.20, Clear Transparent Bumpon SJ-5303 (CLEAR) 3M
H12
J1, J2, J3, J4 4 C-282834-2 Header, Shrouded 2-pin, 100 mil space, 6.5x5.54 mm C-282834-2 Tyco
J5, J6 2 Header, TH, 100mil, 3x1, Gold plated, 230 mil above 3x1 Header TSW-103-07-G-S Samtec
insulator
L1 1 10µH Inductor, Shielded, Powdered Iron, 10µH, 6.8A, IHLP-4040DZ IHLP4040DZER100M01 Vishay-Dale
36.5Ω, SMD
Q1 1 25V MOSFET, N-CH, 25V, 4.5A, 2.28x.62x1.7mm 2.28x.62x1.7mm CSD86311W1723 Texas None
Instruments
R1, R2 2 249 RES, 249Ω, 1%, 0.063W, 0402 0402 CRCW0402249RFKED Vishay-Dale
R3 1 10.0kΩ RES, 10.0kΩ, 1%, 0.063W, 0402 0402 CRCW040210K0FKED Vishay-Dale
SH-J5, SH-J6 2 1x2 Shunt, 100mil, Gold plated, Black Shunt 969102-0000-DA 3M SNT-100-BK-G Samtec
TP1, TP5, TP7, 6 Black Test Point, Miniature, Black, TH Black Miniature Testpoint 5001 Keystone
TP10, TP11,
TP15
TP2, TP3, TP4, 10 Red Test Point, Compact, Red, TH RedCompact Testpoint 5005 Keystone TP6, TP8, TP9,
TP12, TP13,
TP14, TP16
U1 1 Thunderbolt™ Bus Power Buck/Boost, RHF0024A RHF0024A TPS65980RHF Texas None
Instruments
C3, C7 0 10µF CAP, CERM, 10µF, 25V, ±20%, X7R, 1210 1210 C3225X7R1E106M250AC TDK
C4, C14 0 1µF CAP, CERM, 1µF, 10V, ±10%, X5R, 0805 0805 GRM219R61A105KC01D MuRata
C11 0 0.01µF CAP, CERM, 0.01µF, 25V, ±10%, X7R, 0402 0402 GRM155R71E103KA01D MuRata
FID1, FID2, 0 Fiducial mark. There is nothing to buy or mount. Fiducial N/A N/A
FID3
12
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