TEXAS INSTRUMENTS TPS659122 Technical data
PRODUCTPREVIEW
TPS659122
www.ti.com
SWCS079 –JUNE 2012
PMU FOR PROCESSOR POWER
Check for Samples: TPS659122
1 INTRODUCTION
1.1 Features
1
• 4 Step-Down Converters:
– VINRange From 2.7V to 5.5V
– Power Save Mode at Light Load Current
– Output Voltage Accuracy in PWM Mode ±2%
– Typical 26 μA Quiescent Current per
Converter • Bypass Switch
– Dynamic Voltage Scaling – Used with DCDC4 in Applications Powering
– 100% Duty Cycle for Lowest Dropout
• 10 LDOs:
– 8 General Purpose LDOs
– Output Voltage Range 0.8V to 3.3V
– 2 Low Noise RF-LDOs
– Output Voltage Range 1.6V to 3.3V
– 32 μA Quiescent Current
– Pre-Regulation Support by Separate Power
Inputs
– ECO mode
– VINRange of LDOs:
• 1.8V to 3.6V or
• 3.0V to 5.5V, respectively
• 3 LED Outputs:
– Internal Dimming Using I2C
– Multiplexed with GPIOs
– Up to 20mA per Current Sink
• Thermal Monitoring
– High Temperature Warning
– Thermal Shutdown
an RF-PA
– As Supply Switch for e.g. SD cards
• Interface
– I2C Interface
– Power I2C Interface for Dynamic Voltage
Scaling
– SPI
• 32kHz RC Oscillator
• Undervoltage Lockout and Battery Fault
Comparator
• Long Button-Press Detection
• Flexible Power-Up and Power-Down
Sequencing
• 3.6mm x 3.6mm WCSP Package with 0.4mm
pitch
1.2 Applications
• Data cards
• Smartphones
1.3 Description
1
PRODUCT PREVIEW information concerns products in the formative or design phase of
development. Characteristic data and other specifications are design goals. Texas
Instruments reserves the right to change or discontinue these products without notice.
The TPS659122 device provides four configurable step-down converters with up to 2.5A output current for
memory, processor core, I/O, or pre-regulation of LDOs. It also contains 10 LDO regulators for external
usage which can be supplied from either a battery or a pre-regulated supply. Power-up/power-down
controller is configurable and can support any power-up/power-down sequences (OTP based).
TPS659122 integrate a 32 kHz RC Oscillator to sequence all resources during Power up / down. All LDOs
and DCDC converters can be controlled by I2C/SPI interface or Basic ENABLE Balls. In addition, an
Independent automatic Voltage Scaling interface allows transitioning DCDC to different voltage by I2C or
basic Roof/Floor Control. 3 RGB LED with advanced dimming feature are integrated inside the device.
GPIO functionality is multiplexed with LED/ENBLE/SPI when not used. Each GPIO can be configured as
part of the Power up sequence to control external resources. One Sleep pin enables power mode control
between ACTIVE and pre-programmed SLEEP mode for power optimization. For system control the
TPS659122 has 1 comparator for system state management. The TPS659122 comes in a 9 ball x 9 ball
WCSP package (3.6mm x 3.6mm) with a 0.4mm pitch. To request a full data sheet, please send an email
to: pmu_contact@list.ti.com.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2012, Texas Instruments Incorporated
PRODUCTPREVIEW
VBat
VBat
Vbat
SDA_MOSI
SCL_CLK
VINLDO3
LDO3
VDDIO
SW4
DCDC4
2.5A
VDCDC4
1uH
VINDCDC4
10uF
AGND
VREF1V25
100nF
PGND4
SW3
DCDC3
1.6A
VDCDC3
1uH
10uF
PGND3
SW2
DCDC2
0.75A
1uH
VINDCDC2
10uF
PGND2
GPIO2_CE
GPIO1_MISO
I2C/SPI
nPWRON (nRESIN)
nRESPWRON
INT1
SLEEP (PWR_REQ)
PWRHOLD
DGND
VINLDO1210
LDO1
LDO1
(0.8-3.3V, 50mV step
@100mA)
LDO2
LDO2
(0.8-3.3V, 50mV step
@100mA)
VINLDO4
LDO4
LDO4
(1.6-3.3V, 50mV step
@200mA)
Low noise
LDO5
LDO6
VINLDO5
LDO7
LDO7
(0.8-3.3V, 50mV step
@200mA)
LDO8
LDO9
LDO9
(0.8-3.3V, 50mV step
@300mA)
RGB
LED
BIAS
POWER
CONTROL
TPS65912x
32kHz
RC
OSC
ON/OFF
Vth
+
-
SDA_AVS (CLK_REQ2)
SCL_AVS (CLK_REQ1)
EN1 (DCDC1_SEL)
EN2 (DCDC2_SEL)
VINLDO67
LDO5
(1.6-3.3V, 50mV step
@250mA)
Low noise
LDO6
(0.8-3.3V, 50mV step
@100mA)
LDO3
(0.8-3.3V, 50mV step
@100mA)
LDO8
(0.8-3.3V, 50mV step
@100mA)
EN3 (DCDC3_SEL)
EN4 (DCDC4_SEL)
Thermal
warning &
shutdown
LDOAO
Internal
LDO
LEDA/GPIO3
LEDB/GPIO4
LEDC/GPIO5
LDO10
LDO10
(0.8-3.3V, 50mV step
@300mA)
VINLDO
1210
load switch
LSI
LSO
L4
L3
L2
CoutDCDC4
CoutDCDC3
CoutDCDC3
CIN4
CIN3
CIN2
VDCDC4_GND
Vbat
SW1
DCDC1
2.5A
VDCDC1
1uH
VINDCDC1
10uF
PGND1
L1
CoutDCDC1
CIN1
VDCDC1_GND
VINDCDC3
VDCDC2
CoutLDO3
CoutLDO2
CoutLDO1
CoutLDO4
CoutLDO5
CoutLDO6
CoutLDO7
CoutLDO8
CoutLDO9
CoutLDO10
CinLDO67
CinLDO5
CinLDO4
CinLDO1210
CinLDO3
VINLDO8
CinLDO8
VINLDO9
CinLDO9
VCON_PWM
VCON_CLK
OMAP_WDI (32k_OUT)
CONFIG1
CONFIG2
VIN_DCDC_ANA
DEF_SPI_I2C-GPIO
VCC
CPCAP_WDI
AGND
EN_LS0
EN_LS1
CVIN_DCDC_ANA
CVCC
VCCS_VIN_MON
tie to GND
or LDOAO
TPS659122
SWCS079 –JUNE 2012
1.4 Block Diagram & Pin Functions
1.4.1 Functional Block Diagram
2 INTRODUCTION Copyright © 2012, Texas Instruments Incorporated
Figure 1-1. TPS65912x Block Diagram
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Product Folder Link(s): TPS659122
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PRODUCTPREVIEW
VLDO7
A1
A2 A3 A4
TPS65912 (bottom view)
B1
C1
D1
VINLDO67 VLDO6 VDCDC4
VDCDC4_
GND
LEDC_
GPIO5
VINDCDC3 EN_LS1 EN_LS0 GPIO2_CE
SW3
CONFIG2 PWRON
GPIO1
_MISO
PGND4
A5
A6
A7
SW4
VINDCDC4 LSO
LSI
VINDCDC4
SW4PGND4
EN4/
DCDC4
_SEL
AGND
VINDCDC
_ANA
SCL_CLK
PWRHOLD
_ON
VDCDC2
EN2 /
DCDC2
_SEL
VINDCDC2
SW2
LSI
PGND3
E1 E2 E3 E4
F1
G1
H1
CONFIG1
DGND
SDA_MOSI
VCON
_PWM
AGNDVDCDC3VINLDO4
VLDO4
VCCS /
VIN_MON
LDOAO
SLEEP /
PWR_REQ
VLDO2 VCC VREF1V25
VDCDC1
_GND
SCL_AVS
CLKREQ1
E5
E7 E8
SDA_AVS
CLKREQ2
DEF_SPI
_I2C
EN1 /
DCDC1
_SEL
VINLDO3VDDIO
OMAP
_WDI
/32kCLK
VCON
_CLK
INT1
nRES
PWRON/
VSUPOUT
CPCAP
_WDI
VINLDO5
PGND1 SW1 VINDCDC1 VINLDO8
PGND2
VLDO5
VLDO8
VLDO3
J1
VLDO10
VINLDO
1210
VLDO1 VDCDC1
PGND1 SW1 VINDCDC1 VINLDO9 VLDO9
A8 A9
LSO
B2 B3
B4
B5
B6 B7 B8 B9
LEDB_
GPIO4
LEDA_
GPIO3
C2 C3
C4 C5 C6
EN3/
DCDC3
_SEL
C7
C8
C9
D2 D3
D4 D5
D6 D7
D8 D9
E6
E9
F2
F3
F4
F5 F6 F7
F8
F9
G2
G3
G4 G5
G6
G7
G8
G9
H2 H3 H4 H5 H6 H7 H8 H9
J9J8J7
J6J5
J4J3
J2
TPS659122
www.ti.com
1.4.2 Pinout
SWCS079 –JUNE 2012
YFF PACKAGE
(BOTTOM VIEW)
Copyright © 2012, Texas Instruments Incorporated INTRODUCTION 3
Product Folder Link(s): TPS659122
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