Texas Instruments TPS65680 User Manual

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User's Guide
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The TPS65680EVM is an evaluation tool for the TPS65680 18-Channel Pattern-Programmable Level Shifter with Overcurrent Protection for use in large format liquid-crystal display (LCD) display applications
such as TVs and monitors. The TPS65680 supports up to twelve high-voltage clock (GCK) outputs in charge-sharing or gate-voltage shaping configuration, six high-voltage control outputs for generating start, clear and reset, and low frequency signals and panel discharge. The evaluation module with its graphical user interface (GUI) enables the programming of the device from a Microsoft®Windows®7 or 10 PC and provides easy access to all 18 outputs, 3 supplies and logic inputs.
This user's guide describes the characteristics, operation and use of the TPS65680 evaluation module (EVM) and its drive software. This EVM contains TI's 18-channel pattern-programmable level shifter with overcurrent protection IC TPS65680. The user's guide includes EVM specifications, the recommended test setup (hardware and software), the schematic diagram, the bill of materials, and the board layouts.
All typical characteristics measurements in the TPS65680 data sheet were done with this evaluation module.
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Contents
1 Introduction ................................................................................................................... 3
1.1 Requirements ....................................................................................................... 3
1.2 Applications.......................................................................................................... 3
1.3 Features.............................................................................................................. 4
2 TPS65680 EVM Electrical and Performance Specifications ........................................................... 4
3 TPS65680 EVM Schematic ................................................................................................ 5
4 Connector and Test Point Descriptions................................................................................... 6
4.1 Supply Connectors ................................................................................................. 6
4.2 Input Connectors.................................................................................................... 7
4.3 Level-Shifter Output Connectors.................................................................................. 7
4.4 Additional Jumpers and Connectors ............................................................................. 8
5 Test Setup .................................................................................................................... 8
5.1 EVM Operation...................................................................................................... 8
5.2 Software Setup to Change the Output Voltages and Configuration.......................................... 9
5.3 Hardware Setup..................................................................................................... 9
5.4 Software Operation................................................................................................. 9
6 TPS65680 EVM Assembly Drawings and Layout...................................................................... 11
7 Bill of Materials ............................................................................................................. 14
1 TPS65680 EVM Schematic ................................................................................................ 5
2 Two- and Four-Terminal Connection...................................................................................... 6
3 TPS65680 Software Window............................................................................................. 10
4 TPS65680 EVM Top Composite ......................................................................................... 11
5 TPS65680 EVM Top Layer ............................................................................................... 12
6 TPS65680 EVM Bottom Layer (Bottom View).......................................................................... 13
1 TPS65680 EVM Electrical and Performance Specifications........................................................... 4
2 TPS65680 EVM Bill of Materials ......................................................................................... 14
Trademarks
Microsoft, Windows are registered trademarks of Microsoft Corporation. All other trademarks are the property of their respective owners.
List of Figures
List of Tables
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1 Introduction
The TPS65680 EVM uses the TPS65680 device to deliver 18 high-voltage level-shifter output channels to support the high-voltage gate signals of gate-in-array (GOA) or gate-in-panel (GIP) LCD displays. The EVM makes it easy to examine the programmability and performance of the TPS65680 device.
1.1 Requirements
The IC on the EVM is not programmed and the outputs will only toggle after a pattern is loaded. The EVM comes with the USB2ANY interface adapter and the connectors. For programming the device, you additionally must have a host computer, and a DC power supply. To operate the level shifters, 2 square wave outputs of a frequency generator or microcontroller are necessary.
1.1.1 Power Supplies
In order to operate this EVM, 3 DC power supplies, PS1, PS2, and PS3, with the following requirements are needed:
PS1 to supply VIN: 2.7 V to 5.5 V capable of 0.5 A
PS2 to supply VGL: –18 V to –4 V capable of 1 A
PS3 to supply VGH: 9 V to 40 V capable of 1 A
1.1.2 Digital Inputs
The output signals of a gate signal level shifter on an LCD TFT need to be synchronized to the timing controller that delivers the image content. To keep TPS65680 synchronised to the timing controller signals, just 2 digital input signals are necessary:
LN_CLK is the input signal for the TPS65680 internal PLL. This fixed frequency signal is often set to
the line frequency.
A rising edge on LS_START starts the programmed pattern from the programmed start address. This
fixed frequency signal is normally set to the frame frequency, for example; 60 Hz, 120 Hz, 240 Hz, and so forth.
Introduction
1.1.3 Host Computer
A computer with a USB port is required program the TPS65680 on the EVM. The TPS65680 software runs on a personal computer (PC) and communicates with the EVM through a USB port.
The minimum requirements for the PC are:
Microsoft Windows 7 or 10 operating system
1 USB port
A minimum of 280MB of free hard disk space (610MB recommended)
A minimum of 512MB of RAM
1.1.4 Software
Texas Instruments provides the software necessary to program the TPS65680 and evaluate the IC functionality. After you are approved, download the software and install it on your computer.
In addition to ease the first start with the device, TI provides some standard patterns and a How-To-Start Video. All of these are included in your 'mySecure Software' folder which included this user's guide.
1.2 Applications
LCD and OLED panels using GIP and GOA technology
TV, monitor, notebook, and tablet PC
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Introduction
1.3 Features
Eases design by providing a simple way to evaluate TPS65680
Includes pattern examples to ease first evaluation
How-to video available for the first programming steps
The added interface board (USB2ANY) connects the EVM to a Microsoft Windows 7 or 10 PC
This tool is tested and includes the graphical user interface (GUI) as well as the hardware and software
user's guide
Power and sense connections available on power supply inputs
GUI enables programmability
Double-sided, two-active-layer printed-circuit board (PCB) with all components on the top side
2 TPS65680 EVM Electrical and Performance Specifications
Table 1 lists the EVM electrical and performance specifications.
Table 1. TPS65680 EVM Electrical and Performance Specifications
Parameter Test Conditions MIN TYP MAX Unit
Supply
V
I
V
(VGL)
V
(VGH)
Logic Signal Requirements (LS_CNTRL, LS_START, LN_CLK, SCL, SDA)
V
IH
V
IL
Operating input voltage on VIN pin 2.7 5.5 V Operating input voltage on VGL1 and
VGL2 pins Operating input voltage on VGH pin 9 40 V
Undervoltage lockout threshold (VI)
Undervoltage lockout threshold (V
)
(VGL)
Undervoltage lockout threshold (V
)
(VGH)
VIrising 2.55 2.6 2.7 V VIfalling 2.45 2.5 2.55 V V
rising –3 –2.5 –2 V
(VGL)
V
falling –4 –3.5 –3 V
(VGL)
V
rising 6 7 8 V
(VGH)
V
falling 3.8 4 4.2 V
(VGH)
High-level input voltage 1.25 V Low-level input voltage 0.55 V
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–18 –4 V
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VIN
GND
S+
5
4
1 2 3
6
J1
VGH
GND
S+
5
4
1 2 3
6
J2
VGL
GND
S+
5
4
1 2 3
6
J3
S-
S-
S-
TP1
TP2
SCL
SDA
4
1 2 3
J9
OTP_LDO
GND
4
1 2 3
J6
LS_CNTRL
GND
4
1 2 3
J5
LS_START
GND
4
1 2 3
J4
LN_CLK
GND
GND
GND
GND
GND
GND
GND
GND
1
2
3
J49
10µF
C1
2.2µFC32.2µF
C2
2.2µFC52.2µF
C4
1
2
3
J48
CS1
CS2
CS
GVS
CS
GVS
1.00k
R2
1.00k
R1
1.00k
R3
GND
GND
GND
GNDGND
GND GND
2.2µF
C8
GND
GND
GND
1
2
3
J27
C
RC
1000pFC26
1000pFC25
GND
GND
6
4
5
S2
G12AP
1
2
3
J52
GND
VIN
LS_CNTRL_SW
LS_CNTRL_SW
1 2
J50
GCK9
GND
GND
GCK9
1
2
3
J25
C
RC
1000pFC24
1000pFC23
GND
GCK8
GND
GND
1
2
3
J23
C
RC
1000pFC22
1000pFC21
GND
GCK7
GND
GND
1
2
3
J29
C
RC
1000pFC28
1000pFC27
GND
GCK10
GND
GND
1
2
3
J31
C
RC
1000pFC30
1000pFC29
GND
GCK11
GND
GND
1
2
3
J33
C
RC
1000pFC32
1000pFC31
GND
GCK12
GND
GND
1
2
3
J35
C
RC
1000pFC34
1000pFC33
GND
GSP1
GND
GND
123
J11
C
RC
100
R6
1000pF
C10
1000pF
C9
GND
GCK 1
GND
GND
123
J13
C
RC
1000pF
C12
1000pF
C11
GND
GCK 2
GND
GND
123
J15
C
RC
1000pF
C14
1000pF
C13
GND
GCK 3
GND
GND
123
J17
C
RC
1000pF
C16
1000pF
C15
GND
GCK 4
GND
GND
123
J19
C
RC
1000pF
C18
1000pF
C17
GND
GCK 5
GND
GND
123
J21
C
RC
1000pF
C20
1000pF
C19
GND
GCK 6
GND
GND
GCK1
GCK2
GCK3
GCK4
GCK5
GCK6
GCK7
GCK8
GCK10
GCK11
GCK12
GSP1
123
J39
C
RC
1000pF
C38
1000pF
C37
GCP
GND
GND
GND
123
J41
C
RC
1000pF
C40
1000pF
C39
GPP 1
GND
GND
GND
123
J43
C
RC
1000pF
C42
1000pF
C41
GPP 2
GND
GND
GND
123
J45
C
RC
1000pF
C44
1000pF
C43
VSS
GND
GND
GND
1
2
3
J37
C
RC
1000pFC36
1000pFC35
GND
GSP2
GND
GND
GSP2
GCP
GGP1
GGP2
VSS
0.01µF
C45
412
3
J12
412
3
J14
412
3
J16
412
3
J18
412
3
J20
412
3
J22
4
1
2
3
J24
4
1
2
3
J26
4
1
2
3
J28
4
1
2
3
J30
4
1
2
3
J32
4
1
2
3
J34
4
1
2
3
J36
4
1
2
3
J38
412
3
J40
412
3
J42
412
3
J44
412
3
J46
220µF
C46
GND
220µF
C47
GND
220µF
C48
GND
VGL
VGH
VIN
10k
R24
10k
R25
VIN
12
J5412J5512J5612J5712J5812J5912J6012J6112J6212J6312J6412J65
0
R27
0
R26
GNDGND
GCK 1
GCK 2
GCK 3
GCK 4
GCK 5
GCK 6
GCK 7
GCK 8
GCK 9
GCK 10
GCK 11
GCK 12
100
R7
100
R8
100
R9
100
R10
100
R11
100
R12
100
R13
100
R14
100
R15
100
R16
100
R17
100
R18
100
R19
100
R20
100
R21
100
R22
100
R23
1000pF
C50
1000pF
C49
2.2µF
C7
2.2µF
C6
GND
GND
VGL
NC1NC
3
IN4OUT
5
2
GND
U2 TPS71533DCKRG4
0
R4
0.1µF
C51
0.47µF
C52
3V3
LDO
EXT_3V3
VIN
GND
EXT_3V3
3.3V
1 2 3
J7
EXT_3V3
1 2 3
J10
GND
3V3
I2C_SEL
GND
I2C_SEL
3.3V
SCL
1
SDA
2
LN_CLK
3
LS_CNTRL
4
LS_START
5
I2C_SEL
6
OTP_LDO
7
VIN
8
VGL1
9
GGP2
10
GGP1
11
VSS
12
GCP
13
GCK12
14
GCK11
15
GCK10
16
GCK9
17
GCK8
18
GCK7
19
CS2
20
CS1
21
GCK6
22
GCK5
23
GCK4
24
GCK3
25
GCK2
26
GCK1
27
GSP2
28
GSP1
29
VGH
30
GND
31
PLLC
32
PAD
33
TPS65680RSMR
U1
12 34 56 78 910
J53
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TPS65680 EVM Schematic
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3 TPS65680 EVM Schematic
Figure 1 is for reference only; see the bill of materials in Table 2 for specific values.
Figure 1. TPS65680 EVM Schematic
Power
Supply
EVM
+
SNS +
SNS -
-
S +
S -
VIN
GND
Power
Supply
EVM
+
SNS +
SNS -
-
S +
S -
VIN
GND
2-wire connection
4-wire connection
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Connector and Test Point Descriptions
4 Connector and Test Point Descriptions
4.1 Supply Connectors
4.1.1 J1 – VIN, Input Sense, and GND Connector
This header is the connection of the input power supply, VI, and its sense connections. The power supply must be connected between pins 1 and 2 (VIN) and pins 5 and 6 (GND). Twist the leads to the input supply and keep them as short as possible. The input voltage must be between 2.7 V and 5.5 V.
4.1.2 J2 – VGH, Input Sense, and GND Connector
This header is the connection of the power supply, V must be connected between pins 1 and 2 (VGH) and pins 5 and 6 (GND). Twist the leads to the input supply and keep them as short as possible. The input voltage must be between 9 V and 40 V.
4.1.3 J3 – VGL, Input Sense, and GND Connector
This header is the connection of the power supply, V must be connected between pins 1 and 2 (VGL) and pins 5 and 6 (GND). Twist the leads to the input supply and keep them as short as possible. The input voltage must be between –18 V and –4 V.
Use the middle two pins of the input connectors to sense the input voltage and make a four-terminal connection. Four-terminal connections are more accurate than two-terminal connections. Figure 2 shows the setup for two-terminal and four-terminal connections.
, and its sense connections. The power supply
(VGH)
and its sense connections. The power supply
(VGL)
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Figure 2. Two- and Four-Terminal Connection
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4.2 Input Connectors
4.2.1 J4 – LN_CLK - Input and GND Connector
This header is the connection for the LN_CLK input square wave signal. Connect a frequency generator or microcontroller output between pins 1 and 2 (LN_CLK) and pins 3 and 4 (GND) to supply the device with the input signal for the internal PLL. The square wave needs to have a frequency from 40 kHz to 500 kHz and a duty cycle of 40% to 60%.
4.2.2 J5 – LS_START - Input and GND Connector
This header is the connection for the LS_START input signal. Connect a frequency generator or microcontroller output between pins 1 and 2 (LS_START) and pins 3 and 4 (GND) to supply the device with the input signal starting the programmed output pattern from the programmed start address. The LS_START pulse needs to have a pulse width of 15 µs to 500 µs.
4.2.3 J6, J52, and S2 – LS_CNTRL - Input and GND Connectors
The header J6 is the connection for the LS_CNTRL input signal. For programming the TPS65680 this signal needs to be low, if this signal is set high, the IC is in active mode and the device can be controlled via the LN_CLK and LS_START signals.
This signal can be driven from an external source, via header J52 or from the GUI.
GUI: Set switch S2 to SW side
J52: Set switch S2 to J52 side and use the jumper on J52 to drive the signal high (connect middle pin
to pin 1 (VIN)) or low (connect middle pin to pin 3 (GND))
External source: Remove the jumper from header J52 and set switch S2 to J52.
Connector and Test Point Descriptions
4.3 Level-Shifter Output Connectors
4.3.1 J36, J38, J12, J14, J16, J18, J20, J22, J24, J6, J28, J30, J32, J34, J40, J46, J42, and J44 – GSP1, GSP2, GCK1 to GCK12, GCP, VSS, GGP1 and GGP2 - Output and GND Connectors
These headers are the connection of the 18 level-shifter outputs. Connect a scope probe between pins 1 and 2 (GND) and pins 3 and 4 (output) to measure this specific level shifter output.
4.3.2 J35, J37, J11, J13, J15, J17, J19, J21, J23, J25, J29, J31, J33, J39, J45, J41, and J43 – Connectors to add load to the level shifter outputs
These headers can be used to add capacitive or RC load to the respective one of the 18 level shifter outputs. Connect a jumper between pins 1 and 2 (C) to add a capacitive load to the respective level shifter output or connect a jumper between pins 2 and 3 (RC) to add an RC load to the respective level shifter output.
4.3.3 J54, J55, J56, J57, J59, J60, J61, J62, J63, J64, and J65 – Connectors to add identical loads to 2 level shifter outputs to measure charge sharing
These headers can be used to add identical RC loads to the respective 2 of the 12 level shifter clock outputs that are used during charge sharing. Connect a jumper on one of the headers J54 to J59 to add a load to one of the channels GCK1 to GCK6 and another jumper on one of the headers J60 to J65 to add an RC load to one of the channels GCK7 to GCK12. If the 2 resistors R26 and R27 and the 2 capacitors C49 and C50 have the identical values, the output voltages of the channels that are sharing their charge should meet at the voltage V
NOTE: Be aware that capacitors with the identical theoretical value do not match in reality. For
identical capacitance values you need to measure the capacitors and select two that have identical values before applying them to the EVM.
(VGL)
+ ((V
(VGH)
- V
(VGL)
)/2)
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Connector and Test Point Descriptions
4.4 Additional Jumpers and Connectors
4.4.1 J49 and J43 – CS1 and CS2 - Enable Gate Voltage Shaping (GVS) or Charge Sharing (CS)
These headers are used to decide if CS or GVS is used when a channel is connected to the CSx pins. CS1 and CS2 need to be connected to the same value, either both to GVS (CS1 and CS2 pins are then connected through the resistors R1 and R3 to GND) or both to CS (CS1 and CS2 pins are connected together through the resistor R2).
If GVS is selected, a clock output can be discharged to GND through resistor R1 or R3 before it changes its state from high to low or vice versa.
If CS is selected, 2 clock outputs can share their charge before changing their opposite states (one needs to be high, the other one needs to be low at the beginning of the CS phase).
4.4.2 J10 – I2C_SEL- Select Between I2C Address 0x42 or 0x43
The I2C_SEL input defines the last bit of the I2C address of TPS65680. This makes it possible to easily use 2 TPS65680 on one I2C bus in high-resolution panels. Connect this pin to GND by shorting pins 2 and 3 to set the I2C address to 0x42. Connect this pin to 3V3 by connecting pins 1 and 2 to set the I2C address to 0x43.
4.4.3 J53 – USB2ANY
With the 10-pin header J53 the EVM connects through the USB2ANY interface box to a PC. The installed GUI communicates through the I2C pins 9 and 10 of J53 with the TPS65680 on the EVM. Pin 1 of J53 can drive LS_CNTRL via S2, pin 2 of J53 connects I2C_SEL to the GUI. The GUI reads this voltage before any communication with the IC.
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4.4.4 J7 – 3.3V - Voltage Limitation for USB2ANY
The GUI is able to read the voltage on the I2C_SEL pin through pin 2 of J53. As USB2ANY allows a maximum voltage of 3.6 V on the pins of J53, it is necessary to limit the voltage on I2C_SEL. The 3.3-V LDO U2 creates a logic voltage out of VIN that does not exceed 3.3 V.
4.4.5 J50 – Connect C8 to the OTP_LDO pin
This header connects a capacitor (C8) to the OTP_LDO pin. A jumper on this header is necessary if the content of the registers is stored in the OTP non-volatile memory. The voltage on this pin is observed on the header J9. While the OTP is written, the voltage on this pin is created via an internal LDO from VGH. To keep the voltage during the write process stable, the capacitor needs to be connected via a jumper on header J50.
5 Test Setup
5.1 EVM Operation
Three different voltage supplies are necessary to operate the EVM. These can be delivered by three power supplies or by an LCD bias device, like TPS65175, TPS65640, or alike. The digital input signals LN_CLK and LS_START are delivered by the timing controller in the final application, but for evaluation purposes, frequency generator or microcontroller outputs can be used as well.
The TPS65680 on the EVM is not pre-programmed, so it needs to be programmed before the outputs can deliver a pattern. TI delivers some pre-defined patterns for the first tests. Download these patterns from your 'mySecure Software' page in your myTI account on the web.
To ease the first setup of the EVM, review the video in your 'mySecure Software' page in your myTI account on the web.
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5.2 Software Setup to Change the Output Voltages and Configuration
Download the software (see Section 1.1.4) and the installation instructions (zipped file), unpack it, and execute the setup.exe file. This installs the up-to-date software version. TI recommends removing older versions before installing the updated one.
5.3 Hardware Setup
Connect the three power supplies to the following headers:
J1: Connect the power supply for VIN (2.7 V to 5.5 V) to this header. The absolute maximum voltage for VIN is 6 V.
J2: Connect the power supply for VGH (9 V to 40 V) to this header. The absolute maximum voltage for VGH is 42 V.
J3: Connect the power supply for VGL (–18 V to –4 V) to this header. The absolute maximum voltage for VGL is –20 V.
CAUTION
Make sure that the voltage delta from VGH to VGL never exceeds 55 V!
Connect the outputs of the frequency generator or microcontroller to J4 (LN_CLLK) and J5 (LS_START). Connect the 10-pin ribbon cable out of the HPA-665 bag to J53, the other end to the USB2ANY box and
with the USB-cable the other side of the USB2ANY box to the PC. For the first startup, set the switch S2 to SW (for software), and the two jumpers on J43 and J49 to GVS.
Test Setup
5.4 Software Operation
After the installation of the software, an icon with the name TPS65680 appears on the desktop (if checked within the installation) of the host computer. If it does not, browse the program files in the Start menu for the software. The default location is All Programs Texas Instruments TPS65680 EVM.
After connecting the USB interface adapter to the host computer, the software can be started. At the first start-up, the system asks to update the firmware of the adapter (follow the firmware update instructions given). After confirmation of this update, the software window shown in Figure 3 appears.
Please go to Help User Manual for a detailed description of all GUI functions.
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Test Setup
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Figure 3. TPS65680 Software Window
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6 TPS65680 EVM Assembly Drawings and Layout
Figure 4 through Figure 6 show the design of the TPS65680 EVM printed-circuit board (PCB). The EVM
has been designed using a two-layer, 35-μm (1 oz), copper-clad circuit board. All components are on the top side, and all active traces on the top and bottom layers allow you to easily view, probe, and evaluate the TPS65680 IC. Moving components to both sides of the PCB can offer additional size reduction for space-constrained systems.
TPS65680 EVM Assembly Drawings and Layout
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Figure 4. TPS65680 EVM Top Composite
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TPS65680 EVM Assembly Drawings and Layout
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Figure 5. TPS65680 EVM Top Layer
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TPS65680 EVM Assembly Drawings and Layout
Figure 6. TPS65680 EVM Bottom Layer (Bottom View)
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How to Use the TPS65680 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
13
Bill of Materials
www.ti.com
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SLVUBB1–November 2017
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Copyright © 2017, Texas Instruments Incorporated
How to Use the TPS65680 Evaluation Module
ADVANCE INFORMATION
7 Bill of Materials
Table 2 lists the EVM components of the schematic shown in Figure 1.
(1)
Unless otherwise noted in the Alternate Part Number or Alternate Manufacturer columns, all parts may be substituted with equivalents.
Table 2. TPS65680 EVM Bill of Materials
(1)
Designator QTY Value Description Package Reference Part Number Manufacturer Alternate Part
Number
Alternate
Manufacturer
C1 1 10uF CAP, CERM, 10 µF, 10 V, ±20%, X5R, 0402 0402 GRM155R61A106ME21D Murata C2, C3, C4, C5, C6, C7,C87 2.2uF CAP, CERM, 2.2 µF, 35 V, ±20%, X5R, 0402 0402 GRM155R6YA225ME11D Murata
C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37, C38, C39, C40, C41, C42, C43, C44, C49, C50
38 1000pF CAP, CERM, 1000 pF, 16 V, ±10%, X7R, 0603 0603 GRM188R71C102KA01D Murata
C45 1 0.01uF CAP, CERM, 0.01 µF, 25 V, ±10%, X7R, 0402 0402 GCM155R71E103KA37D Murata C46, C47, C48 3 220uF CAP, CERM, 220 µF, 6.3 V, ±20%, X5R, 1206_190 1206_190 GRM31CR60J227ME11L Murata C51 1 0.1uF CAP, CERM, 0.1 µF, 10 V, ±10%, X5R, 0201 0201 CL03A104KP3NNNC Samsung C52 1 0.47uF CAP, CERM, 0.47 µF, 10 V, ±10%, X5R, 0402 0402 GRM155R61A474KE15D Murata R1, R2, R3 3 1.00k RES, 1.00 k, 1%, 0.1 W, 0603 0603 CRCW06031K00FKEA Vishay-Dale R4, R26, R27 3 0 RES, 0, 5%, 0.1 W, 0603 0603 CRCW06030000Z0EA Vishay-Dale R6, R7, R8, R9, R10,
R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23
18 100 RES, 100, 1%, 0.1 W, 0603 0603 CRCW0603100RFKEA Vishay-Dale
R24, R25 2 10k RES, 10 k, 5%, 0.1 W, 0603 0603 CRCW060310K0JNEA Vishay-Dale S2 1 Switch, Toggle, SPDT 1Pos, TH 7 X 11 X4.5 mm G12AP NKK Switches U1 1 18-Channel Pattern Programmable Level Shifter with Over-
Current Protection, RSM0032B (VQFN-32)
RSM0032B TPS65680RSMR Texas Instruments Texas Instruments
U2 1 Single Output LDO, 50 mA, Fixed 3.3 V Output, 3 to 24 V Input,
5-pin SC70 (DCK), -40 to 85°C, Green (RoHS & no Sb/Br)
DCK0005A TPS71533DCKRG4 Texas Instruments Equivalent None
STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system.
2 Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM. User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10) business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period.
3 Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs (which for the avoidance of doubt are stated strictly for convenience and should be verified by User):
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18328日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
3.4 European Union
3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a
low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures.
4 EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free.
6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8. Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS OR THE USE OF THE EVMS , REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE (12) MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY USE OF AN EVM PROVIDED HEREUNDER, INCLUDING FROM ANY WARRANTY, INDEMITY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS, , EXCEED THE TOTAL AMOUNT PAID TO TI BY USER FOR THE PARTICULAR EVM(S) AT ISSUE DURING THE PRIOR TWELVE (12) MONTHS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated
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TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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Copyright © 2017, Texas Instruments Incorporated
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