Texas Instruments TPS65261EVM-650 User Manual
User's Guide
SLVUA85–June 2014
TPS65261EVM-650 PMIC 3-A, 2-A, 2-A Output Current
Evaluation Module
This document presents the information required to operate the TPS65261 PMIC as well as the support
documentation including schematic, layout, hardware setup, and bill of materials (BOM).
Contents
1 Background................................................................................................................... 2
2 TPS65261 Schematic ....................................................................................................... 3
3 Board Layout ................................................................................................................. 4
4 Bench Test Setup Conditions .............................................................................................. 6
5 Power-Up Procedure........................................................................................................ 7
6 Bill of Materials............................................................................................................... 8
List of Figures
1 TPS65261 Schematic ....................................................................................................... 3
2 Component Placement (Top Layer)....................................................................................... 4
3 Board Layout (Top Layer) .................................................................................................. 5
4 Board Layout (Second Layer).............................................................................................. 5
5 Board Layout (Third Layer)................................................................................................. 5
6 Board Layout (Bottom Layer) .............................................................................................. 5
7 Header Descriptions and Jumper Placement ............................................................................ 6
SLVUA85–June 2014 TPS65261EVM-650 PMIC 3-A, 2-A, 2-A Output Current Evaluation Module
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Copyright © 2014, Texas Instruments Incorporated
Background
1 Background
The TPS65261 PMIC is a triple 3-A, 2-A, 2-A output current, synchronous step-down (buck) converter with
an operational range of 4.5 V to 18 V. The TPS65261 features an automatic power sequence with
connecting MODE pin to V7V and configuring EN1/2/3 pins. The device also features an open drain
RESET signal to monitor power down. The TPS65261 operates in pulse skipping mode (PSM) light load.
As there are many possible options to set the converters, Table 1 presents the performance specification
summary for the EVM.
This evaluation module is designed to provide access to the features of the TPS65261. Some
modifications can be made to this module to test performance at different input and output voltages,
current and switching frequency. Contact the TI Field Applications group for advice on these matters.
www.ti.com
Table 1. Summary of Performance
Test Conditions Performance
VIN = 4.5 V to 18 V BUCK1, 1.2 V, up to 3 A
fSW= 600 kHz BUCK2, 3.3 V, up to 2 A
(25°C ambient) BUCK3, 1.8 V, up to 2 A
RESET, pull low when VDIV lower than 1.23 V
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TPS65261EVM-650 PMIC 3-A, 2-A, 2-A Output Current Evaluation Module SLVUA85–June 2014
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0.047µF
C11
10µF
C9
82pF
C5
0.01µF
C17
3300pF
C6
22pF
C4
0
R8
20.0k
R3
22pF
C15
1µF
C10
4.7µH
L2
1
2
3
J5
22µF
C12
GND
GND
GND
GND
GND
1
2
3
J8100k
R21
51k
R25
GND
10µFC710µF
C8
0
R10
DNI
TP11
0.047µF
C18
0
R15
4.7µH
L3
22µF
C21
GND
0
R16
DNI
TP14
22pF
C25
GND
4.7µH
L1
22µF
C3
22µF
C2
0
R2
GND
0.047µF
C1
0
R1
GND
1
2
J3
GND
TP12
TP13
EN1
EN2
EN3
MODE
1
2
J2
GND
TP6
TP15
1
2
J1
GND
TP1
TP3
DNI
TP4
EN1 MODE
GND GND
1
2
J4
GND
TP2
TP5
VIN
VIN
10.0k
R5
10.0k
R6
10.0k
R13
DNI
C26
VOUT1 1.2V 3A
VOUT2 3.3V 2A
VOUT3 1.8V 2A
VIN 12V
GND
VFB1
VFB1
22µF
C13
GND
VFB2
VFB2
VFB3
22pF
C14
GND
22µF
C22
GND
VFB3
22pF
C23
GND
GND
0.01µF
C19
0.01µF
C20
GND
73.2k
R17
20.0k
R7
GND
100k
R11
TP9
TP8
100k
R9
V7V
V7V
1
2
3
J6100k
R22
51k
R26
GND
EN2
GND
DNI
C27
1
2
3
J7100k
R23
51k
R27
GND
EN3
GND
DNI
C28
V7V
GND
10.0k
R19
20.0k
R20
45.3k
R14
30k
R12
30k
R18
2200pF
C16
2200pF
C24
147k
R4
TP7
GND
TP10
PGOOD
2
MODE
4
FB2
6
EN2
32
BST2
9
LX2
10
PGND2
11
PVIN2
12
PVIN3
13
PGND3
14
LX3
15
BST3
16
FB3
19
AGND
21
V7V
5
COMP1
23
SS1
24
FB1
22
EN1
31
BST1
25
LX1
26
PGND1
27
PVIN1
28
VDIV
30
PAD
RESET
3
COMP2
7
COMP3
18
SS2
8
SS3
17
ROSC
20
VIN
29
EN3
1
U1
TPS65261RHB
VDIV
VDIV
www.ti.com
TPS65261 Schematic
2 TPS65261 Schematic
Figure 1 shows the EVM schematic.
Figure 1. TPS65261 Schematic
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SLVUA85–June 2014 TPS65261EVM-650 PMIC 3-A, 2-A, 2-A Output Current Evaluation Module
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