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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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Use of such information may require a license from a third party under the patents or other intellectual property
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Mailing Address:
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Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated
Page 3
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EV ALUA TION
PURPOSES ONL Y and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR ST ATUT ORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER P ARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is notexclusive.
TI assumes no liability for applications assistance, customer product design, software performance, orinfringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’s Guide prior to handling the product. This notice contains important safety information about temperatures
and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated
Page 4
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0 V to 3.6 V and the output
voltage range of 1.5 V to 5.5 V at the dc-dc output and 0.9 V to 3.6 V at the LDO output.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
100°C. The EVM is designed to operate properly with certain components above 100°C as
long as the input and output ranges are maintained. These components include but are not
limited to linear regulators, switching transistors, pass transistors, and current sense
resistors. These types of devices can be identified using the EVM schematic located in the
EVM User’s Guide. When placing measurement probes near these devices during operation,
please be aware that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
The T exas Instruments TPS61 100 to TPS61107 evaluation modules (EVM) for
high-efficiency boost converters help designers to evaluate the different
operating modes and the performance of the device. Refer to T able 1–1 for the
various EVMs available in this family.
If any other output voltage configuration is to be evaluated, the TPS61100
adjustable output voltage version can be set up to provide an output voltage
between 1.5 V and 5.5 V at the output of the boost converter and between 0.9
V and 3.3 V at the LDO. Only the appropriate feedback resistor divider has to
be adjusted. Also, other fixed output voltage versions of the devices can be
easily evaluated using the EVM. Refer to the data sheet (SLVS411) for the
various fixed output voltage options available in the TPS61 10x device family.
The TPS61 10x has an input voltage range between 0.9 V and 3.6 V. For proper
operation the maximum input voltage should not exceed the output voltage.
The maximum output current is at least 100 mA depending on the input
voltage.
Table 1–1.Orderable EVM’s
EVM NumberDescription
TPS61100EVM-216 Adjustable boost output voltage, set to 3.3 V Adjustable LDO output voltage, set to 1.5 V
TPS61103EVM-216 Boost output voltage fixed at 3.3 VAdjustable LDO output voltage, set to 1.5 V
TPS61106EVM-216 Boost output voltage fixed at 3.3 VLDO output voltage fixed at 1.5 V
TPS61107EVM-216 Boost output voltage fixed at 3.3 VLDO output voltage fixed at 1.8 V
1-1
Page 8
1-2
Page 9
Chapter 2
Setup of the EVMs
It is important to establish all connections to the EVM before the power supply
for the EVM is turned on.
- Connect a power supply (0.9 V to V
of the EVM) to the INPUT header
- Connect a voltmeter to the OUTPUT header
- Verify that all jumper s are set to their desired value (EN, ENPB, SKIPEN,
ADEN, LDOEN). Default setting is EN, SKIPEN, ADEN and LDOEN to
and ENPB to GND.
V
BAT
- Turn on the power supply and verify the output voltage
This chapter details the evaluation process and features of the EVM. For this
evaluation, a load is connected to the output terminal in order to adjust the load
current between 0 mA and 250 mA.
For accurate output voltage and input voltage measurements, it is important
to measure the voltage on the input and output voltage terminals with Kelvin
contacts or with a voltmeter connected directly to the input voltage or output
voltage terminals. This will eliminate any measurement errors related to
voltage drops along the input and output terminal wires connected to the
power supply or load.
2.1.1Enable (EN) and Enable Pushbutton (ENPB) Jumper
These jumpers are used to enable the device. Connecting the enable pin (EN)
to V
The device is only disabled when ENPB is set to V
Both enable pins are used to implement enable with a pushbutton and a static
signal for example from a microcontroller. For more details refer to the data
sheet.
or connecting the enable pushbutton (ENPB) to GND enables the part.
BAT
and EN is set to GND.
BAT
2.1.2LDO Enable (LDOEN) Jumper
This jumper is used to enable the integrated LDO of the device. Connecting
the LDO enable pin (LDOEN) to V
Disabling the integrated LDO can be done by setting this jumper to GND.
2.1.3Auto Discharge Enable (ADEN) Jumper
This jumper enables the device to discharge the output capacitor after the
device is disabled by setting EN to GND. If ADEN is set to V
connected to V
is discharged by an internal switch with a resistance of
OUT
about 400 Ω. The discharge time depends on the total output capacitance. The
residual output voltage is less than 0.4V after auto discharge.
When disabling the auto discharge function by setting the jumper to GND, the
output capacitors will only be discharged by the load and/or by the leakage
currents in every connected part.
2.1.4Power Save Mode Enable (SKIPEN) Jumper
This jumper enables the device to enter in power save mode at light load, when
it is set to V
voltage reached its upper threshold, and starts switching again, when the
lower threshold of the output voltage is reached.
. The device automatically stops switching when the output
BAT
enables the LDO section of the part.
BAT
, the capacitors
BAT
When disabling the power save function by setting the jumper to GND, the
device stays operating in fixed frequency mode, regardless of the load current
value. In this mode, however reverse current will flow back to the input during
light load operation increasing power losses. The operating frequency stays
constant, which implies low output voltage ripple.
2-2
Page 11
2.1.5LBI/LBO Comparator
The LBO1 and LBO2 terminals are open drain outputs and have pullup
resistors, R7 and R8, connected to the output. The signal on these pins can
go low as soon as the input voltage at LBI falls below the threshold of 500 mV .
Refer to the more detailed description and the truth table in the datasheet. Both
LBO outputs stay at high-impedance when the input voltage at LBI is above
the appropriate thresholds. A resistor divider (R1, R2) is used on the EVM to
monitor the supply voltage.
More details about setting the low battery threshold voltage can be found in
the data sheet (literature number SLVS411).
2.1.6Power Good Output
The PG pin is an open drain output with a pullup resistor, R9, connected to the
output. The signal on this pin goes high as soon as the output voltage is greater
than typically 92% of the nominal voltage. The signal goes low as soon as the
output voltage falls below this typical threshold. There is an implemented delay
time of 30 µs to prevent the power good output from ringing.
Evaluation With the TPS6110x EVM
Setup of the EVMs
2-3
Page 12
2-4
Page 13
Chapter 3
Bill of Materials, PCB Layout and Schematic
This chapter contains bill of materials, PCB layout of the EVM, and schematic.
Wurth Elektronik: 744 778 10
Also possible: Sumida CDRH73-100
or Coiltronics DR73-100
3-2
Page 15
3.2PCB Layout
As for all switch mode power supplies the PCB layout is a critical step in the
power supply design process. The figures below show the layout for the
adjustable and fixed output voltage EVMs. Please refer to the data sheet for
further layout guidelines. The required board area for the complete dc-to-dc
converter solution takes up less than 320 mm
sided PCB, as it is indicated by the rectangular on the component placement
plot.
Figure 3–1.Component Placement
PCB Layout
2
(16 mm × 20 mm) on a double
Figure 3–2.Top Layer
Bill of Materials, PCB Layout and Schematic
3-3
Page 16
Schematic
Figure 3–3.Bottom Layer
3.3Schematic
Figure 3–4.TPS6110x EVM Circuit Diagram
U
1
SWN
VBAT
1
LBI
SKIPEN
ADEN
EN
ENPB
ENLDO
GND
TPS6110xRGE
LDOSENSE
INPUT
SKIPEN
ADEN
EN
ENPB
ENLDO
C
3
10µF
L
1
10µH
R
R
2
SWP
VOUT
FB
LDOIN
LDOOUT
LBO1
LBO2
PGOOD
PGND
R
3
R
6
R
11
R
10
R
5
R
4
C
2.2µF
C
6
4
100µF
C
5
2.2µF
R
R8R
7
9
OUTPUT
LDOOUT
LBO1
LBO2
PGOOD
3-4
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