Texas Instruments TPS61090RSA, TPS61091RSA, TPS61092RSA Schematic [ru]

SW

C1

10 µF

L1

6.8 µH

R1

R2

VBAT

VOUT

FB

C2

2.2 µFC3100 µF

LBO

PGND

LBI

SYNC

EN

GND

TPS6109x

e.g. 5 V up to
500 mA

Low Battery
Output

R3

R4

R5

1.8 V to 5 V
Input

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TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

TPS6109x Synchronous Boost Converter With 2-A Switch

1 Features 3 Description

1

• Synchronous (96% Efficient) Boost Converter
With 500-mA Output Current From 1.8-V Input

• Available in a 16-Pin VQFN 4 x 4 Package

• Device Quiescent Current: 20 µA (Typ)

• Input Voltage Range: 1.8 V to 5.5 V

• Adjustable Output Voltage Up to 5.5 V Fixed
Output Voltage Options

• Power Save Mode for Improved Efficiency at Low
Output Power implemented boost converter is based on a fixed

• Low Battery Comparator

• Low EMI-Converter (Integrated Antiringing Switch)

• Load Disconnect During Shutdown

• Over-Temperature Protection

2 Applications

• All Single Cell Li or Dual Cell Battery or USB
Powered Operated Products

– MP3 Player
– PDAs
– Other Portable Equipment

The TPS6109x devices provide a power supply
solution for products powered by either a one-cell Li­Ion or Li-Polymer, or a two-cell alkaline, NiCd or
NiMH battery and required supply currents up to or
higher than 1 A. The converter generates a stable
output voltage that is either adjusted by an external
resistor divider or fixed internally on the chip. It
provides high efficient power conversion and is
capable of delivering output currents up to 0.5 A at 5
V at a supply voltage down to 1.8 V. The

frequency, pulse-width- modulation (PWM) controller
using a synchronous rectifier to obtain maximum
efficiency. Boost switch and rectifier switch are
connected internally to provide the lowest leakage
inductance and best EMI behavior possible. The
maximum peak current in the boost switch is limited
to a value of 2500 mA.

The converter can be disabled to minimize battery
drain. During shutdown, the load is completely
disconnected from the battery. A low-EMI mode is
implemented to reduce ringing and, in effect, lower
radiated electromagnetic energy when the converter
enters the discontinuous conduction mode.

The output voltage can be programmed by an
external resistor divider or is fixed internally on the
chip.

The device is packaged in a 16-pin VQFN 4-mm x 4­mm (16 RSA) package.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

TPS61090
TPS61091 VQFN (10) 4.00 mm × 4.00 mm
TPS61092

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

(1)

Simplified Application Schematic

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

www.ti.com

Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Device Comparison Table..................................... 3

6 Pin Configuration and Functions......................... 3

7 Specifications......................................................... 4

7.1 Absolute Maximum Ratings ...................................... 4

7.2 ESD Ratings.............................................................. 4

7.3 Recommended Operating Conditions....................... 4

7.4 Electrical Characteristics........................................... 4

7.5 Typical Characteristics.............................................. 6

8 Parameter Measurement Information .................. 9

9 Detailed Description ............................................ 10

9.1 Overview................................................................. 10

9.2 Functional Block Diagram ....................................... 10

9.3 Feature Description................................................. 11

9.4 Device Functional Modes........................................ 12

10 Application and Implementation........................ 13

10.1 Application Information.......................................... 13

10.2 Typical Applications .............................................. 13

11 Power Supply Recommendations..................... 19

12 Layout................................................................... 19

12.1 Layout Guidelines................................................. 19

12.2 Layout Example.................................................... 19

12.3 Thermal Considerations........................................ 20

13 Device and Documentation Support................. 21

13.1 Device Support...................................................... 21

13.2 Related Links........................................................ 21

13.3 Trademarks........................................................... 21

13.4 Electrostatic Discharge Caution............................ 21

13.5 Glossary................................................................ 21

14 Mechanical, Packaging, and Orderable

Information........................................................... 21

4 Revision History

Changes from Revision B (April 2005) to Revision C Page

• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device

and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

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Product Folder Links: TPS61090 TPS61091 TPS61092

LBOVOUT

VOUT

EN

SYNC

LBI

NC

SW

SW

VOUT

FB

GND

VBAT

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5 Device Comparison Table

TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

T

A

40°C to 85°C 3.3 V 16-pin VQFN 4 mm × 4 mm TPS61091RSA

(1) Contact the factory to check availability of other fixed output voltage versions.
(2) See Mechanical, Packaging, and Orderable Information for ordering information and tape and reel options.

OUTPUT VOLTAGE DC-DC

Adjustable 16-pin VQFN 4 mm × 4 mm TPS61090RSA

5 V 16-pin VQFN 4 mm × 4 mm TPS61092RSA

(1)

PACKAGE PART NUMBER

6 Pin Configuration and Functions

RSA Package

10 Pins

Top View

(2)

Pin Functions

PIN

NAME NO.

EN 11 I Enable input. (1/VBAT enabled, 0/GND disabled)
FB 14 I Voltage feedback of adjustable versions
GND 13 I/O Control/logic ground
LBI 9 I Low battery comparator input (comparator enabled with EN)
LBO 12 O Low battery comparator output (open drain)
NC 2 Not connected
PGND 5, 6, 7 I/O Power ground
PowerPAD™ — — Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.
SYNC 10 I Enable/disable power save mode (1: VBAT disabled, 0: GND enabled, clock signal for

SW 3, 4 I Boost and rectifying switch input
VBAT 8 I Supply voltage
VOUT 1, 15, 16 O DC-DC output

Copyright © 2003–2014, Texas Instruments Incorporated Submit Documentation Feedback 3

I/O DESCRIPTION

synchronization)

Product Folder Links: TPS61090 TPS61091 TPS61092

TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

www.ti.com

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

Input voltage on LBI –0.3 3.6 V
Input voltage on SW, VOUT, LBO, VBAT, SYNC, EN, FB –0.3 7 V

T

A

T

J

T

stg

Operating free air temperature –40 85 °C
Maximum junction temperature 150 °C
Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001

V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

Electrostatic discharge V

(ESD)

Charged-device model (CDM), per JEDEC specification JESD22- ±1000

(2)

C101

less than 500-V HBM is possible with the necessary precautions. Pins listed as ±XXX V may actually have higher performance.
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±YYY V may actually have higher performance.

(1)

MIN MAX UNIT

VALUE UNIT

(1)

±2000

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT

V

I

Supply voltage at VBAT 1.8 5.5 V
L Inductance 2.2 6.8 µH
C

i

C

o

T

A

T

J

Input, capacitance 10

Output capacitance 22 100

Operating free air temperature –40 85

Operating virtual junction temperature –40 125

µF

°C

7.4 Electrical Characteristics

over recommended free-air temperature range and over recommended input voltage range (typical values are at an ambient
temperature range of 25°C) (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

DC-DC STAGE

VIInput voltage range 1.8 5.5
VOTPS61090 output voltage range 1.8 5.5
VFBTPS61090 feedback voltage 490 500 510 mV
f Oscillator frequency 500 600 700

Frequency range for synchronization 500 700

I

Switch current limit VOUT= 5 V 2000 2200 2500

SW

Start-up current limit 0.4 x I

SW

Boost switch on resistance VOUT= 5 V 55
Rectifying switch on resistance VOUT= 5 V 55
Total accuracy –3% 3%
Line regulation 0.6%
Load regulation 0.6%

V

kHz

mA

mΩ

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Product Folder Links: TPS61090 TPS61091 TPS61092

TPS61090,TPS61091,TPS61092

www.ti.com

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

Electrical Characteristics (continued)

over recommended free-air temperature range and over recommended input voltage range (typical values are at an ambient
temperature range of 25°C) (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

into

Quiescent current

VBAT
into µA

VOUT

Shutdown current VEN= 0 V, VBAT = 2.4 V 0.1 1

CONTROL STAGE

V

Under voltage lockout threshold V

UVL

O

VILLBI voltage threshold V

LBI input hysteresis 10
LBI input current EN = VBAT or GND 0.01 0.1 µA
LBO output low voltage VO= 3.3 V, IOI= 100 µA 0.04 0.4 V
LBO output low current 100
LBO output leakage current V

VILEN, SYNC input low voltage 0.2 ×

VIHEN, SYNC input high voltage 0.8 ×

EN, SYNC input current Clamped on GND or VBAT 0.01 0.1 µA
Overtemperature protection 140 °C

IO= 0 mA, VEN= VBAT = 1.8 V, VOUT =5 V 10 25

IO= 0 mA, VEN= VBAT = 1.8 V, VOUT = 5 V 10 20

voltage decreasing 1.5 V

LBI

voltage decreasing 490 500 510

LBI

= 7 V 0.01 0.1

LBO

VBAT

VBAT

mV

µA

V

Copyright © 2003–2014, Texas Instruments Incorporated Submit Documentation Feedback 5

Product Folder Links: TPS61090 TPS61091 TPS61092

0

10

20

30

40

50

60

70

80

90

100

1 10 100 1000 10000

Efficiency

- %

IO- Output Current - mA

VO= 2.5 V
VI= 1.8 V

VI= 1.8 V

VI= 2.4 V

0

10

20

30

40

50

60

70

80

90

100

1 10

100 1000

10000

Efficiency

- %

IO- Output Current - mA

VO= 3.3 V

0

0.5

1

1.5

2

2.5

1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5

V

- Input Voltage - V

Maximum Output Current

- A

0

0.5

1

1.5

2

2.5

1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5

V

- Input Voltage - V

Maximum Output Current

- A

TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

www.ti.com

7.5 Typical Characteristics

Table 1. Table of Graphs

DC-DC Converter Figure

Maximum output current vs Input voltage

vs Output current (TPS61090) (VO= 2.5 V, VI= 1.8 V, VSYNC = 0 V) Figure 3
vs Output current (TPS61091) (VO= 3.3 V, VI= 1.8 V, 2.4 V, VSYNC = 0 V) Figure 4

Efficiency vs Output current (TPS61092) (VO= 5.0 V, VI= 2.4 V, 3.3 V, VSYNC = 0 V) Figure 5

vs Output current (TPS61091) (IO= 10 mA, 100 mA, 500 mA, VSYNC = 0 V) Figure 6
vs Output current (TPS61092) (IO= 10 mA, 100 mA, 500 mA, VSYNC = 0 V) Figure 7

Output voltage

vs Output current (TPS61091) (VI= 2.4 V) Figure 8

vs Output current (TPS61092) (VI= 3.3 V) Figure 9
No-load supply current into VBAT Voltage (TPS61092) Figure 10
No-load supply current into VOUT vs Input voltage (TPS61092) Figure 11
Minimum Load Resistance at Start-Up vs Input Voltage (TPS61092) (VI= 3.3 V) Figure 12

Figure 1,

Figure 2

Figure 1. TPS61091 Maximum Output Current vs Input Figure 2. TPS61092 Maximum Output Current vs Input

Figure 3. TPS61090 Efficiency vs Output Current

6 Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated

Voltage Voltage

Figure 4. TPS61091 Efficiency vs Output Current

Product Folder Links: TPS61090 TPS61091 TPS61092

4.8

4.85

4.9

4.95

5

5.05

5.1

10 100 1000 10000

- Output V

oltage

- V

IO- Output Current - mA

V

O

VBAT = 3.3 V

0

2

4

6

8

10

12

14

16

2 3 4 5

VI- Input Voltage - V

-40 C°

85 C°

25 C°

Aμ

No-Load Supply Current Into VBA

T -

50

55

60

65

70

75

80

85

90

95

100

1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5

Efficiency

- %

VI- Input Voltage - V

IO= 100 mA

IO= 500 mA

IO= 10 mA

3.2

3.25

3.3

3.35

10 100 1000 10000

- Output V

oltage

- V

IO- Output Current - mA

V

O

VBAT = 2.4 V

0

10

20

30

40

50

60

70

80

90

100

1 10 100 1000 10000

VI= 2.4 V

VI= 3.3 V

VO= 5 V

Efficiency

- %

IO- Output Current - mA

50

80

90

100

Efficiency

- %

VI- Input Voltage - V

IO= 10 mA

IO= 100 mA

1.8 2 2.6 2.8 32.2 2.4 3.2

60

IO= 500 mA

70

V = 5 V

O

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TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

Figure 5. TPS61092 Efficiency vs Output Current Figure 6. TPS61091 Efficiency vs Output Current

Figure 7. TPS61092 Efficiency vs Output Current

Figure 9. TPS61092 Output Voltage vs Output Current

Copyright © 2003–2014, Texas Instruments Incorporated Submit Documentation Feedback 7

Figure 8. TPS61091 Efficiency vs Output Current

Figure 10. TPS61092 No-Load Supply Current Into VBAT

Voltage

Product Folder Links: TPS61090 TPS61091 TPS61092

VI- Input Voltage - V

-40 C°

85 C°

25 C°

Aμ

No-Load Supply Current Into VOUT

-

0

2

4

6

8

10

12

14

16

1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5

0

5

10

15

20

25

1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5

Minimum Load resistance at Startup

-

VI- Input Voltage - V

TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

Figure 11. TPS61092 No-Load Supply Current Into VOUT vs Figure 12. Minimum Load Resistance at Start-Up vs Input

Input Voltage Voltage

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Product Folder Links: TPS61090 TPS61091 TPS61092

SW

C1

10 mF

Power

Supply

L1

6.8 mH

R1

R2

VBAT

VOUT

FB

C2

2.2 mFC3100 mF

LBO

PGND

LBI

SYNC

EN

GND

TPS6109x

List of Components:
U1 = TPS6109xRSA
L1 = Sumida CDRH103R-6R8
C1, C2 = X7R/X5R Ceramic
C3 = Low ESR Tantalum

V

OUT

Boost Output

Low Battery
Output

R3

R4

R5

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8 Parameter Measurement Information

Figure 13. Parameter Schematic

TPS61090,TPS61091,TPS61092

SLVS484C –JUNE 2003–REVISED DECEMBER 2014

Copyright © 2003–2014, Texas Instruments Incorporated Submit Documentation Feedback 9

Product Folder Links: TPS61090 TPS61091 TPS61092