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Copyright 2002, Texas Instruments Incorporated
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR S TATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is notexclusive.
TI assumes no liability for applications assistance, customer product design, software performance, orinfringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
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Persons handling the product must have electronics training and observe good laboratory practice standards.
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Copyright 2002, Texas Instruments Incorporated
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the supply voltage range of 1.8 V to 6 V.
Exceeding the specified supply range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the supply range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
125°C. The EVM is designed to operate properly with certain components above 125°C as
long as the input and output ranges are maintained. These components include but are not
limited to linear regulators, switching transistors, pass transistors, and current sense
resistors. These types of devices can be identified using the EVM schematic located in the
EVM User’s Guide. When placing measurement probes near these devices during operation,
please be aware that these devices may be very warm to the touch.
Mailing Address:
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Post Office Box 655303
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Copyright 2002, Texas Instruments Incorporated
About This Manual
This users guide describes the characteristics, operation, and use of the
TPS61040EVM LCD bias supply evaluation module (EVM). This EVM is a
Texas Instruments high-efficiency boost converter that is configured to
generate 18 V at 2 0 mA, for LCD bias supply, from a single cell Li−Ion battery.
The users guide includes a schematic diagram, bill of materials (BOM), and
test data.
How to Use This Manual
This document contains the following chapters:
- Chapter 1—Introduction
- Chapter 2—Setup and Test Results
- Chapter 3—Board Layout
- Chapter 4—Schematic and Bill of Materials
Related Documentation From Texas Instruments
- TPS601040/41 data sheet (literature number SLVS413).
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
This TPS61040EVM uses the TPS61040 boost converter to generate an 18-V
output from a single cell Li-Ion battery (3 V to 4.2 V). This EVM operates over
an input voltage range of 1.8 V to 6 V, but has been optimized over the 3-V to
5-V input range. Operation with an input voltage down to 1.8 V is possible,
depending on the output current and voltage settings. The EVM includes an
adjust pin that allows the user to adjust the LCD bias with either a variable
resistance or an analog voltage.
The output voltage of the TPS61040EVM can be adjusted up to 28 V by
modifying the resistor values used in resistor divider R1 & R2. The EVM can
also be configured for higher or lower output currents. For lower currents, the
TPS61040 may be replaced by the pin for pin compatible TPS61041. More
information about output voltage adjustment and current ratings of
TPS61040/41 devices can be found in the data sheet Literature Number
SLVS413.
1.2Performance Specification Summary
Table 1−1 provides a summary of the TPS61040EVM−001 performance
specifications. All specifications are given for an ambient temperature of 25°C.
The EVM may be modified to operate over different input and output currents
and voltages, per the TPS61040 data sheet specifications.
The TPS61040EVM−001 PWB has several connections, which are described
in Table 2−1.
Table 2−1.Input/Output Connections
Reference
Designator
J1Vin
J2GNDThis is the return connection to the input power supply.
J3Adjust
J4GNDThis is the return pin for the load.
J5VoutThis is the positive connection for the load.
JP1Enable
NameDescription
This is the positive connection to the input power supply. The leads to the input
supply should be twisted and kept as short as possible.
A variable resistor may be connected between J3−1 and J3−2 to vary the output
voltage of the EVM. J3−1 has a square pad and is connected directly to the FB pin
of the TPS61040. J3−2 has a round pad and is connected directly to ground. The
output voltage may also be adjusted by connecting an analog voltage through a
resistor to J3−1.
Use this connector to enable and disable the power supply. Connect a jumper
between the ON pin and the center pin to enable the supply, and connect a jumper
between the Off pin and the center pin to disable the supply. When the EN pin of the
TPS61040 is left open, its state is undetermined. The jumper must either be
connected to On (Vin) or to Off (GND) for the EVM to operate correctly.
2.2EVM Operation
Connect an input supply and a load to the appropriate connectors provided on
the EVM. The absolute maximum input voltage is 7 V. The TPS61040 is
designed to operate with a maximum 6-V input voltage. Move the adjust
jumper from the Off position to the On position to enable the supply.
Placing a variable resistor across the adjust pins of the EVM allows the user
to vary the output voltage. Specific design equations may be found in the
TPS61040 data sheet.
2.3Start-Up
Figure 2−1 shows the startup voltage and current waveforms of the EVM.
When the EVM is enabled, the TPS61040 goes through its programmed
three-stage soft-start sequence to reduce inrush current at turn on.
2-2
Setup and Test Results
Figure 2−1.Start-Up Waveforms
2.4Output Voltage Ripple
Output Voltage Ripple
Figure 2−2 shows the output voltage ripple with IO = 20 mA. The top trace
shows the ripple with 3.6-V input, and the bottom trace shows the ripple with
a 4.2-V input. The difference in switching frequency between the two traces
is expected and is explained in the data sheet.
Figure 2−2.Output Ripple
Setup and Test Results
2-3
Switching Waveforms
2.5Switching Waveforms
Figure 2−3 shows the switching waveform at the SW pin of the TPS61040.
When the internal FET turns on, the voltage at the SW pin is pulled to ground
until the inductor current reaches 450 mA. When the inductor current reaches
450 mA, the FET turns off and the voltage at the SW pin rises to the output
voltage plus the forward voltage drop of the diode. During this time, the
inductor transfers its stored energy to the load and the output capacitor . When
the inductor current decays to zero, the SW node rings at a frequency
determined by the output inductor and the drain capacitance of the internal
FET . This ringing is indicative of a discontinuous boost power supply topology.
Figure 2−3.SW Waveform
2.6Input Voltage Ripple
Figure 2−4 shows the input voltage and current ripple of the supply with
Vin = 3.6 V and IO = 20 mA. The input capacitance of the TPS61040 and the
impedance of the input voltage supply largely determine the input voltage and
current ripple. Increasing the input capacitance or lowering the source
impedance reduces the input voltage and current ripple.
2-4
Setup and Test Results
Figure 2−4.Input Ripple Voltage
2.7Efficiency
Efficiency
Input Ripple Voltage
Input Ripple Current
Figure 2−5 shows the measured efficiency of the TPS61040.
Figure 2−5.Typical Efficiency
Efficiency − %
90
89
88
87
86
85
84
83
82
81
80
2.557.51012.51517.520
IO − Output Current − mA
VI = 6 V
VI = 4.2 V
VI = 3.6 V
VI = 2.5 V
Setup and Test Results
2-5
Output Adjust
3)
R2
1.233 V R1
2.8Output Adjust
The TPS61040EMV−001 provides two methods of output voltage adjustment
for LCD contrast control. The first method of output voltage adjustment is
accomplished with a variable resistor, while the second method is
accomplished using a variable control voltage.
2.8.1Variable Resistor Output Voltage Adjust
This method is accomplished by removing R2 on the EVM and then placing
a variable resistor between J3−1 and ground. The equations provided below
calculate the range of the variable resistor where:
- R
(adjust),min
- R
(adjust),max
- R1= value for R1
- V
O,max
- V
O,min
R
adjust,min
R
adjust,max
For example, if V
R
(adjust),min
implemented using a 154-kΩ resistor in series with a 20-kΩ potentiometer.
+ 1.233 V
+ 1.233 V
= 153.4 kΩ, and R
= minimum value for R2
= maximum value for R2
= maximum desired output voltage
= minimum desired output voltage
R1
ǒ
O,max
V
O,max
ǒ
V
= 19 V, V
* 1.233 V
R1
* 1.233 V
O,min
O,min
(adjust),max
2.8.2Variable Control Voltage Output Voltage Adjust
This method is accomplished by connecting a variable control voltage through
a resistor, R
R
(adjust)
where:
, to J3−1. The equations provided below calculate R2 and
(adjust)
Ǔ
Ǔ
= 17 V, and R1 = 2.21 MΩ, then
= 172.8 kΩ. This scenario is best
(1)
(2)
+
ƪ
1.233 VǒV
2-6
O,min
* V
O,max
R
adjust
For example, if V
3.3 V, and R1 = 1 MΩ, then R2
V
(adjust)
ǒ
V
adjust,max
) V
adjust,min
+ R2 R1
= 0 V then VO = 19 V. When V
* V
O,max
* V
adjust,min
Ǔ
adjust,max
* V
ǒ
V
adjust,max
ƪ
1.233 V(R2 ) R1)* V
= 19 V, V
O,min
= 72.4 kΩ, and R
Ǔ
adjust,min
= 17 V , V
xV
O,min
* 1.233 V
(adjust)
) V
adjust,max
xV
O,max
Ǔ
ƫ
R2
O,min
(adjust),min
= 3.3 V then VO = 17 V.
= 0 V , V
(adjust)
Setup and Test Results
(adjust),max
= 1.65 MΩ. When
(
ƫ
(4)
=
3.1Layout
Chapter 3
This chapter provides the TPS61040EVM−001 board layout and illustrations.
Board layout is critical for all switch mode power supplies. Figures 3−1, 3−2
and 3−3 show the board layout for the TPS61040EVM−001 PWB. The nodes
with high-switching frequency are short and isolated from the noise-sensitive
feedback circuitry. Careful attention has been given to the routing of
high-frequency current loops. Refer to the data sheet for specific layout
guidelines.
Figure 3−1.Assembly Layer
Board Layout
3-1
Layout
Figure 3−2.Top Layer Routing
Figure 3−3.Bottom Layer Routing
3-2
Board Layout
Chapter 4
This chapter provides the TPS61040EVM−001 schematic and bill of materials.