Texas Instruments TPS55165Q1-EVM, TPS55160Q1-EVM User Manual

User's Guide

SLVUAY1–November 2017

TPS5516xQ1-EVM Evaluation Module for 1-A Single­Inductor Buck-Boost-Converter

The Texas Instruments TPS55160Q1-EVM and TPS55165Q1-EVM evaluation modules (EVMs) help
designers evaluate the operation and performance of the TPS55160-Q1 and TPS55165-Q1 1-A single­inductor buck-boost converters. This user's guide describes how to set up and configure the EVMs for
operation. This document also provides the board layout, the schematic, and the bill of materials (BoM) for
the EVMs.

The TPS55160-Q1 device allows users to set the output voltage from 5.7 V to 9 V through a feedback­divider. The TPS55165-Q1 device has a selectable output voltage of 5 V or 12 V.

Contents

1 Introduction ................................................................................................................... 3

2 Schematic, Bill of Materials, and Layout ................................................................................. 3

2.1 Schematic ........................................................................................................... 4

2.2 Bill of Materials...................................................................................................... 5

2.3 Layout and Component Placement............................................................................... 7

3 Setup and Operation ...................................................................................................... 11

3.1 Input and Output Connector Descriptions...................................................................... 11

3.2 Jumper Configuration............................................................................................. 12

3.3 Test Point Description ............................................................................................ 14

3.4 Basic Operation.................................................................................................... 15

4 Typical Performance....................................................................................................... 16

4.1 Efficiency ........................................................................................................... 16

4.2 Startup Waveforms................................................................................................ 16

4.3 Switch Node Waveforms in Buck Mode, Boost Mode, and in Buck-Boost Mode......................... 17

4.4 Load-Step Response ............................................................................................. 18

4.5 Line step response / Cranking support......................................................................... 19

5 Related Documentation.................................................................................................... 20

1 TPS55160Q1-EVM With Jumper Settings................................................................................ 3

2 TPS55165Q1-EVM With Jumper Settings................................................................................ 3

3 Schematic Diagram—No Variations ...................................................................................... 4

4 TPS55160Q1-EVM Schematic Diagram—Assembly Option .......................................................... 4

5 TPS55165Q1-EVM Schematic Diagram—Assembly Option........................................................... 5

6 Component Placement—Top .............................................................................................. 7

7 TPS55160Q1-EVM Top Layer—Overview ............................................................................... 8

8 TPS55165Q1-EVM Top Layer—Overview ............................................................................... 8

9 Component Placement—Bottom .......................................................................................... 9

10 TPS55160Q1-EVM Bottom Layer—Overview .......................................................................... 9

11 TPS55165Q1-EVM Bottom Layer—Overview ......................................................................... 10

12 Layout—Top Layer......................................................................................................... 10

13 Layout—Layer 2............................................................................................................ 10

14 Layout—Layer 3............................................................................................................ 10

15 Layout—Bottom Layer..................................................................................................... 10

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16 TPS55165Q1-EVM Showing Supply and Load Connections ........................................................ 11

17 Ignition Jumper Configuration Default: ON (Device powers up when power is applied).......................... 12

18 Power-Latch Jumper Configuration Default: LATCH .................................................................. 12

19 Spread Spectrum Enable Jumper Configuration Default: Jumper Installed, Spread Spectrum Disabled ...... 13

20 Power-Good Delay Selection Jumper Configuration Default: Jumper Not Installed, 3-ms Delay ............... 13

21 Low-Power-Mode Enable Jumper Configuration Default: Jumper Set to PWM, LPM Prohibited ............... 13

22 Output Voltage Selection Jumper Configuration Default: 5 V for TPS55165-Q1 .................................. 14

23 Output Voltage Selection Jumper Configuration Default: 8 V for TPS55160-Q1, Configured by R6 and R7.. 14

24 Typical Efficiency for 5-V Output ......................................................................................... 16

25 Typical Efficiency for 12-V Output ....................................................................................... 16

26 Startup When VIN is Already Present and IGN is Pulled High....................................................... 16

27 Startup With IGN Tied to VIN and Both Ramp Up..................................................................... 16

28 Switch-Nodes in Buck Mode (V
29 Switch-Nodes in Buck-Boost-Mode (V
30 Switch-Nodes in Boost Mode (V
31 Load-Step Response V
32 Load-Step Response V
33 Load-Step Response V
34 Load-Step Response V
35 Load-step-response V

= 12 V, V

VIN

= 2.5 V, V

VIN

= 14 V, V

VIN

= 12 V, V

VIN

= 4 V, V

VIN

= 12 V, V

VIN

VIN

= 2.5 V, V

VIN

= 5 V (Buck Mode), 100 mA-1 A-100 mA ............................... 18

VOUT

VOUT

= 12 V (Buck Mode), 100 mA-800 mA-100 mA ........................ 18

VOUT

= 12 V (Buck-Boost Mode), 100 mA-600 mA-100 mA................. 18

VOUT

= 12 V (Boost Mode), 50 mA-150 mA-50 mA ............................. 18

VOUT

= 5 V) ............................................................... 17

VOUT

= 5 V, V

VOUT

= 5 V)......................................................... 17

VOUT

= 5 V).............................................................. 17

= 5 V (Boost Mode), 50 mA-400 mA-50 mA ........................... 18

36 Cranking Pulse Response With 5-V Output, 200-mA Load, 2 s/div................................................. 19

37 Cranking Pulse Response With 5-V Output, 200-mA Load, Zoom to 100 ms/div................................. 19

38 Cranking Pulse Response With 5-V Output, 200-mA Load, Zoom to 5 ms/div.................................... 19

39 Cranking Pulse Response With 5-V Output, 200-mA load, Zoom to 200 µs/div................................... 19

1 Bill of Materials (BOM) ..................................................................................................... 5

2 Terminal Descriptions...................................................................................................... 11

Trademarks

All trademarks are the property of their respective owners.

List of Tables

2

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1 Introduction

The HVL143B is a fully-assembled EVM design for evaluation of TPS55165-Q1 or TPS55160-Q1 1-A
single-inductor buck-boost converter. Figure 1 and Figure 2 show the TPS55160Q1-EVM and
TPS55165Q1-EVM boards with jumper settings.

Introduction

Figure 1. TPS55160Q1-EVM With Jumper Settings

Figure 2. TPS55165Q1-EVM With Jumper Settings

2 Schematic, Bill of Materials, and Layout

This section provides a more detailed description of the schematic, bill of materials (BOM), and layout.

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3

100k

R4

PG_DLY

PG

VREG

L2

VBAT_F

VOUTTP5

PG

TP6
VREG

VOS_FB

PGND

1

VINP

4

VINL

5

IGN

6

PS

7

IGN_PWRL8SS_EN

9

PG_DLY

10

VREG_Q

11

VREG

12

GND

13

VOS_FB

14

PG

15

VOUT_SENSE

16

VOUT

17

GND

18

PAD

21

L1

2

BST1

3

BST2

19

L2

20

U1

TPS55165PWPQ1

BST1

L1

VREG

VREG

VREG

BST2

TP7
GND

10.0k

R3

D2

DNP

VOUT

VOUT

VOUT

1.00k

R1

DNP

1.00k

R2

DNP

4V - 36V (12V output)

2V - 36V (5V output)

5V / 12V / adjustable
1A(buck mode only,

4.7µH

L2

0.1µF

C8

0.1µF

C12

0.1µF

C13

9.09k

R7

DNP

82.5k

R6

DNP

0.01µF

C9

DNP

0.01µF

C10

DNP

0.47µF

C11

0.1µF

C15

TP1
VBAT

TP2

Vbat_GND

TP3
VOUT

TP4

Vout_GND

4.7µF

C14

D1

DNP

10µFC310µF

C4

PGND PGNDPGND PGND

reduced in boost-mode)

PGND PGND PGND

PGND

PGND

PGND

PGND

PGND

VBAT

10µF

C6

10µF

C7

1

2

3

LPM

PWM

J5

PS

1

2

3

UNLATCH

LATCH

J2

IGN_PWRL

1

2

3

ON

OFF

J1

IGN

100µF

C5

0.1µF

C2

2.2µHL1

PGND

PGND

PGND

PGND

PGND

PGND

PGND

PGND P GND

PGND

PGND

PGND

PGND

1

2

3

3ms

40ms

0.6ms

J4

PG_DLY

1

2

J3

SS_EN

0.01µF

C1

DNP

0.01µF

C22

DNP

10µF

C19

DNP

PGND

0

R5

VREG

PGND

1

2

3

5V

12V

J6

Vout_Set

0.1µF

C21

2.2µF

C20

10µF

C16

10µF

C17

10µF

C18

DNP

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100k

R4

PG_DLY

PG

VREG

L2

VBAT_F

VOUTTP5

PG

TP6
VREG

VOS_FB

PGND

1

VINP

4

VINL

5

IGN

6

PS

7

IGN_PWRL

8

SS_EN

9

PG_DLY

10

VREG_Q

11

VREG

12

GND

13

VOS_FB

14

PG

15

VOUT_SENSE

16

VOUT

17

GND

18

PAD

21

L1

2

BST1

3

BST2

19

L2

20

U1

TPS55165PWPQ1

BST1

L1

VREG

VREG

VREG

BST2

TP7
GND

10.0k

R3

D2

VOUT

VOUT

VOUT

1.00k

R1

1.00k

R2

4V - 36V (12V output)

2V - 36V (5V output)

5V / 12V / adjustable
1A(buck mode only,

4.7µH

L2

0.1µF

C8

0.1µF

C12

0.1µF

C13

9.09k

R7

82.5k

R6

0.01µF

C9

0.01µF

C10

0.47µF

C11

0.1µF

C15

TP1
VBAT

TP2

Vbat_GND

TP3
VOUT

TP4

Vout_GND

4.7µF

C14

D1

10µFC310µF

C4

PGND PGNDPGND PGND

reduced in boost-mode)

PGND PGND PGND

PGND

PGND

PGND

PGND

PGND

VBAT

10µF

C6

10µF

C7

1

2

3

LPM

PWM

J5

PS

1

2

3

UNLATCH

LATCH

J2

IGN_PWRL

1

2

3

ON

OFF

J1

IGN

100µF

C5

0.1µF

C2

2.2µHL1

PGND

PGND

PGND

PGND

PGND

PGND

PGND

PGND PGND

PGND

PGND

PGND

PGND

1

2

3

3ms

40ms

0.6ms

J4

PG_DLY

1

2

J3

SS_EN

0.01µF

C1

0.01µF

C22

10µF

C19

PGND

0

R5

VREG

PGND

1

2

3

5V

12V

J6

Vout_Set

0.1µF

C21

2.2µF

C20

10µF

C16

10µF

C17

10µF

C18

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Schematic, Bill of Materials, and Layout

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TPS5516xQ1-EVM Evaluation Module for 1-A Single-Inductor Buck-Boost­Converter

2.1 Schematic

Figure 3. Schematic Diagram—No Variations

Figure 4. TPS55160Q1-EVM Schematic Diagram—Assembly Option

100k

R4

PG_DLY

PG

VREG

L2

VBAT_F

VOUTTP5

PG

TP6
VREG

VOS_FB

PGND

1

VINP

4

VINL

5

IGN

6

PS

7

IGN_PWRL8SS_EN

9

PG_DLY

10

VREG_Q

11

VREG

12

GND

13

VOS_FB

14

PG

15

VOUT_SENSE

16

VOUT

17

GND

18

PAD

21

L1

2

BST1

3

BST2

19

L2

20

U1

TPS55160PWPQ1

BST1

L1

VREG

VREG

VREG

BST2

TP7
GND

10.0k

R3

D2

DNP

VOUT

VOUT

VOUT

1.00k

R1

DNP

1.00k

R2

DNP

4V - 36V (12V output)

2V - 36V (5V output)

5V / 12V / adjustable
1A(buck mode only,

4.7µH

L2

0.1µF

C8

0.1µF

C12

0.1µF

C13

9.09k

R7

82.5k

R6

0.01µF

C9

DNP

0.01µF

C10

DNP

0.47µF

C11

0.1µF

C15

TP1
VBAT

TP2

Vbat_GND

TP3
VOUT

TP4

Vout_GND

4.7µF

C14

D1

DNP

10µFC310µF

C4

PGND PGNDPGND PGND

reduced in boost-mode)

PGND PGND PGND

PGND

PGND

PGND

PGND

PGND

VBAT

10µF

C6

10µF

C7

1

2

3

LPM

PWM

J5

PS

1

2

3

UNLATCH

LATCH

J2

IGN_PWRL

1

2

3

ON

OFF

J1

IGN

100µF

C5

0.1µF

C2

2.2µHL1

PGND

PGND

PGND

PGND

PGND

PGND

PGND

PGND P GND

PGND

PGND

PGND

PGND

1

2

3

3ms

40ms

0.6ms

J4

PG_DLY

1

2

J3

SS_EN

0.01µF

C1

DNP

0.01µF

C22

DNP

10µF

C19

DNP

PGND

0

R5

DNP

VREG

PGND

1

2

3

5V

12V

J6

Vout_Set

DNP

0.1µF

C21

2.2µF

C20

10µF

C16

10µF

C17

10µF

C18

DNP

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Schematic, Bill of Materials, and Layout

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Figure 5. TPS55165Q1-EVM Schematic Diagram—Assembly Option

2.2 Bill of Materials

Table 1. Bill of Materials (BOM)

Designator

Quantityfor
TPS55165Q

1-EVM

(Variant

001)

Quantityfor
TPS55160Q

1-EVM

(Variant

002)

Value Description Package Reference Part Number Manufacturer

!PCB 1 1 Printed Circuit Board HVL143 Any

C2, C8, C12, C13, C15,

C21

6 6 0.1 µF CAP, CERM, 0.1 µF, 50 V, ± 10%, X7R, 0603 0603 GCM188R71H104KA57D MuRata

C3, C4, C6, C7, C16, C17 6 6 10 µF

CAP, CERM, 10 µF, 50 V, ± 10%, X7R, AEC-Q200
Grade 1, 2220

2220 CGA9N3X7R1H106K230KB TDK

C5 1 1 100 µF CAP, AL, 100 µF, 50 V, ± 20%, 0.3 ohm, SMD SMT Radial G EEE-FC1H101P Panasonic

C11 1 1 0.47 µF

CAP, CERM, 0.47 µF, 50 V, +/- 10%, X7R, AEC-Q200
Grade 1, 0603

0603 CGA3E3X7R1H474K080AE TDK

C14 1 1 4.7 µF

CAP, CERM, 4.7 µF, 16 V, ± 10%, X7R, AEC-Q200
Grade 1, 0805

0805 GCM21BR71C475KA73K MuRata

C20 1 1 2.2 µF

CAP, CERM, 2.2 µF, 50 V, +/- 10%, X7R, AEC-Q200
Grade 1, 1206

1206 GCM31CR71H225KA55L MuRata

FID1, FID2, FID3, FID4,

FID5, FID6

6 6 Fiducial mark. There is nothing to buy or mount. N/A N/A N/A

H9, H10, H11, H12 4 4 Bumpon, Hemisphere, 0.44 X 0.20, Clear Transparent Bumpon SJ-5303 (CLEAR) 3M

J1 1 1 ON Header, 100mil, 3x1, Gold, TH Header, 100mil, 3x1, TH HTSW-103-07-G-S Samtec
J2 1 1 Header, 100mil, 3x1, Gold, TH Header, 100mil, 3x1, TH HTSW-102-07-G-S Samtec

Schematic, Bill of Materials, and Layout

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TPS5516xQ1-EVM Evaluation Module for 1-A Single-Inductor Buck-Boost­Converter

Table 1. Bill of Materials (BOM) (continued)

Designator

Quantityfor
TPS55165Q

1-EVM

(Variant

001)

Quantityfor
TPS55160Q

1-EVM

(Variant

002)

Value Description Package Reference Part Number Manufacturer

J3 1 1 Header, 100mil, 2x1, Gold, TH Header, 100mil, 2x1, TH HTSW-103-07-G-S Samtec
J4 1 1 3 ms Header, 100mil, 3x1, Gold, TH Header, 100mil, 3x1, TH HTSW-103-07-G-S Samtec
J5 1 1 LPM Header, 100mil, 3x1, Gold, TH Header, 100mil, 3x1, TH HTSW-103-07-G-S Samtec
J6 1 0 5 V Header, 100mil, 3x1, Gold, TH Header, 100mil, 3x1, TH HTSW-103-07-G-S Samtec

L1 1 1 2.2 µH

Inductor, Shielded, Powdered Iron, 2.2 µH, 4.7 A, 0.035
ohm, AEC-Q200 Grade 1, SMD

4.1x4.1mm 78438356022 Wurth Elektronik

L2 1 1 4.7 µH

Inductor, Wirewound, 4.7 µH, 5.5 A, 0.04 ohm, AEC­Q200 Grade 0, SMD

7.3 x 6.6 mm SRP7028A-4R7M Bourns

LBL1 1 1

Thermal Transfer Printable Labels, 0.650" W x 0.200" H

- 10,000 per roll

PCB Label 0.650 x 0.200
inch

THT-14-423-10 Brady

R3 1 1 10.0 k RES, 10.0 k, 1%, 0.1 W, 0603 0603 CRCW060310K0FKEA Vishay-Dale
R4 1 1 100 k RES,100 k, 5%, 0.1 W, 0603 0603 CRCW0603100KJNEA Vishay-Dale
R5 1 0 0 RES, 0, 5%, 0.063 W, 0402 0402 CRCW04020000Z0ED Vishay-Dale
R6 0 1 82.5 k RES, 82.5 k, 1%, 0.1 W, 0603 0603 CRCW060382K5FKEA Vishay-Dale
R7 0 1 9.09 k RES, 9.09 k, 1%, 0.1 W, 0603 0603 CRCW06039K09FKEA Vishay-Dale

SH-J1, SH-J2, SH-J3, SH-

J4, SH-J5

5 5 1× 2 Shunt, 100mil, Gold plated, Black Shunt 969102-0000-DA 3M

TP1, TP2, TP3, TP4 4 4 PCB Pin, Swage Mount, TH PCB Pin (2505-2) 2505-2-00-44-00-00-07-0 Mill-Max

TP5, TP6, TP7 3 3 Test Point, Miniature, SMT Test Point, Miniature, SMT 5019 Keystone

U1 1 1

36-V, 1-A Output, 2-MHz, Single Inductor, Synchronous
Step-Up and Step-Down Voltage Regulator, PWP0020P
(TSSOP-20)

PWP0020P TPS55165PWPQ1 Texas Instruments

C1, C9, C10, C22 0 0 0.01 µF

CAP, CERM, 0.01 µF, 50 V, +/- 10%, X7R, AEC-Q200
Grade 1, 0603

0603 GCM188R71H103KA37D MuRata

C18, C19 0 0 10 µF

CAP, CERM, 10 µF, 50 V, +/- 10%, X7R, AEC-Q200
Grade 1, 2220

2220 CGA9N3X7R1H106K230KB TDK

D1, D2 0 0 60 V Diode, Schottky, 60 V, 1 A, SOD-123F SOD-123F PMEG6010CEH,115 Nexperia

H1, H2, H3, H4 0 0

Machine Screw, Round, #4-40 x 1/4, Nylon, Philips
panhead

Screw NY PMS 440 0025 PH

B & F Fastener
Supply

H5, H6, H7, H8 0 0 Standoff,Hex, 0.5"L #4-40 Nylon Standoff 1902C Keystone

R1, R2 0 0 1.00 k RES, 1.00 k, 1%, 0.1 W, 0603 0603 CRCW06031K00FKEA Vishay-Dale

R6 0 0 82.5 k RES, 82.5 k, 1%, 0.1 W, 0603 0603 CRCW060382K5FKEA Vishay-Dale
R7 0 0 9.09 k RES, 9.09 k, 1%, 0.1 W, 0603 0603 CRCW06039K09FKEA Vishay-Dale

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2.3 Layout and Component Placement

The TPS55160Q1-EVM and TPS55165Q1-EVM share the same PCB which is named HVL143B.
The C1, C18, C19, and C22 capacitors are not installed. Their footprints allow for additional input

decoupling or bulk capacitance.
The R6 and R7 resistors are not populated on the TPS55165Q1-EVM. Select the output voltage of either

5V or 12V using J6, which is named Vout_Set.
The R6 and R7 resistors are populated on the TPS55160Q1-EVM. These resistors set the output voltage

to 8V. To eliminate the long trace to the J6jumper, which is prone to pick up noise, the R5 resistor and J6
jumper are not assembled on the TPS55160Q1-EVM.

Figure 4, Figure 7, and Figure 8 show the top layout of the EVM, with assembly options for the fixed

voltage version (TPS55165Q1-EVM) at the adjustable voltage version (TPS55160Q1-EVM).

Schematic, Bill of Materials, and Layout

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Figure 6. Component Placement—Top

TPS5516xQ1-EVM Evaluation Module for 1-A Single-Inductor Buck-Boost-

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7

Schematic, Bill of Materials, and Layout

Figure 7. TPS55160Q1-EVM Top Layer—Overview

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Figure 8. TPS55165Q1-EVM Top Layer—Overview

8

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Figure 9, Figure 10, and Figure 11 show the bottom layout of the EVM, with assembly options for the fixed

voltage version (TPS55165Q1-EVM) at the adjustable voltage version (TPS55160Q1-EVM).

Schematic, Bill of Materials, and Layout

Figure 9. Component Placement—Bottom

Figure 10. TPS55160Q1-EVM Bottom Layer—Overview

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Schematic, Bill of Materials, and Layout

Figure 11. TPS55165Q1-EVM Bottom Layer—Overview

Figure 12, Figure 13, Figure 14, and Figure 15 show the EVM board layers.

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Figure 12. Layout—Top Layer

Figure 14. Layout—Layer 3

10

TPS5516xQ1-EVM Evaluation Module for 1-A Single-Inductor Buck-Boost­Converter

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Figure 13. Layout—Layer 2

Figure 15. Layout—Bottom Layer

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Load +

Load GND

Supply Line +

Supply Line GND

TPS55165EVM

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3 Setup and Operation

This section describes the setup and configuration of the EVM for basic operation. This section provides a
detailed description of connectors, jumpers, and test points. A description of the typical operation of the
EVM is also included.

3.1 Input and Output Connector Descriptions

The EVM has one pair of connectors (turrets) for the input and one pair for the output. Table 2lists all the
connectors with their functional description and electrical specification.

Table 2. Terminal Descriptions

TERMINAL DIRECTION DESCRIPTION

VBAT (TP1) and Vbat_GND (TP2) Input

VOUT (TP3) and Vout_GND (TP4) Output

(1)

The initial startup voltage is 5.3 V (typical).

(2)

In boost-mode and for higher output voltages, the maximum output current is decreased. For details, refer to the TPS5516x-Q1

36-V, 1-A Output, 2-MHz, Single Inductor, Synchronous Step-Up and Step- Down Voltage Regulator data sheet .

Setup and Operation

These terminals are the supply-voltage
input for the buck-boost converter. The
terminals accept an input voltage between
2 V and 36 V.

VOUT is the output voltage of the buck­boost regulator and supplies 5V or 12V for
the TPS55165-Q1 device, depending on
the Vout_Set setting.
For the TPS55160-Q1 device, the default
output voltage is 8V. The selection of the
R6 and R7 resistors determines the output
voltage.
The device delivers a maximum output
current of 1 A in buck-mode for a 5-V
output.

(1)

(2)

Figure 16. TPS55165Q1-EVM Showing Supply and Load Connections

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Setup and Operation

3.2 Jumper Configuration

3.2.1 IGN

The IGN jumper enables the device. By default, this jumper is set to the ONposition. Put this jumper in the
OFFposition to disable the output.

NOTE: The enable and disable thresholds of this pin are higher than the minimum supply voltage

(VBAT) that this pin is tied to. The boost itself supports a VBAT supply voltage of 2 V, but the
device is disabled if the IGN pin is connected to the VBAT pin. To prevent a shutdown event
in this scenario, apply a voltage higher than 3.7 V to the center pin of this jumper or keep the
device latched (set the IGN_PWRL jumper to LATCH).

Default: ON (Device powers up when power is applied)

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Figure 17. Ignition Jumper Configuration

3.2.2 IGN_PWRL

The IGN_PWRL jumper keeps the device on even if the IGN pin goes low (power-latch function) after the
device is enabled by a high signal on the IGN pin. The IGN_PWRL jumper resembles an external MCU
signal to keep the TPS5516x-Q1 on after the IGN pin goes low. The default setting of this jumper is
LATCH. To disable the latch, move the jumper to UNLATCH.

NOTE: This pin does not enable the device. To activate the regulator, set the IGN to ON (see the

IGN description in Section 3.2.1). The purpose of the IGN_PWRL jumper is only as a keep-
alive to keep the device on.

3.2.3 SS_EN

The SS_EN jumper selects if spread-spectrum modulation is enabled. If enabled, spread-spectrum
modulation reduces the harmonic peak amplitude. The default of this jumper is DIS-ABLED (spread
spectrum disabled). The jumper is installed by default.

Figure 18. Power-Latch Jumper Configuration

Default: LATCH

NOTE: Spread spectrum modulation is only active in normal mode when the device is in step-down

(buck) operation.
To make a jumper change effective, power cycle the supply or turn off the output (move the

IGN jumper to OFF while the device is unlatched).

12

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3.2.4 PG_DLY

The PG_DLY jumper sets the power-good delay time. This time defines how long before the power-good
pin (PG pin, TP3) goes low after the output voltage decreases to less than the PG undervoltage threshold
(PGTH_UV). The default of this jumper is 3ms (no jumper installed).

Setup and Operation

Figure 19. Spread Spectrum Enable Jumper Configuration

Default: Jumper Installed, Spread Spectrum Disabled

3.2.5 PS

The PS jumper selects between low-power mode (LPM) and pulse-width modulation (PWM). The default
of this jumper is PWM.

3.2.6 Vout_Set

The Vout_Set jumper selects the output voltage for the TPS5516x-Q1 device. For the TPS55165-Q1
device, the default of this jumper is 5V. Move this jumper to 12V select the 12-V output voltage. If no
jumper is installed, the output voltage defaults to 5 V.

NOTE: To make a jumper change effective, power cycle the supply or turn off the output (move the

Figure 20. Power-Good Delay Selection Jumper Configuration

Default: Jumper Not Installed, 3-ms Delay

Figure 21. Low-Power-Mode Enable Jumper Configuration

Default: Jumper Set to PWM, LPM Prohibited

IGN jumper to OFF while the device is unlatched).

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Setup and Operation

The TPS55160-Q1 variant does not have this jumper installed because the output voltage is set by the
resistive divider formed by the R6 and R7 resistors on the bottom side of the board. The installed
components set the output voltage to 8 V.

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Figure 22. Output Voltage Selection Jumper Configuration

Default: 5 V for TPS55165-Q1

Figure 23. Output Voltage Selection Jumper Configuration

Default: 8 V for TPS55160-Q1, Configured by R6 and R7

3.3 Test Point Description

The test points are defined as:

TP5 (PG)— This test point measures the power-good output of the buck-boost converter.
TP6 (VREG)— This test point measures the internal voltage on the VREG pin of the device.
TP7 (GND)— Connect ground-test leads to this test point for sensitive measurements.

The output voltage can be measured at the turrets provided for the output.

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3.4 Basic Operation

The input voltage range for the converter is from 2 V to 36 V (5.3 V typical minimum for initial start-up).
For operation of TPS5516xQ1-EVM, configure the jumpers in the default configuration:

• IGN = ON

• IGN_PWRL = Irrelevant as long as the IGN jumper is set to ON (the default of the IGN_PWRL jumper
is LATCH)

• SS_EN = Irrelevant for basic operation (default: jumper installed, SS disabled)

• PG_DLY = Irrelevant for basic operation (default: jumper not installed, 3 ms delay)

• PS = PWM

• Vout_Set = (TPS55165-Q1-variant only) Desired output voltage (set this jumper before setting the IGN
jumper to ON; the default of the Vout_Set jumper is 5 V for the TPS55165-Q1)

If input voltage is present, the EVM with this configuration delivers an output voltage of 5 V for the
TPS55165-Q1 device and 8 V for the TPS55160-Q1 device.

NOTE: In buck mode, the TPS5516x-Q1 device can drive up to 1 A. In boost mode, the maximum

output current scales with the input and output voltage (refer to the TPS5516x-Q1 36-V, 1-A

Output, 2-MHz, Single Inductor, Synchronous Step-Up and Step-Down Voltage Regulator

data sheet).

To change the output voltage on the TPS55165Q1-EVM, follow these steps:

1. Power down the device.

2. Move the Vout_Set jumper to the new position.

3. Power up the device.

The output voltage can also be changed by following these steps on the TPS55165Q1-EVM:

1. Move the IGN jumper to the OFF setting while the device is unlatched.

2. Move the Vout_Set jumper to the new position.

3. Move the IGN jumper to the ON setting.
If the jumper moves while power is applied and the IGN pin is high or latched, the change in output

voltage does not take effect.

To change the output voltage for the adjustable TPS55160-Q1 device, change the resistive divider. Use

Equation 1 to calculate the resistor values to change the output voltage.

Setup and Operation

Assuming the desired output voltage is 8 V and R7 is chosen as 10 kΩ, the value of the R6 resistor is
calculated for a desired output voltage as shown in Equation 2.

NOTE: To allow for a suitable feedback current, the total divider resistance must not exceed 1 MΩ.

If the IGN jumper is moved to the OFF position, the device turns off the output if the the IGN_PWRL
jumper is unlatched. To keep the device active when the IGN goes low, set the IGN_PWRL jumper to the
LATCH position.

If the the IGN_PWRL jumper is latched, the output remains active until the power supply is turned off or
the IGN_PWRL jumper is moved to the UNLATCH position while the IGN pin is low.

After the supply is turned on, move the IGN jumper to the ON position to turn on the output again, even if
the IGN_PWRL jumper is latched.

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(1)

(2)

15

Converter

Load Current (A)

Efficiency

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

0

10%

20%

30%

40%

50%

60%

70%

80%

90%

100%

D001

36-V Supply Voltage
18-V Supply Voltage
12-V Supply Voltage
5-V Supply Voltage
3-V Supply Voltage

Load Current (A)

Efficiency

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

0

10%

20%

30%

40%

50%

60%

70%

80%

90%

100%

D002

36-V Supply Voltage
18-V Supply Voltage
12-V Supply Voltage
9-V Supply Voltage
5-V Supply Voltage
4-V Supply Voltage

Typical Performance

The default configuration disables spread-spectrum modulation. To mitigate emissions enable spread­spectrum modulation by removing the jumper on SS_EN and power cycling or turning off and on the IGN
jumper while unlatched.

The PG_DLY jumper sets the delay time of the PG output. The default is 3 ms. The PG delay time can be
decreased 0.6 ms or increased 40 ms. To change the PG delay time, install the jumper in the respective
position. This configuration refers to the PG
Single Inductor, Synchronous Step-Up and Step-Down Voltage Regulator). The PG pin is not asserted low
if the output voltage decreases to less than the PGTH_UV threshold for a time shorter than the PG
time. If the supply voltage is decreased, follow the limited output current constraints for a given input­voltage to output-voltage ratio (for details refer to the TPS5516x-Q1 36-V, 1-A Output, 2-MHz, Single
Inductor, Synchronous Step-Up and Step-Down Voltage Regulator).

For shutdown, no special requirements apply.

4 Typical Performance

4.1 Efficiency

Figure 24 and Figure 25 show the graphs for typical efficiency.

time (refer to the TPS5516x-Q1 36-V, 1-A Output, 2-MHz,

exttime

www.ti.com

exttime

Figure 24. Typical Efficiency for 5-V Output Figure 25. Typical Efficiency for 12-V Output

4.2 Startup Waveforms

Figure 26 and Figure 27 show the typical startup behavior for a 5-V output.

Figure 26. Startup When VIN is Already Present and IGN is

Pulled High

16

TPS5516xQ1-EVM Evaluation Module for 1-A Single-Inductor Buck-Boost­Converter

Figure 27. Startup With IGN Tied to VIN and Both Ramp Up

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Typical Performance

4.3 Switch Node Waveforms in Buck Mode, Boost Mode, and in Buck-Boost Mode

The following graphs show the switch-nodes in the various modes. The modes are determined by the ratio
of input voltage to output voltage. In buck mode and boost mode, the device switches at 2 MHz. In buck­boost, both nodes switch interleaved, resulting in a 1-MHz switching frequency per node.

Figure 28. Switch-Nodes in Buck Mode (V

5 V)

Figure 30. Switch-Nodes in Boost Mode (V

= 12 V, V

VIN

VOUT

=

Figure 29. Switch-Nodes in Buck-Boost-Mode (V

V

= 5 V)

VOUT

= 2.5 V, V

VIN

VOUT

= 5 V)

VIN

= 5 V,

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Typical Performance

4.4 Load-Step Response

The following graphs show the load-step responses as taken on the EVM.

NOTE: Different slew-rates, capacitive loading, filtering, and other setups can result in different

results (for example, ramp times of several 100 µs decrease the dips to « 100 mV).

www.ti.com

V

VIN

V

VIN

= 12 V, V

= 14 V, V

Figure 31. Load-Step Response

= 5 V (Buck Mode), 100 mA-1 A-100 mA

VOUT

Figure 33. Load-Step Response

= 12 V (Buck Mode), 100 mA-800 mA-100

VOUT

mA

V

VIN

V

VIN

= 2.5 V, V

= 12 V, V

Figure 32. Load-Step Response

= 5 V (Boost Mode), 50 mA-400 mA-50

VOUT

mA

Figure 34. Load-Step Response

= 12 V (Buck-Boost Mode), 100 mA-600

VOUT

mA-100 mA

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Figure 35. Load-step-response

V

= 4 V, V

VIN

= 12 V (Boost Mode), 50 mA-150 mA-50 mA

VOUT

4.5 Line step response / Cranking support

The following graphs show the response of the part to the cold-crank pulse as defined in the OEM
specification LV124. The pulse decreases to 3 V, followed by some ringing before recovering to normal
input voltage.

These graphs are with a 5-V output at 200-mA load.

Typical Performance

Figure 36. Cranking Pulse Response With 5-V Output, 200-

mA Load, 2 s/div

Figure 38. Cranking Pulse Response With 5-V Output, 200-

mA Load, Zoom to 5 ms/div

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Figure 37. Cranking Pulse Response With 5-V Output, 200-

Figure 39. Cranking Pulse Response With 5-V Output, 200-

TPS5516xQ1-EVM Evaluation Module for 1-A Single-Inductor Buck-Boost-

Copyright © 2017, Texas Instruments Incorporated

mA Load, Zoom to 100 ms/div

mA load, Zoom to 200 µs/div

19

Converter

Related Documentation

5 Related Documentation

Texas Instruments, TPS5516x-Q1 36-V, 1-A Output, 2-MHz, Single Inductor, Synchronous Step-Up and

Step-Down Voltage Regulator data sheet

www.ti.com

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STANDARD TERMS FOR EVALUATION MODULES

1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.

2 Limited Warranty and Related Remedies/Disclaimers:

2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.

2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.

3 Regulatory Notices:

3.1 United States

3.1.1 Notice applicable to EVMs not FCC-Approved:

FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.

3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:

CAUTION

This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.

Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.

FCC Interference Statement for Class A EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.

FCC Interference Statement for Class B EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and receiver.

• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

• Consult the dealer or an experienced radio/TV technician for help.

3.2 Canada

3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247

Concerning EVMs Including Radio Transmitters:

This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may

cause undesired operation of the device.

Concernant les EVMs avec appareils radio:

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.

Concerning EVMs Including Detachable Antennas:

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.

Concernant les EVMs avec antennes détachables

Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur

3.3 Japan

3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に

輸入される評価用キット、ボードについては、次のところをご覧ください。

http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page

3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.

If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the
instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs
(which for the avoidance of doubt are stated strictly for convenience and should be verified by User):

1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,

2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or

3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.

【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。

1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。

2. 実験局の免許を取得後ご使用いただく。

3. 技術基準適合証明を取得後ご使用いただく。

なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。

上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル

3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page

電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/

/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page

3.4 European Union

3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive):
This is a class A product intended for use in environments other than domestic environments that are connected to a

low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this
product may cause radio interference in which case the user may be required to take adequate measures.

4 EVM Use Restrictions and Warnings:

4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.

4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.

4.3 Safety-Related Warnings and Restrictions:

4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.

4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.

4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.

5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.

6. Disclaimers:

6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT
LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL
FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT
NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE
SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.

6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE
CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR
INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE
EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR
IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED.

7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY
WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL
THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.

8. Limitations on Damages and Liability:

8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS OR THE USE OF THE EVMS , REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR
REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING,
OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF
USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI
MORE THAN TWELVE (12) MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS
OCCURRED.

8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY USE OF AN EVM PROVIDED
HEREUNDER, INCLUDING FROM ANY WARRANTY, INDEMITY OR OTHER OBLIGATION ARISING OUT OF OR IN
CONNECTION WITH THESE TERMS, , EXCEED THE TOTAL AMOUNT PAID TO TI BY USER FOR THE PARTICULAR
EVM(S) AT ISSUE DURING THE PRIOR TWELVE (12) MONTHS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE
CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT.

9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.

10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Copyright © 2017, Texas Instruments Incorporated

IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES

Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to,
reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are
developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you
(individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of
this Notice.

TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources.

You understand and agree that you remain responsible for using your independent analysis, evaluation and judgment in designing your
applications and that you have full and exclusive responsibility to assure the safety of your applications and compliance of your applications
(and of all TI products used in or for your applications) with all applicable regulations, laws and other applicable requirements. You
represent that, with respect to your applications, you have all the necessary expertise to create and implement safeguards that (1)
anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that
might cause harm and take appropriate actions. You agree that prior to using or distributing any applications that include TI products, you
will thoroughly test such applications and the functionality of such TI products as used in such applications. TI has not conducted any
testing other than that specifically described in the published documentation for a particular TI Resource.

You are authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include
the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO
ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.

TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING TI RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS.

TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY CLAIM, INCLUDING BUT NOT
LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF
DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL,
COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR
ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.

You agree to fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of your non­compliance with the terms and provisions of this Notice.

This Notice applies to TI Resources. Additional terms apply to the use and purchase of certain types of materials, TI products and services.
These include; without limitation, TI’s standard terms for semiconductor products http://www.ti.com/sc/docs/stdterms.htm), evaluation

modules, and samples (http://www.ti.com/sc/docs/sampterms.htm).

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Copyright © 2017, Texas Instruments Incorporated

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