Texas Instruments TPS54218EVM-511 2-A User Manual

User's Guide

SLVU331 – September 2009

TPS54218EVM-511 2-A, SWIFT™ Regulator Evaluation

Module

Contents

1 Introduction ................................................................................................................... 2

2 Test Setup and Results ..................................................................................................... 4

3 Board Layout ................................................................................................................ 10

4 Schematic and Bill of Materials ........................................................................................... 14

List of Figures

1 TPS54218EVM-511 Efficiency ............................................................................................. 5

2 TPS54218EVM-511 Low Current Efficiency ............................................................................. 5

3 TPS54218EVM-511 Load Regulation ..................................................................................... 6

4 TPS54218EVM-511 Line Regulation ...................................................................................... 6

5 TPS54218EVM-511 Transient Response ............................................................................... 7

6 TPS54218EVM-511 Loop Response ..................................................................................... 7

7 TPS54218EVM-511 Output Ripple ....................................................................................... 8

8 TPS54218EVM-511 Input Ripple ......................................................................................... 8

9 TPS54218EVM-511 Start-Up Relative to V

10 TPS54218EVM-511 Start-up Relative to Enable ....................................................................... 9

11 TPS54218EVM-511 Top-Side Layout ................................................................................... 10

12 TPS54218EVM-511 Bottom-Side Layout ............................................................................... 11

13 TPS54218EVM-511 Layout 2 ............................................................................................. 12

14 TPS54218EVM-511 Layout 3 ............................................................................................. 13

15 TPS54218EVM-511 Top-Side Assembly................................................................................ 14

16 TPS54218EVM-511 Schematic .......................................................................................... 15

............................................................................ 9

IN

1 Input Voltage and Output Current Summary ............................................................................. 2

2 TPS54218EVM-511 Performance Specification Summary ............................................................. 2

3 Output Voltages Available .................................................................................................. 3

4 EVM Connectors and Test Points ......................................................................................... 4

5 TPS54218EVM-511 Bill of Materials ..................................................................................... 16

SWIFT is a trademark of Texas Instruments.

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List of Tables

Introduction

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1 Introduction

This user's guide contains background information for the TPS54218 as well as support documentation for
the TPS54218EVM-511 evaluation module (HPA375). Also included are the performance specifications,
the schematic, and the bill of materials for the TPS54218EVM-511.

1.1 Background

The TPS54218 dc/dc converter is designed to provide up to a 2 A output from an input voltage source of

2.95 V to 6 V. Rated input voltage and output current range for the evaluation module are given in

Table 1 . This evaluation module is designed to demonstrate the small printed-circuit-board areas that may

be achieved when designing with the TPS54218 regulator. The switching frequency is externally set at a
nominal 1000 kHz. The high-side and low-side MOSFETs are incorporated inside the TPS54218 package
along with the gate drive circuitry. The low drain-to-source on resistance of the MOSFETs allow the
TPS54218 to achieve high efficiencies and helps keep the junction temperature low at high output
currents. The compensation components are external to the integrated circuit (IC), and an external divider
allows for an adjustable output voltage. Additionally, the TPS54218 provides adjustable slow start and
undervoltage lockout inputs. The absolute maximum input voltage is 7 V for the TPS54218EVM-511.

Table 1. Input Voltage and Output Current Summary

EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE

TPS54218EVM-511 VIN = 3 V to 6 V (VIN start = 3.1 V) 0 A to 2 A

1.2 Performance Specification Summary

A summary of the TPS54218EVM-511 performance specifications is provided in Table 2 . Specifications
are given for an input voltage of V
The TPS54218EVM-511 is designed and tested for V
all measurements, unless otherwise noted.

Table 2. TPS54218EVM-511 Performance Specification Summary

SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT

VINoperating voltage range 3 3.3 6 V
VINstart voltage 3.1 V
VINstop voltage 2.8 V
Output voltage set point 1.8 V
Output current range VIN= 3 V to 6 V 0 2 A
Line regulation IO= 1 A, VIN= 3 V to 6 V ± 0.06%
Load regulation VIN= 3.3 V, IO= 0 A to 2 A ± 0.04%

Load transient response

Loop bandwidth VIN= 3.3 V, IO= 2 A 45 kHz
Phase margin VIN= 3.3 V , IO= 2 A 58 °
Input ripple voltage IO= 2 A 100 mV
Output ripple voltage IO= 2 A 5 mV
Output rise time 4 ms
Operating frequency 1000 kHz
Maximum efficiency TPS54218EVM-511, VIN= 3.3 V, IO= 0.4 A 94.5%

= 3.3 V and an output voltage of 1.8 V, unless otherwise specified.

IN

IO= 0.5 A to 1.5 A

IO= 1.5 A to 0.5 A

= 3 V to 6 V. The ambient temperature is 25 ° C for

IN

Voltage change –20 mV
Recovery time 400 µ s
Voltage change 20 mV
Recovery time 400 µ s

PP
PP

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OUT

0.8 V

R7 = 100 kΩ ×

V - 0.8 V

Tss(mS) Iss( A)

C7(nF) =

Vref(V)

´ m

-

× -

´

START STOP

6

0.944 V V

R1 =

2.59 10

-

×

- + × ´

6

ST OP

1.18 R1

R2 =

V 1.1 8 R1 3 .2 1 0

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1.3 Modifications

These evaluation modules are designed to provide access to the features of the TPS54218. Some
modifications can be made to this module.

1.3.1 Output Voltage Set Point

The voltage divider R6 and R7 is used to set the output voltage. To change the output voltage of the EVM,
it is necessary to change the value of resistor R7. Changing the value of R7 can change the output
voltage above 0.8 V. The value of R7 for a specific output voltage can be calculated using Equation 1 .

Table 3 lists the R7 values for some common output voltages. Note that V

minimum on-time is greater than 80 ns, and the maximum duty cycle is less than 92%. The values given
in Table 3 are standard values, not the exact value calculated using Equation 1 .

Table 3. Output Voltages Available

Output Voltage (V) R7 Value (k Ω )

1.0 402

1.2 200

1.5 115

1.8 80.6

2.5 47.5

must be in a range so that the

IN

Introduction

(1)

1.3.2 Slow Start Time

The slow start time can be adjusted by changing the value of C7. Use Equation 2 to calculate the required
value of C7 for a desired slow start time

C7 is set to 0.01 µ F on the EVM for a default slowstart time of 4 msec.

1.3.3 Adjustable UVLO

The undervoltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start
voltage of 3.1 V and a stop voltage of 2.8 V using R1 = 48.8 k Ω and R2 = 32.4 k Ω . Use Equation 3 and

Equation 4 to calculate required resistor values for different start and stop voltages.

(2)

(3)

(4)

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Test Setup and Results

2 Test Setup and Results

This section describes how to properly connect, set up, and use the TPS54218EVM-511 evaluation
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.

2.1 Input / Output Connections

The TPS54218EVM-511 is provided with input/output connectors and test points as shown in Table 4 . A
power supply capable of supplying 2 A must be connected to J1 through a pair of 20 AWG wires. The load
must be connected to J4 through a pair of 20 AWG wires. The maximum load current capability must be at
least 2 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in the
wires. Test-point TP1 provides a place to monitor the V
ground reference. TP6 is used to monitor the output voltage with TP7 as the ground reference.

Reference Designator Function

input voltages with TP2 providing a convenient

IN

Table 4. EVM Connectors and Test Points

J1 VIN(see Table 1 for VINrange).
J2 2-pin header for enable. Connect EN to ground to disable, open to enable.
J3 2-pin header for to allow pull up of PWRGD to VIN.

J4 V
TP1 VINtest point at VINconnector.
TP2 GND test point at VIN.
TP3 PH test point
TP4 Slow start monitor test point.
TP5 Test point between voltage divider network and output. Used for loop response measurements.
TP6 Output voltage test point at OUT connector.
TP7 GND test point at OUT connector.

, 1.8 V at 4 A maximum.

OUT

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50

55

60

65

70

75

80

85

90

95

100

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

I -OutputCurrent- A

O

Efficiency-%

V =3.3V

I

V =5V

I

0

10

20

30

40

50

60

70

80

90

100

0.001 0.01 0.1 1 10

I -OutputCurrent- A

O

Efficiency-%

V =3.3V

I

Vin=5V

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Test Setup and Results

2.2 Efficiency

The efficiency of this EVM peaks at a load current of about 0.4 A – 0.7 A and then decreases as the load
current increases towards full load. Figure 1 shows the efficiency for the TPS54218EVM-511 at an
ambient temperature of 25 ° C.

Figure 1. TPS54218EVM-511 Efficiency

Figure 2 shows the efficiency for the TPS54218EVM-511 at lower output currents on a semi log scale at

an ambient temperature of 25 ° C.

Figure 2. TPS54218EVM-511 Low Current Efficiency

The efficiency may be lower at higher ambient temperatures, due to temperature variation in the
drain-to-source resistance of the internal MOSFET.

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-0.25

-0.2

-0.15

-0.1

-0.05

0

0.05

0.1

0.15

0.2

0.25

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

I -OutputCurrent- A

O

OutputVoltageChange-%

V =3.3V

I

1.79

1.792

1.794

1.796

1.798

1.8

1.802

1.804

1.806

1.808

1.81

3 3.5 4 4.5 5 5.5 6

V -InputVoltage-V

I

V -OutputVoltage-V

O

I =1

O

Test Setup and Results

2.3 Output Voltage Load Regulation

Figure 3 shows the load regulation for the TPS54218EVM-511.

Measurements are given for an ambient temperature of 25 ° C.

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Figure 3. TPS54218EVM-511 Load Regulation

2.4 Output Voltage Line Regulation

Figure 4 shows the line regulation for the TPS54218EVM-511.

TPS54218EVM-511 2-A, SWIFT™ Regulator Evaluation Module6 SLVU331 – September 2009

Figure 4. TPS54218EVM-511 Line Regulation

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