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TPS5420EVM-175
Technical data
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TEXAS INSTRUMENTS TPS5420EVM-175 Technical data

TPS5420EVM-175 SWIFT™ Regulator Evaluation Module
Contents
1 Introduction .......................................................................................... 1
2 Test Setup and Results ............................................................................ 3
3 Board Layout ........................................................................................ 8
List of Figures
1 Measured Efficiency, TPS5420 ................................................................... 4
2 Load Regulation .................................................................................... 4
3 Line Regulation ..................................................................................... 5
4 Load Transient Response, TPS5420 ............................................................ 5
5 Measured Loop Response, TPS5420, VIN = 25 V ............................................. 6
6 Measured Output Voltage Ripple, TPS5420 .................................................... 6
7 Input Voltage Ripple, TPS5420 ................................................................... 7
8 Power Up, VOUT Relative to VIN ............................................................... 7
9 Start-Up Waveform, VOUT Relative to ENA ................................................... 8
10 Top-Side Layout .................................................................................... 9
User's Guide
SLVU163 – April 2006
1 Input Voltage and Output Current Summary .................................................... 2
2 TPS5420EVM-175 Performance Specification Summary ..................................... 2
3 Output Voltages Available ......................................................................... 3
4 EVM Connectors and Test Points ................................................................ 3
5 TPS5420EVM-175 Bill of Materials ............................................................. 13

1 Introduction

This user's guide contains background information for the TPS5420 as well as support documentation for the TPS5420EVM-175 evaluation module (HPA175). Also included are the performance specifications, the schematic, and the bill of materials for the TPS5420EVM-175.

1.1 Background

The TPS5420 dc/dc converter is designed to provide up to a 2-A continuous, 3-A peak output from an input voltage source of 5.5 V to 36 V. Rated input voltage and output current range for the evaluation module is given in Table 1 . This evaluation module is designed to demonstrate the small printed-circuit-board areas that may be achieved when designing with the TPS5420 regulator and does not reflect the high input voltages that may be used when designing with this part. The switching frequency is internally set at a nominal 500 kHz. The high-side MOSFET is incorporated inside the
SWIFT, PowerPAD are trademarks of Texas Instruments.
List of Tables
SLVU163 – April 2006 TPS5420EVM-175 SWIFT™ Regulator Evaluation Module 1
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R2 10 k
1.221 V
VO 1.221 V
Introduction
TPS5420 package along with the gate drive circuitry. The low drain-to-source on resistance of the MOSFET allows the TPS5420 to achieve high efficiencies and helps to keep the junction temperature low at high output currents. The compensation components are provided internal to the integrated circuit (IC), whereas an external divider allows for an adjustable output voltage. Additionally, the TPS5420 provides an enable input. The absolute maximum input voltage is 36 V.
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS5420EVM-175 VIN = 10 V to 36 V 0 A to 2 A

1.2 Performance Specification Summary

A summary of the TPS5420EVM-175 performance specifications is provided in Table 2 . Specifications are given for an input voltage of VIN = 12 V and an output voltage of 5 V, unless otherwise specified. The TPS5420EVM-175 is designed and tested for VIN = 10 V to 36 V. The ambient temperature is 25 ° C for all measurements, unless otherwise noted. Maximum input voltage for the TPS5420EVM-175 is 36 V.
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN voltage range 10 36 V Output voltage set point 5.0 V Output current range VIN= 10 V to 36 V 0 2.5 A Line regulation IO= 1 A, VIN = 3 V - 6 V ± 0.11% Load regulation VIN = 25 V, IO= 0 A to 2.5 A ± 0.1% Load transient response Voltage change IO= 0.75 A to 2.25 A -40 mV
Loop bandwidth VIN = 25 V 25.0 kHz Phase margin VIN = 25 V 55 ° Input ripple voltage IO= 3 A 275 300 mVpp Output ripple voltage 32 mVpp Output rise time 7 ms Operating frequency 500 kHz Maximum efficiency VIN = 10 V, VO= 5 V, IO= 0.75 A 93.2%
Table 1. Input Voltage and Output Current Summary
Table 2. TPS5420EVM-175 Performance Specification Summary
Recovery time 200 µ s Voltage change IO= 2.25 A to 0.75 A +40 mV Recovery time 200 µ s

1.3 Modifications

1.3.1 Output Voltage Set Point

The TPS5420EVM-175 is designed to demonstrate the small size that can be attained when designing with the TPS5420. A few changes can be made to this module.
To change the output voltage of the EVM, it is necessary to change the value of resistor R2. Changing the value of R2 can change the output voltage above 1.25 V. The value of R2 for a specific output voltage can be calculated using Equation 1 .
Table 3 lists the R2 values for some common output voltages. Note that VIN must be in a range so that
the minimum on-time is greater than 200 ns, and the maximum duty cycle is less than 87%. The values given in Table 3 are standard values, not the exact value calculated using Equation 1 .
TPS5420EVM-175 SWIFT™ Regulator Evaluation Module2 SLVU163 – April 2006
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(1)
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1.3.2 Input Voltage Range

The EVM is designed to operate from a 10-V to 36-V input voltage range. The TPS5420 is specified to operate over an input voltage range of 5.5 V to 36 V.

2 Test Setup and Results

This section describes how to properly connect, set up, and use the TPS5420EVM-175 evaluation module. The section also includes test results typical for the TPS5420EVM-175 and covers efficiency, output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.

2.1 Input / Output Connections

The TPS5420EVM-175 is provided with input/output connectors and test points as shown in Table 4 . A power supply capable of supplying 2 A should be connected to J1 through a pair of 20 AWG wires. The load should be connected to J3 through a pair of 20 AWG wires. The maximum load current capability should be 2 A. Wire lengths should be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP3 is used to monitor the output voltage with TP4 as the ground reference.
Test Setup and Results
Table 3. Output Voltages Available
Output Voltage (V) R2 Value (k Ω )
1.8 21.5
2.5 9.53
3.3 5.90 5 3.24
Table 4. EVM Connectors and Test Points
Reference Designator Function
J1 VIN, 10 V to 36 V J2 OUT, 5 V at 2 A maximum
JP1 2-pin header for enable. Connect EN to ground to disable, open to enable. TP1 VIN test point at VIN connector TP2 GND test point at VIN TP3 Output voltage test point at OUT connector TP4 GND test point at OUT connector TP5 Test point between voltage divider network and R3. Used for loop response measurements. TP6 PH test point

2.2 Efficiency

The TPS5420EVM-175 efficiency peaks at load current of about 0.75 A, and then decreases as the load current increases towards full load. Figure 1 shows the efficiency for theTPS5420EVM-175 at an ambient temperature of 25 ° C. The efficiency is lower at higher ambient temperatures, due to temperature variation in the drain-to-source resistance of the MOSFETs.
SLVU163 – April 2006 TPS5420EVM-175 SWIFT™ Regulator Evaluation Module 3
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EFFICIENCY
vs
OUTPUT CURRENT
75
80
85
90
95
100
0
0.5
1
1.5 2
I - Output Current - A
O
Efficiency - %
V = 10 V
IN
V = 15 V
IN
V = 20 V
IN
V = 25 V
IN
V = 30 V
IN
V = 36 V
IN
LOAD REGULATION
vs
OUTPUT CURRENT
-0.30
-0.20
-0.10
0
0.10
0.20
0.30
0 0.5 1 1.5 2
I - Output Current - A
O
Output Regulation - %
Test Setup and Results
Figure 1. Measured Efficiency, TPS5420

2.3 Output Voltage Regulation

The output voltage load regulation of the TPS5420EVM-175 is shown in Figure 2 ; the output voltage line regulation is shown in Figure 3 . Measurements are given for an ambient temperature of 25 ° C.
Figure 2. Load Regulation
4 TPS5420EVM-175 SWIFT™ Regulator Evaluation Module SLVU163 – April 2006
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LINE REGULATION
vs
INPUT VOLTAGE
-0.30
-0.20
-0.10
0
0.10
0.20
0.30
10 12 14 16 18
20 22 24 26 28 30 32 34 36
V - Input Voltage - A
I
Output Regulation - %
I = 1 A
O
I = 0 A
O
I = 2 A
O
t - Time = 200 μs/Div
I A/Div
OUT
= 500 m
V
OUT
= 50 mV/Div (AC Coupled)
Figure 3. Line Regulation
Test Setup and Results

2.4 Load Transients

The TPS5420EVM-175 response to load transients is shown in Figure 4 . The current step is from 25% to 75% of maximum rated load. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output.
Figure 4. Load Transient Response, TPS5420
SLVU163 – April 2006 TPS5420EVM-175 SWIFT™ Regulator Evaluation Module 5
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