Texas Instruments TPS51217DSCR Schematic [ru]

TRAN

VFB

EN

TRIP

DRVL

SW

DRVH

GND

PGOOD

VBST

1

3

4

5

2

6

10

7

8

9

V5IN

EN

VID1

VID0

V5IN

TPS51217

V

IN

V

OUT

V _GND

OUT

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HIGH PERFORMANCE, SINGLE SYNCHRONOUS STEP-DOWN

CONTROLLER FOR NOTEBOOK POWER SUPPLY

Check for Samples: TPS51217

1

FEATURES

2

• Wide Input Voltage Range: 3 V to 28 V

• Output Voltage Range: 0.6 V to 2.6 V

• Wide Output Load Range: 0 to 20A+

• Built-in 0.5% 0.6 V Reference

• D-CAP™ Mode with 100-ns Load Step
Response

• Adaptive On Time Control Architecture with
Fixed 340kHz Operation

• Dynamic Output Voltage Change Capability

• 4700 ppm/°C R

• Internal 0.9-ms Voltage Servo Softstart

• Pre-Charged Start-up Capability

• Built-in Output Discharge

• Power Good Output

• Integrated Boost Switch

• Built-in OVP/UVP/OCP

• Thermal Shutdown (Non-latch)

• SON-10 (DSC) Package

Current Sensing

DS(on)

TPS51217

SLUS947B –JUNE 2009–REVISED APRIL 2012

DESCRIPTION

The TPS51217 is a small-sized single buck controller
with adaptive on-time D-CAP™ mode. The device is
suitable for low output voltage, high current, PC
system power rail and similar point-of-load (POL)
power supply in digital consumer products. A small
package with minimal pin-count saves space on the
PCB, while a dedicated EN pin and pre-set frequency
minimize design effort required for new designs. The
skip-mode at light load condition, strong gate drivers
and low-side FET R
low-loss and high efficiency, over a broad load range.
The TRAN pin provides freedom of masking
overvoltage protection, undervoltage protection and
power-good signal during the transition period of
dynamic output voltage change for modern GPU
power supply applications. The conversion input
voltage which is the high-side FET drain voltage
ranges from 3 V to 28 V and the output voltage
ranges from 0.6 V to 2.6 V. The device requires an
external 5-V supply. The TPS51217 is available in a
10-pin SON package specified from –40°C to 85°C.

current sensing supports

DS(on)

APPLICATIONS

• Notebook Computers

• I/O Supplies

• System Power Supplies

TYPICAL APPLICATION CIRCUIT

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2D-CAP is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2009–2012, Texas Instruments Incorporated

TPS51217

SLUS947B –JUNE 2009–REVISED APRIL 2012

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

T

A

–40°C to 85°C Plastic SON PowerPAD

PACKAGE ORDERING DEVICE NUMBER PINS OUTPUT SUPPLY

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ORDERING INFORMATION

MINIMUM

QUANTITY

TPS51217DSCR 10 Tape and reel 3000
TPS51217DSCT 10 Mini reel 250

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range (unless otherwise noted)

VALUE

MIN MAX UNIT

VBST –0.3 37

(3)

Input voltage range

Output voltage range

Junction temperature range, T
Storage temperature range, T

(2)

(2)

J

STG

VBST
SW –5 30
V5IN, EN, TRIP, VFB, TRAN –0.3 7
DRVH –5 37

(3)

DRVH

(3)

DRVH

, pulse wiidth < 20 ns –2.5 7
DRVL –0.5 7
DRVL, pulse width < 20 ns –2.5 7
PGOOD –0.3 7

–0.3 7

–0.3 7

150 °C

–55 150 °C

V

V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal unless otherwise noted.
(3) Voltage values are with respect to the SW terminal.

DISSIPATION RATINGS

2-oz. trace and copper pad with solder.

PACKAGE

10 pin DSC

(1)

(1) Enhanced thermal conductance by thermal vias is used beneath thermal pad as shown in Land Pattern information.

TA< 25°C DERATING FACTOR TA= 85°C

POWER RATING ABOVE TA= 25°C POWER RATING

1.54 W 15 mW/°C 0.62 W

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TPS51217

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RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

Supply voltage V5IN 4.5 6.5 V

VBST –0.1 34.5
SW –1 28

Input voltage range SW

Output voltage range DRVH

Operating free-air temperature, T

(1) This voltage should be applied for less than 30% of the repetitive period.
(2) Voltage values are with respect to the SW terminal.

(1)

(2)

VBST
EN, TRIP, VFB, TRAN –0.1 6.5
DRVH –1 34.5

(1)

DRVH

(2)

DRVL –0.3 6.5
PGOOD –0.1 6.5

A

ELECTRICAL CHARACTERISTICS

over recommended free-air temperature range, V5IN = 5V. (Unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SUPPLY CURRENT

I

(V5IN)

I

SD(V5IN)

V5IN supply current 320 500 μA
V5IN shutdown current V5IN current, TA= 25°C, No Load, V

INTERNAL REFERENCE VOLTAGE

V

(VFB)

I

(VFB)

VFB regulation voltage

VFB input current V

OUTPUT DISCHARGE

I

Dischg

Output discharge current from
SW pin

OUTPUT DRIVERS

R

(DRVH)

R

(DRVL)

t

D

DRVH resistance

DRVL resistance

Dead time ns

BOOT STRAP SWITCH

V

(FBST)

I

lkg

Forward voltage V
VBST leakage current V

DUTY AND FREQUENCY CONTROL

t

OFF(min)

t

ON(min)

f

SW

Minimum off-time TA= 25°C 150 260 400
Minimum on-time VIN= 28 V, V
Switching frequency TA= 25°C

(1) Specified by design. Not production tested.
(2) Not production tested. Test condition is VIN= 8 V, V

V5IN current, TA= 25°C, No Load,
V

= 5 V, V

(EN)

VFB voltage, CCM condition

(VFB)

= 0.63 V

= 0 V 1 μA

(EN)

(1)

TA= 25°C, skip mode 0.6000 0.6030 0.6060
TA= 0°C to 85°C, skip mode 0.5974 0.6030 0.6086 V
TA= –40°C to 85°C, skip mode 0.5960 0.6030 0.6100

= 0.63 V, TA= 25°C, skip mode 0.01 0.2 μA

(VFB)

V

= 0 V, V

(EN)

Source, I
Sink, I

(DRVH)

Source, I
Sink, I

(DRVL)

(DRVH)

(DRVL)

= 0.5 V 5 13 mA

(SW)

= –50 mA 1.5 3

= 50 mA 0.7 1.8

= –50 mA 1.0 2.2

= 50 mA 0.5 1.2
DRVH-off to DRVL-on 7 17 30
DRVL-off to DRVH-on 10 22 35

(V5IN-VBST)
(VBST)

, IF= 10 mA, TA= 25°C 0.1 0.2 V

= 34.5 V, V

OUT

(2)

= 1.1 V, I

OUT

= 28 V, TA= 25°C 0.01 1.5 μA

(SW)

= 0.6 V, TA= 25°C

= 10A using the application circuit shown in Figure 26.

OUT

(1)

SLUS947B –JUNE 2009–REVISED APRIL 2012

MIN TYP MAX UNIT

–4 28 V

–0.1 6.5

-4 34.5

–0.1 6.5 V

–40 85 °C

0.6000 V

86

312 340 368 kHz

Ω

ns

Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 3

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TPS51217

SLUS947B –JUNE 2009–REVISED APRIL 2012

ELECTRICAL CHARACTERISTICS (continued)

over recommended free-air temperature range, V5IN = 5V. (Unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SOFTSTART

t

SS

POWERGOOD

V

(THPG)

I

(PG)max

t

PGDEL

LOGIC THRESHOLD AND SETTING CONDITIONS

V

(EN)

I

(EN)

V

(TRAN)

I

(TRAN)

PROTECTION: CURRENT SENSE

I

(TRIP)

V

(TRIP)

V

OCL

V

OCLN

V

AZCADJ

PROTECTION: UVP AND OVP

V

(OVP)

t

OVPDEL

V

(UVP)

t

UVPDEL

t

UVPEN

UVLO

THERMAL SHUTDOWN

T

SDN

Internal soft-start time From V

= high to V

(EN)

= 95% 0.9 ms

OUT

PG in from lower 92.5% 95% 97.5%

PG threshold PG in from higher 107.5% 110% 112.5%

PG hysteresis 2.5% 5% 7.5%

PG sink current V

= 0.5 V 3 6 mA

(PGOOD)

PG delay Delay for PG in 0.8 1 1.2 ms

EN voltage V

EN input current V

Enable 1.8
Disable 0.5

= 5V 1.0 μA

(EN)

TRAN open 1.83 1.88 1.93

TRAN voltage V

Mask PG, OVP and UVP, high side 2.03 2.08 2.13
Mask PG, OVP and UVP, low side 1.62 1.67 1.72
Hysteresis 0.05
V

= 5 V, TA= 25°C 2.5 3.8 5

TRAN input current μA

TRIP source current V
TRIP current temperature

coefficient
Current limit threshold setting

range

Current limit threshold V

Negative current limit threshold V

Adaptive zero cross adjustable
range

(TRAN)

V

= 0 V, TA= 25°C –5 –3.8 –2.5

(TRAN)

= 1V, TA= 25°C 9 10 11 μA

(TRIP)

On the basis of 25°C 4700 ppm/°C

V

(TRIP-GND)

V

(TRIP)
(TRIP)

V

(TRIP)

V

(TRIP)
(TRIP)

V

(TRIP)

voltage 0.2 3 V

= 3 V 355 375 395
= 1.6 V 185 200 215 mV
= 0.2 V 17 25 33
= 3 V –395 –375 –355
= 1.6 V –215 –200 –185 mV

= 0.2 V –33 –25 –17
Positive 3 15
Negative –15 –3

OVP trip threshold OVP detect 115% 120% 125%
OVP propagation delay time 50-mV overdrive 1 μs
Output UVP trip threshold UVP detect 65% 70% 75%
Output UVP propagation delay 0.8 1 1.2 ms
Output UVP enable delay time From Enable to UVP workable 1 1.2 1.4 ms

V5IN UVLO threshold V

Thermal shutdown threshold °C

Wake up 4.20 4.38 4.50
Shutdown 3.7 3.93 4.1

Shutdown temperature
Hysteresis

(3)

(3)

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mV

145

10

(3) Specified by design. Not production tested.

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Product Folder Link(s) :TPS51217

1

2

3

4

5

10

9

8

7

6

PGOOD

TRIP

EN

VFB

TRAN

VBST

DRVH

SW

V5IN

DRVL

GND

DSCPACKAGE

(TOP VIEW)

TPS51217DSC

(TRIP)

OCL

V

V

8

=

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SLUS947B –JUNE 2009–REVISED APRIL 2012

DEVICE INFORMATION

Thermal pad is used as an active terminal of GND.

PIN FUNCTIONS

PIN

NAME NO.

DRVH 9 O

DRVL 6 O
EN 3 I SMPS enable pin. Short to GND to disable the device.
GND I Ground

PGOOD 1 O voltage. Continuous current capability is 1 mA. PGOOD goes high 1 ms after VFB becomes within

SW 8 I

TRAN 5 I

TRIP 2 I

Thermal

Pad

I/O DESCRIPTION

High-side MOSFET driver output. The SW node referenced floating driver. The gate drive voltage is
defined by the voltage across VBST to SW node bootstrap flying capacitor

Synchronous MOSFET driver output. The GND referenced driver. The gate drive voltage is defined by
V5IN voltage.

Power Good window comparator open drain output. Pull up with resistor to 5 V or appropriate signal
specified limits. Power bad, or the terminal goes low, after a 2- μs delay.

Switch node. A high-side MOSFET gate drive return. Also used for on time generation and output
discharge.

Dynamic voltage change control. It forces CCM and masks PGOOD, OVP and UVP when this pin's status
is pulled up or pulled down. The masking is terminated 900 μs after TRAN pin voltage returns to normal.
See the DYNAMIC VOLTAGE STEP and PGOOD/OVP/UVP MASK section for a detailed description.
Leave this pin open when dynamic voltage change is not used.

OCL detection threshold setting pin. 10 μA at room temperature, 4700 ppm/°C current is sourced and set
the OCL trip voltage as follows.

(0.2 V ≤ V

(TRIP)

≤ 3 V)

TPS51217

V5IN 7 I 5 V +30% / –10% power supply input.
VBST 10 I
VFB 4 I SMPS feedback input. Connect the feedback resistor divider.

Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 5

Supply input for high-side MOSFET driver (bootstrap terminal). Connect a flying capacitor from this pin to
the SW pin. Internally connected to V5IN via bootstrap MOSFET switch.

Product Folder Link(s) :TPS51217

­+
+

-

+

VBST

DRVH

SW

DRVL

EN

VFB

Enable /

Softstart

Control

PWM

OCP

ZC

0.6V + 10%/15%

0.6V - 5%/10%

0.6V

Delay

0.6 V - 30%

0.6 V + 20%

XCON

V5IN

Ramp
Comp

TRIP

X (-1/8)

X 1/8

TonOne-Shot

PGOOD

-

+

-

+

-

+

ControlLogic

UV

OV

Auto-skip / FCCM

10 mA

GND

-

+

-

+

FCCM

Auto-skip

TRAN

1.88 V

0.21 V/0.16 V

0.2V/0.15V

Delay

Auto-skip / FCCM

+/-3.8 mA

TPS51217

TPS51217

SLUS947B –JUNE 2009–REVISED APRIL 2012

www.ti.com

FUNCTIONAL BLOCK DIAGRAM

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Product Folder Link(s) :TPS51217

–50

200

0

0

50 100 150

600

400

1000

800

V

(V5IN)

= 5 V

V

(EN)

= 5 V

V

(VFB)

= 0.63 V

No Load

TJ– Junction Temperature – °C

I

(V5IN)

– V5IN Supply Current – mA

–50

0

0 50 100 150

TJ– Junction Temperature – °C

4

12

8

20

16

I

SD(V5IN)

– V5IN Shutdown Current – mA

10

6

18

14

2

V

(V5IN)

= 5 V

V

(EN)

= 0 V

No Load

–50

0

0 50 100 150

TJ– Junction Temperature – °C

150

V

(OVP)

/ V

(UVP)

– OVP/UVP Trip Threshold – %

50

100

OVP

V

(V5IN)

= 5 V

UVP

–50 0 50 100 150

TJ– Junction Temperature – °C

V

(V5IN)

= 5 V

V

(TRIP)

= 1 V

0

4

12

8

20

16

I

(TRIP)

– Current Sense Current – mA

10

6

18

14

2

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TPS51217

SLUS947B –JUNE 2009–REVISED APRIL 2012

TYPICAL CHARACTERISTICS

V5IN SUPPLY CURRENT V5IN SHUTDOWN CURRENT

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 1. Figure 2.

OVP/UVP THRESHOLD CURRENT SENSE CURRENT, I

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 3. Figure 4.

(TRIP)

Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 7

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-10

-8

-6

-4

-2

0

I -TranInputCurrent- A

(TRAN)

m

-50 0 50 100 150
T -JunctionTemperature-°C

J

V =5V,

V =0V

(V5IN)

(TRAN)

-50 0 50 100 150
T -JunctionTemperature-°C

J

0

2

4

6

8

10

I -TranInputCurrent- A

(TRAN)

m

V =5V,

V =5V

(V5IN)

(TRAN)

0.1

1

10

100

1000

0.001 0.01 0.1 1 10 100

I -OutputCurrent- A

OUT

f -SwithchingFrequency-kHz

sw

Auto-Skip
V =12V,

V =1.2V

IN

OUT

6 8 10 12 14 16 18 20 22

V -InputVoltage-V

IN

200

250

300

350

400

450

500

f -SwithchingFrequency-kHz

sw

Auto-Skip
V =1.2V,

I =10 A

OUT

OUT

TPS51217

SLUS947B –JUNE 2009–REVISED APRIL 2012

TYPICAL CHARACTERISTICS (continued)

TRAN INPUT CURRENT, I

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

(TRAN)

TRAN INPUT CURRENT, I

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(TRAN)

Figure 5. Figure 6.

SWITCHING FREQUENCY SWITCHING FREQUENCY

vs vs

INPUT VOLTAGE OUTPUT CURRENT

Figure 7. Figure 8.

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0.001 0.01 0.1 1 10 100
I -OutputCurrent- A

OUT

0.88

0.89

0.90

0.91

0.92

V -OutputVoltage-V

OUT

Auto-Skip
V =12V,

V =0.9V

IN

OUT

1.17

1.18

1.19

1.20

1.21

1.22

1.23

V -OutputVoltage-V

OUT

0.001 0.01 0.1 1 10 100
I -OutputCurrent- A

OUT

Auto-Skip
V =12V,

V =1.2V

IN

OUT

0.88

0.89

0.90

0.91

0.92

V -OutputVoltage-V

OUT

6 8 10 12 14 16 18 20 22

V -InputVoltage-V

IN

I =20 A

OUT

I =0 A

OUT

Auto-Skip
V =0.9V

OUT

1.17

1.18

1.19

1.20

1.21

1.22

1.23

I =20 A

OUT

I =0 A

OUT

V -OutputVoltage-V

OUT

6 8 10 12 14 16 18 20 22

V -InputVoltage-V

IN

Auto-Skip
V =1.2V

OUT

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TPS51217

SLUS947B –JUNE 2009–REVISED APRIL 2012

TYPICAL CHARACTERISTICS (continued)

0.9-V OUTPUT VOLTAGE 1.2-OUTPUT VOLTAGE
vs vs

OUTPUT CURRENT OUTPUT CURRENT

Figure 9. Figure 10.

0.9-OUTPUT VOLTAGE 1.2-V OUTPUT VOLTAGE
vs vs

INPUT VOLTAGE INPUT VOLTAGE

Figure 11. Figure 12.

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