Texas Instruments TPS51125 Schematic [ru]

7

8

9

10

24

23

22

21

VO1

PGOOD

VBST1

DRVH1

VO2

VREG3

VBST2

DRVH2

TPS51125RGE

11

12

20

19

LL1

DRVL1

LL2

DRVL2

13 14 15 16 17 18

EN0

SKIPSEL

GND

VIN

VREG5

VCLK

6 5 4 3 2 1

ENTRIP2

VFB2

TONSEL

VREF

VFB1

ENTRIP1

PowerPAD

220 nF

20 kW 20 kW 30 kW

100 kW

VREG5

33 Fm

5.1W

0.1 Fm

130 kW130 kW

3.3 Hm

330 Fm

VO1

5 V

VIN

VREG5

VIN

10 F x 2m

VIN

5.5 V
to

28 V

EN0

5.1W

0.1 Fm

3.3 Hm

330 Fm

VO2

3.3 V

10 F x 2m

10 Fm

13 kW

UDG-09019

VIN

100 nF 1 Fm

15 V

100 nF

100 nF

100 nF

620 kW

VO1VREF

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TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

TPS51125 Dual-Synchronous, Step-Down Controller With Out-of-Audio™ Operation and

100-mA LDOS for Notebook System Power

1 Features 3 Description

1

• Wide Input Voltage Range: 5.5 V to 28 V

• Output Voltage Range: 2 V to 5.5 V

• Built-In 100-mA, 5-V and 3.3-V LDO With
Switches

• Built-In 1% 2-V Reference Output

• With or Without Out-of-Audio™ Mode Selectable
Light-Load and PWM-Only Operation

• Internal 1.6-ms Voltage Servo Soft-Start

• Adaptive On-Time Control Architecture With Four
Selectable Frequency Setting

• 4500 ppm/°C R

Current Sensing

DS(on)

• Built-In Output Discharge

• Powergood Output

• Built-In OVP/UVP/OCP

• Thermal Shutdown (Nonlatch)

• QFN, 24-Pin (RGE)

2 Applications

• Notebook Computers

• I/O Supplies

• System Power Supplies

The TPS51125 is a cost-effective, dual-synchronous
buck controller targeted for notebook system power
supply solutions. The device provides 5-V and 3.3-V
LDOs and requires few external components. The
270-kHz VCLK output can be used to drive an
external charge pump, thus generating gate drive
voltage for the load switches without reducing the
efficiency of the main converter. The TPS51125
supports high-efficiency, fast-transient response and
provides a combined power-good signal. Out-of­Audio mode light-load operation enables low acoustic
noise at much higher efficiency than conventional
forced PWM operation. Adaptive on-time D-CAP™
control provides convenient and efficient operation.
The part operates with supply input voltages ranging
from 5.5 V to 28 V and supports output voltages from
2 V to 5.5 V. The TPS51125 is available in a 24-pin
QFN package and is specified from -40°C to 85°C
ambient temperature range.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

TPS51125 VQFN (24) 4.00 mm x 4.00 mm
(1) For all available packages, see the orderable addendum at

the end of the datasheet.

(1)

Simplified Schematic

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

www.ti.com

Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 5

6.1 Absolute Maximum Ratings ..................................... 5

6.2 ESD Ratings.............................................................. 5

6.3 Recommended Operating Conditions....................... 5

6.4 Thermal Information.................................................. 6

6.5 Electrical Characteristics........................................... 7

6.6 Typical Characteristics............................................ 10

7 Detailed Description ............................................ 15

7.1 Overview ................................................................. 15

7.2 Functional Block Diagram ....................................... 15

7.3 Feature Description................................................. 17

7.4 Device Functional Modes........................................ 22

8 Application and Implementation ........................ 23

8.1 Application Information............................................ 23

8.2 Typical Application ................................................. 23

9 Power Supply Recommendations...................... 27

10 Layout................................................................... 27

10.1 Layout Guidelines ................................................. 27

10.2 Layout Example .................................................... 28

11 Device and Documentation Support ................. 30

11.1 Device Support...................................................... 30

11.2 Trademarks ........................................................... 30

11.3 Electrostatic Discharge Caution............................ 30

11.4 Glossary ................................................................ 30

12 Mechanical, Packaging, and Orderable

Information........................................................... 30

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (June 2012) to Revision H Page

• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device

and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

Changes from Revision F (March 2012) to Revision G Page

• Added electrostatic discharge ratings in Absolute Maximum Ratings table. ......................................................................... 5

Changes from Revision E (May 2011) to Revision F Page

• Added Input voltage range parameter, LL1, LL2, pulse width < 20 ns with a value of -5 V to 30 V...................................... 5

2 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated

Product Folder Links: TPS51125

TPS51125RGE

VO1

PGOOD

VO2

VREG3

VBST1

DRVL1

LL1

DRVH1

VBST2

DRVH2

LL2

DRVL2

EN0

ENTRIP2

VFB2

VREF

TONSEL

VFB1

ENTRIP1

SKIPSEL

GND

VIN

VCLK

VREG5

2

3

4

5

6

7 8

9 10

11

1

12

13

14

15

16

17

18

24 23

22 21

20 19

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5 Pin Configuration and Functions

TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

RGE PACKAGE

24 PINS

TOP VIEW

Pin Functions

PIN

NAME NO.

DRVH1 21 High-side N-channel MOSFET driver outputs. LL referenced drivers.
DRVH2 10
DRVL1 19 Low-side N-channel MOSFET driver outputs. GND referenced drivers.
DRVL2 12
ENTRIP1 1 Channel 1 and Channel 2 enable and OCL trip setting pins.Connect resistor from this pin to GND to set
ENTRIP2 6

EN0 13 I/O

GND 15 — Ground.
LL1 20 Switch node connections for high-side drivers, current limit and control circuitry.
LL2 11
PGOOD 23 O Power Good window comparator output for channel 1 and 2. (Logical AND)

SKIPSEL 14 I

TONSEL 4 I

Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 3

I/O DESCRIPTION

O

O

I/O

threshold for synchronous R

sense. Short to ground to shutdown a switcher channel.

DS(on)

Master enable input.
Open : LDOs on, and ready to turn on VCLK and switcher channels.
620 kΩ to GND : enable both LDOs, VCLK off and ready to turn on switcher channels. Power

consumption is almost the same as the case of VCLK = ON.
GND : disable all circuit

I

Selection pin for operation mode:
OOA auto skip : Connect to VREG3 or VREG5
Auto skip : Connect to VREF
Auto skip : Connect to VREF

On-time adjustment pin
365 kHz/460 kHz setting : connect to VREG5
300 kHz/375 kHz setting : connect to VREG3
245 kHz/305 kHz setting : connect to VREF
200 kHz/250 kHz setting : connect to GND

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SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

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Pin Functions (continued)

PIN

NAME NO.

VBST1 22 Supply input for high-side N-channel MOSFET driver (boost terminal).
VBST2 9
VCLK 18 O 270-kHz clock output for 15-V charge pump.
VFB1 2 SMPS feedback inputs. Connect with feedback resistor divider.
VFB2 5
VIN 16 I High voltage power supply input for 5-V/3.3-V LDO.
VO1 24 Output connection to SMPS. These terminals work as fixed voltage inputs and output discharge inputs.
VO2 7
VREF 3 O 2-V reference voltage output. Connect 220-nF to 1-μF ceramic capacitor to Signal GND near the device.

VREG3 8 O
VREG5 17 O 5-V power supply output. Connect 33-μF ceramic capacitor to Power GND near the device.

I/O DESCRIPTION

I

I

I/O

VO1 and VO2 also work as 5 V and 3.3 V switch over return power input respectively.

3.3-V power supply output. Connect 10-μF ceramic capacitor to Power GND near the device. A 1-μF
ceramic capacitor is acceptable when not loaded.

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6 Specifications

TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

6.1 Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

VBST1, VBST2 –0.3 36
VIN –0.3 30
LL1, LL2 –2.0 30
LL1, LL2, pulse width < 20 ns –5.0 30
VBST1, VBST2
EN0, ENTRIP1, ENTRIP2, VFB1, VFB2, VO1, VO2, TONSEL,

SKIPSEL

(2)

–0.3 6
–0.3 6

V

Input voltage

(1)

DRVH1, DRVH2 –1.0 36

Output voltage

(1)

DRVH1, DRVH2

(2)

–0.3 6

PGOOD, VCLK, VREG3, VREG5, VREF, DRVL1, DRVL2 –0.3 6
Junction temperature, T
Storage temperature, T

J

stg

–40 125 °C
–55 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Voltage values are with respect to the corresponding LLx terminal.

6.2 ESD Ratings

VALUE UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001

V

Electrostatic discharge V

(ESD)

Charged-device model (CDM), per JEDEC specification JESD22- ±1500

(2)

C101

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

(1)

±2000

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

Supply voltage VIN 5.5 28

VBST1, VBST2 –0.1 34

Input voltage VBST1, VBST2 (with respect to LLx) –0.1 5.5

EN0, ENTRIP1, ENTRIP2, VFB1, VFB2, VO1, VO2, TONSEL, SKIPSEL –0.1 5.5
DRVH1, DRVH2 –0.8 34 V
DRVH1, DRVH2 (with respect to LLx) –0.1 5.5

Output voltage LL1, LL2 –1.8 28

VREF, VREG3, VREG5 –0.1 5.5
PGOOD, VCLK, DRVL1, DRVL2 –0.1 5.5

Operating free-air temperature –40 85 °C

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TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

www.ti.com

6.4 Thermal Information

TPS51125

THERMAL METRIC

R

θJA

R

θJC(top)

R

θJB

ψ

JT

ψ

JB

R

θJC(bot)

Junction-to-ambient thermal resistance 34.2
Junction-to-case (top) thermal resistance 37.2
Junction-to-board thermal resistance 12.4
Junction-to-top characterization parameter 0.4
Junction-to-board characterization parameter 12.4
Junction-to-case (bottom) thermal resistance 2.8

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(1)

VQFN UNIT

24 PINS

°C/W

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6.5 Electrical Characteristics

over operating free-air temperature range, VIN = 12 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SUPPLY CURRENT

I

VIN1

I

VIN2

I

VO1

I

VO2

I

VINSTBY

I

VINSDN

VIN supply current1 VO2 = 0 V, EN0=open, ENTRIPx = 5 V, 0.55 1 mA

VIN supply current2 VO2 = 3.3 V, EN0=open, ENTRIPx = 5 V, 4 6.5 μA

VO1 current VO2 = 3.3 V, EN0=open, ENTRIPx = 5 V, 0.8 1.5 mA

VO2 current VO2 = 3.3 V, EN0=open, ENTRIPx = 5 V, 12 100

VIN standby current 95 250

VIN shutdown current 10 25

VREF OUTPUT

V

VREF

VREF output voltage V

VREG5 OUTPUT

V

VREG5

I

VREG5

V

TH5VSW

R

5VSW

VREG5 output voltage 28 V V

VREG5 output current VO1 = 0 V, VREG5 = 4.5 V 100 175 250 mA

Switch over threshold V

5 V SW R

ON

VREG3 OUTPUT

V

VREG3

I

VREG3

V

TH3VSW

R

3VSW

VREG3 output voltage 28 V V

VREG3 output current VO2 = 0 V, VREG3 = 3 V 100 175 250 mA

Switch over threshold V

3 V SW R

ON

INTERNAL REFERENCE VOLTAGE

V

V

I

VFB

IREF

VFB

Internal reference voltage I

VFB regulation voltage

VFB input current VFBx = 2.0 V, TA= 25°C –20 20 nA

(1) Ensured by design. Not production tested.

VIN current, TA= 25°C, no load, VO1 = 0 V,
VFB1 = VFB2 = 2.05 V

VIN current, TA= 25°C, no load, VO1 = 5 V,
VFB1 = VFB2 = 2.05 V

VO1 current, TA= 25°C, no load, VO1 = 5 V,
VFB1 = VFB2 = 2.05 V

VO2 current, TA= 25°C, no load, VO1 = 5 V,
VFB1 = VFB2 = 2.05 V

VIN current, TA= 25°C, no load, μA
EN0 = 1.2 V, ENTRIPx = 0 V

VIN current, TA= 25°C, no load,
EN0 = ENTRIPx = 0 V

I

= 0 A 1.98 2.00 2.02

VREF

-5 μA < I

VO1 = 0 V, I
VO1 = 0 V, I

VO1 = 0 V, I
V

< 100 μA 1.97 2.00 2.03

VREF

< 100 mA, TA= 25°C 4.8 5 5.2

VREG5

< 100 mA, 6.5 V < VIN <

VREG5

< 50 mA, 5.5 V < VIN < 28

VREG5

Turns on 4.55 4.7 4.85
Hysteresis 0.15 0.25 0.3
VO1 = 5 V, I

VO2 = 0 V, I
VO2 = 0 V, I

VO2 = 0 V, I
V

= 100 mA 1 3 Ω

VREG5

< 100 mA, TA= 25°C 3.2 3.33 3.46

VREG3

< 100 mA, 6.5 V < VIN <

VREG3

< 50 mA, 5.5 V < VIN < 28

VREG3

Turns on 3.05 3.15 3.25
Hysteresis 0.1 0.2 0.25
VO2 = 3.3 V, I

= 0 A, beginning of ON state 1.95 1.98 2.01

VREF

FB voltage, I
FB voltage, I
FB voltage, I

conduction

(1)

= 100 mA 1.5 4 Ω

VREG3

= 0 A, skip mode 1.98 2.01 2.04

VREF

= 0 A, OOA mode

VREF

= 0 A, continuous

VREF

(1)

TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

4.75 5 5.25

4. 75 5 5.25

3.13 3.33 3.5

3.13 3.33 3.5

2.00 2.035 2.07

2.00

V

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TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

Electrical Characteristics (continued)

over operating free-air temperature range, VIN = 12 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

DISCHARGE

OUT

I

Dischg

OUTPUT DRIVERS

R

DRVH

R

DRVL

t

D

CLOCK OUTPUT

V

CLKH

V

CLKL

f

CLK

INTERNAL BST DIODE

V

FBST

I

VBSTLK

DUTY AND FREQUENCY CONTROL

t

ON11

t

ON12

t

ON13

t

ON14

t

ON21

t

ON22

t

ON23

t

ON24

t

ON(min)

t

OFF(min)

SOFT-START

t

SS

POWERGOOD

V

THPG

I

PGMAX

t

PGDEL

VOUT discharge current ENTRIPx = 0 V, VOx = 0.5 V 10 60 mA

DRVH resistance

DRVL resistance

Dead time ns

High level voltage I
Low level voltage I

Source, V
Sink, V
Source, V
Sink, V
DRVHx-off to DRVLx-on 10
DRVLx-off to DRVHx-on 30

VCLK
VCLK

BSTx - DRVHx

DRVHx - LLx

VREG5 - DRVLx

= 100 mV 1.5 4

DRVLx

= -10 mA, VO1 = 5 V, TA= 25 °C 4.84 4.92
= 10 mA, VO1 = 5 V, TA= 25 °C 0.06 0.12

= 100 mV 4 8

= 100 mV 1.5 4

= 100 mV 4 8

Clock frequency TA= 25 °C 175 270 325 kHz

Forward voltage V

VREG5-VBSTx

, IF= 10 mA, TA= 25 °C 0.7 0.8 0.9 V

VBST leakage current VBSTx = 34 V, LLx = 28 V, TA= 25 °C 0.1 1 μA

CH1 on time 1 VIN= 12 V, VO1 = 5 V, 200 kHz setting 2080
CH1 on time 2 VIN= 12 V, VO1 = 5 V, 245 kHz setting 1700
CH1 on time 3 VIN= 12 V, VO1 = 5 V, 300 kHz setting 1390
CH1 on time 4 VIN= 12 V, VO1 = 5 V, 365 kHz setting 1140
CH2 on time 1 VIN= 12 V, VO2 = 3.3 V, 250 kHz setting 1100
CH2 on time 2 VIN= 12 V, VO2 = 3.3 V, 305 kHz setting 900
CH2 on time 3 VIN= 12 V, VO2 = 3.3 V, 375 kHz setting 730
CH2 on time 4 VIN= 12 V, VO2 = 3.3 V, 460 kHz setting 600
Minimum on time TA= 25 °C 80
Minimum off time TA= 25 °C 300

Internal SS time Internal soft start 1.1 1.6 2.1 ms

PG in from lower 92.50% 95% 97.50%

PG threshold PG in from higher 102.50% 105% 107.50%

PG hysteresis 2.50% 5% 7.50%
PG sink current PGOOD = 0.5 V 5 12 mA
PG delay Delay for PG in 350 510 670 μs

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Ω

V

ns

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Electrical Characteristics (continued)

over operating free-air temperature range, VIN = 12 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

LOGIC THRESHOLD AND SETTING CONDITIONS

Shutdown 0.4

V

EN0

I

EN0

V

EN

V

TONSEL

V

SKIPSEL

PROTECTION: CURRENT SENSE

I

ENTRIP

TC

IENTRIP

V

OCLoff

V

OCL(max)

V

ZC

V

ENTRIP

PROTECTION: UNDERVOLTAGE AND OVERVOLTAGE

V

OVP

t

OVPDEL

V

UVP

t

UVPDEL

t

UVPEN

UVLO

V

UVVREG5

V

UVVREG3

THERMAL SHUTDOWN

T

SDN

EN0 setting voltage Enable, VCLK = off 0.8 1.6 V

Enable, VCLK = on 2.4

V

= 0.2 V 2 3.5 5

EN0 current μA

ENTRIP1, ENTRIP2
threshold

EN0

V

= 1.5 V 1 1.75 2.5

EN0

Shutdown 350 400 450

Hysteresis 10 30 60

200 kHz/250 kHz 1.5

TONSEL setting voltage

245 kHz/305 kHz 1.9 2.1

300 kHz/375 kHz 2.7 3.6

365 kHz/460 kHz 4.7 V

PWM only 1.5
SKIPSEL setting voltage Auto skip 1.9 2.1

OOA auto skip 2.7

ENTRIPx source current V
ENTRIPx current

temperature coefficient
OCP comparator offset –8 0 8

On the basis of 25°C

((V

V
Maximum OCL setting V
Zero cross detection

comparator offset

V
Current limit threshold V

= 920 mV, TA= 25°C 9.4 10 10.6 μA

ENTRIPx

(1)

ENTRIPx-GND

ENTRIPx-GND
ENTRIPx

GND-LLx

ENTRIPx-GND

/9)-24 mV -V

= 920 mV

= 5 V 185 205 225 mV
voltage –5 0 5

voltage,

(1)

GND-LLx

) voltage,

OVP trip threshold OVP detect 110% 115% 120%
OVP prop delay 2 μs

Output UVP trip threshold

UVP detect 55% 60% 65%

Hysteresis 10%
Output UVP prop delay 20 32 40 μs
Output UVP enable delay 1.4 2 2.6 ms

VREG5 UVLO threshold

VREG3 UVLO threshold Shutdown

Thermal shutdown threshold °C

Wake up 4.1 4.2 4.3

Hysteresis 0.38 0.43 0.48 V

(1)

Shutdown temperature

Hysteresis

(1)

(1)

TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

mV

4500 ppm/°C

0.515 2 V

VO2-1

150

10

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0

50

100

150

200

250

5 10 15 20 25

VIN- Input Voltage - V

I – VIN Standby Current – nA

VINSTBY

0

50

100

150

200

250

-

50

0 50 100 150

TJ- Junction Temperature - °C

I

VINST BY

- VIN Standby Cu rrent -

mA

0

1

2

3

4

5

6

7

8

9

-50 0 50 100 150

TJ- Junction Temperature - °C

I

VIN2

- VIN Supply C urrent2 -

mA

0

1

2

3

4

5

6

7

8

9

5 10 15 20 25

VIN- Input Voltage - V

I

VIN2

- VIN Supply Current2 -

mA

0

100

200

300

400

500

600

700

800

5 10 15 20 25

VIN- Input Voltage - V

I

VIN1

- VIN Supply Current1 -

mA

0

100

200

300

400

500

600

700

800

-50 0 50 100 150

TJ- Junction Temperature - °C

I

VIN1

- VIN Supply Current1 -

mA

TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

6.6 Typical Characteristics

www.ti.com

Figure 1. VIN Supply Current1 vs Junction Temperature

Figure 3. VIN Supply Current2 vs Junction Temperature

Figure 2. VIN Supply Current1 vs Input Voltage

Figure 4. VIN Supply Current1 vs Input Voltage

Figure 5. VIN Standby Current vs Junction Temperature

10 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated

Figure 6. VIN Standby Current vs Input Voltage

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0

100

200

300

400

500

6 8 10 12 14 16 18 20 22 24 26

VIN- Input Voltage - V

f

SW

- Swithching F requency - kHz

TONSEL = GND

CH1

CH2

0

100

200

300

400

500

6 8 10 12 14 16 18 20 22 24 26

VIN- Input Voltage - V

f

SW

- Swithchin g Frequency - kHz

TONSEL = 2V

CH1

CH2

6

7

8

9

10

11

12

13

14

-50 0 50 100 150

TJ- Junction Temperature - °C

I

ENTR IP

- Current Sense Cu rrent -

mA

175

200

225

250

275

300

325

-50 0 50 100 150

TJ- Junction Temperature - °C

f

CLK

- VCLK Frequ ency - kHz

0

5

10

15

20

25

-50 0 50 100 1 50

TJ- Junction Temperature - °C

I

VINSD N

- VIN Shutdo wn C urrent -Am

0

5

10

15

20

25

5 10 15 20 25

VIN- Input Voltage - V

I

VINSDN

- VIN Shutdown Current -

mA

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SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

Typical Characteristics (continued)

Figure 7. VIN Shutdown Current vs Junction Temperature Figure 8. VIN Shutdown Current vs Input Voltage

TPS51125

Figure 9. Current Sense Current vs Junction Temperature

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Figure 11. Switching Frequency vs Input Voltage Figure 12. Switching Frequency vs Input Voltage

Figure 10. VCLK Frequency vs Junction Temperature

Product Folder Links: TPS51125

0

100

200

300

400

500

0.001 0.01 0.1 1 10

I

OUT

- Output Current - A

f

SW

- Swithch ing Frequency - kHz

TONSEL = 5V

CH2 Auto-skip

CH2 OOA

CH2 PWM Only

CH1 PWM Only

CH1 Auto-skip

CH1 OOA

0

100

200

300

400

500

0.001 0.01 0.1 1 10

I

OUT

- Output Current - A

f

SW

- Swithch ing Frequency - kHz

TONSEL = 3.3V

CH2 Auto-skip

CH2 OOA

CH2 PWM Only

CH1 PWM Only

CH1 Auto-skip

CH1 OOA

0

100

200

300

400

500

0.001 0.01 0.1 1 10

I

OUT

- Output Current - A

f

SW

- Swithch ing Frequency - kHz

TONSEL = 2V

CH2 Auto-skip

CH2 OOA

CH2 PWM Only

CH1 PWM Only

CH1 Auto-skip

CH1 OOA

0

100

200

300

400

500

0.001 0.01 0.1 1 10

I

OUT

- Output Current - A

f

SW

- Swithch ing Frequency - kHz

TONSEL = GND

CH2 Auto-skip

CH2 OOA

CH2 PWM Only

CH1 PWM Only

CH1 Auto-skip

CH1 OOA

0

100

200

300

400

500

6 8 10 12 14 16 18 20 22 24 26

VIN- Input Voltage - V

f

SW

- Swithchin g Frequency - kHz

TONSEL = 5V

CH1

CH2

0

100

200

300

400

500

6 8 10 12 14 16 18 20 22 24 26

VIN- Input Voltage - V

f

SW

- Swithchin g Frequency - kHz

TONSEL = 3.3V

CH1

CH2

TPS51125

SLUS786H –OCTOBER 2007–REVISED JANUARY 2015

Typical Characteristics (continued)

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Figure 13. Switching Frequency vs Input Voltage

Figure 15. Switching Frequency vs Output Current

Figure 14. Switching Frequency vs Input Voltage

Figure 16. Switching Frequency vs Output Current

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Figure 17. Switching Frequency vs Output Current

Figure 18. Switching Frequency vs Output Current

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