Texas Instruments TPS5103IDB, TPS5103IDBR, TPS5103EVM-136 Datasheet

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SOFTSTART

INV

FB
C

T

R

T

GND

REF

COMP

PWMSKIP

STBY

LH
OUT_u
LL
OUT_d
OUTGND
TRIP
VCC_SENSE
VCC
VREF5
VREG5V_IN

DB PACKAGE

(TOP VIEW)

TPS5103

MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Step-Down DC-DC Converter

D

Three Operation-Mode
– Heavy Load:

– Fixed Frequency PWM
– Hysteretic (User Selctable)

– Light Load:

– Skip Mode

D

4.5 V to 25 V Input Voltage Range

D

Adjustable Output Voltage Down to 1.2 V

D

95% Efficiency

D

Stand-By Control

D

Over Current Protection

D

UVLO for Internal 5 V Regulation

D

Low Standby Current . . . 0.5 mA T ypical

D

TA = –40°C to 85°C

description

The TPS5103 is a synchronous buck dc/dc controller, designed for notebook PC system power . The controller
has three user-selectable operation modes available; hysteretic mode, fixed frequency PWM control, or SKIP
control.

In high current applications, where fast transient response is advantageous for reducing bulk capacitance, the
hysteretic mode is selected by connecting the Rt pin to Vref5. Selecting the PWM/SKIP modes for less
demanding transient applications is ideal for conserving notebook battery life under light load conditions. The
device includes high-side and low-side MOSFET drivers capable of driving low Rds (on) N–channel MOSFET s.

The user-selectable overcurrent protection (OCP) threshold is set by an external TRIP pin resister in order to
protect the system. The TPS5103 is configured so that a current sense resistor is not required, improving the
operating efficiency.

R1

R2

1

SOFTSTART

2

INV

3

FB

4

CT

5

RT

6

GND

7

REF

8

COMP

9

PWM/SKIP

10

STBY

19

OUTU

17

OUTD

16

OUTGND

15

TRIP

14

VCCSENSE

12

VREF5

11

VREG5V_IN

13

VCC

20

LH

18

LL

TPS5103

U1

C2

C1

R3

R4

D1

C3

L1

OUTPUT

+

5 V

C4

C5

Q2

Q1

Figure 1. Typical Design

Copyright  1999, Texas Instruments Incorporated

PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TI is a trademark of Texas Instruments Incorporated.

TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagram

_
+

Soft Start

_
+

1.185 V

Error Amp

_
+

PWM Comp.

One Shot ON

_
+

OSC

_
+

_
+

Disable

1.185 V

UVLO

_
+

VREF

1.185 V

SOFT START

LH

FB

INV

PWMSKIP

C

T

R

T

Comp

GND

V

CC

STBY

REF

OUT_u
LL

OUT_d
OUTGND

TRIP

VCC_SENSE

VREF5

VREG5V_IN

AVAILABLE OPTIONS

PACKAGE

T

A

SSOP(DB) EVM

°

°

TPS5103IDB TPS5103EVM–136

–40 °C to 85

°C

TPS5103IDBR

TPS5103

MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Terminal Functions

TERMINAL

NAME NO.

I/O

DESCRIPTION

COMP 8 I Comparator input for voltage monitor
C

T

4 I/O

External capacitor from CT to GND for adjusting the triangle oscillator and decreasing the current limiting

voltage
FB 3 O Feedback output of error amp
GND 6 Control GND
INV 2 I Inverting input of both error amp and hysteretic comparator
LH 20 I/O Bootstrap. Connect 1 µF low-ESR capacitor from LH to LL.

LL 18 I/O

Bootstrap low. High side gate driving return and output current protection. Connect to the junction of the high

side and low side FETs for floating drive configuration.
OUT_d 17 I/O Gate-drive output for low-side power switching FET s
OUTGND 16 Ground for FET drivers
OUT_u 19 O Gate-drive output for high-side power switching FETs

PWMSKIP 9 I

PWM/SKIP mode select

L:PWM mode

H:SKIP mode
REF 7 O 1.185-V reference voltage output
R

T

5 I/O External resistor connection for adjusting the triangle oscillator.
SOFTSTAR T 1 I External capacitor from SOFTSTART to GND for soft start control
STBY 10 I Standby control
TRIP 15 I External resistor connection for output current control
V

CC

13 I Supply voltage input
VCC_SENSE 14 I Supply voltage sense for current protection
VREF5 12 O 5-V-internal regulator output
VREG5V_IN 11 I External 5-V input (input voltage range = 4.5 V to 25 V)

TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

detailed description

REF

The reference voltage is used for the output voltage setting and the voltage protection(COMP). The tolerance
is 1.5% typically .

VREF5

An internal linear voltage regulator is used for the high-side driver bootstrap voltage. Since the input voltage
range is from 4.5 V to 25 V, this voltage offers a fixed voltage for the bootstrap voltage so that the design for
the bootstrap is much easier. The tolerance is 6%.

hysteretic comparator

The hysteretic comparator is used to regulate the output voltage of the synchronous-buck converter. The
hysteresis is set internally and is typically 9.7 mV. The total delay time from the comparator input to the driver
output is typically 400 ns for going both high and low.

error amplifier

The error amplifier is used to sense the output voltage of the synchronous buck converter. The negative input
of the error amplifier is connected to the Vref voltage(1.185 V) with a resistive divider network. The output of
the error amplifier is brought out to the FB terminal to be used for loop gain compensation.

low-side driver

The low-side driver is designed to drive low-Rds(on) n-channel MOSFETs. The maximum drive voltage is 5 V
from VREF5. The current rating of driver is typically 1.2 A at sink current, –1.5 A at source current.

high-side driver

The high-side driver is designed to drive low-Rds(on) n-channel MOSFETs. The current rating of the driver is

1.2 A at sink current, –1.7 A at source current. When configured as a floating driver, the bias voltage to the driver
is developed from the VREF5, limiting the maximum drive voltage between OUT_u and LL to 5 V . The maximum
voltage that can be applied between LH and OUTGND is 30 V.

driver deadtime control

The deadtime control prevents shoot-through current from flowing through the main power FETs. During

switching transitions the

deadtime control actively controls the turnon time of the MOSFET drivers. The typical

deadtime from the low-side-driver-off to the high-side-driver-on is 90 ns, and 110 ns from high-side-driver-off
to low-side-driver-on.

COMP

COMP is designed for use with a regulation output monitor. COMP also functions as an internal comparator
used for any voltage protection such as the input under voltage protection. If the input voltage is lower than the
setpoint, the comparator turns off and prevents external parts from damage. The investing terminal of the
comparator is internally connected to REF(1.185 V).

current protection

Current protection is achieved by sensing the high-side power MOSFET drain-to-source voltage drop during
on-time through VCC_SENSE and LL terminals. An external resistor between Vin and TRIP terminal with the
internal current source connected to the current comparator negative input adjusts the current limit. The typical
internal current source value is 15 µA in PWM mode, 5 µA in SKIP mode. When the voltage on the positive
terminal is lower than the negative terminal, the current comparator turns on the trigger, and then activates the
oscillator. This oscillator repeatedly reset the trigger until the over current condition is removed. The capacitor
on the C

T

terminal can be open or added to adjust the reset frequency.

TPS5103

MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

detailed description (continued)

softstart

SOFTST ART sets the sequencing of the output for any possibility . The capacitor value for a start-up time can
be calculated by the following equation: C = 2xT (uF) where C is the external capacitor value, T is the required
start-up time in (ms).

standby

This controller can be switched into standby mode by grounding the STBY terminal. When it is in standby mode,
the quiescent current is less than 1.0 uA.

UVLO

The under-voltage-lock-out (ULVO) threshold is approximately 3.8 V. The typical hysteresis is 55 mV.

5-V Switch

5-V Switch if the internal 5-V switch senses a 5-V input from REG5V terminal, the internal 5-V linear regulator
will be disconnected from the MOSFET drivers. The external 5 V will be used for both the low-side driver and
the high-side bootstrap, thus increasing the efficiency.

PWM/SKIP switch

The PWM/SKIP switch selects the output operating mode. This controller has three operational modes, PWM,
SKIP, and Hysteretic. The PWM and SKIP mode control should be used for slower transient applications.

oscillator

The oscillator gives a triangle wave by connecting an external resistor to the R

T

terminal and an external
capacitor to the CT terminal. The voltage amplitude is 0.43 V ~ 1.17 V. This wave is connected to the non­inverting input of the PWM comparator.

Comparison Table Between PWM Mode and Hysteretic Mode

MODE PWM HYSTERETIC

Frequency Fixed Not Fixed
Transient Response Normal Very fast
Feed back compensation Need Needless

TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

†

Supply voltage, VCC (see Note 1) –0.3 V to 27 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage, VI, INV, CT, RT, PWM/SKIP, SOFTSTART, COMP –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage, VREG5V_IN –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage, STBY –0.3 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage, TRIP, VCC_SENSE –0.3 V to 27 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output current, I

O

3 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Low level output voltage, VOL –0.3 V to 27 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

High level output voltage, V

OH

–0.3 V to 32 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Reference voltage, V

ref

–0.3 V to 3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, TA –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, TJ –125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values are with respect to the network ground terminal.

2. See Dissipation Rating Table for free-air temperature range above 25°C.

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 85°C

POWER RATING

DB 801 mW 6.408mW/°C 416 mW

recommended operating conditions

MIN NOM MAX UNIT

V

CC

Supply voltage 4.5 25 V

INV, CT, RT, COMP, PWM_SKIP, SOFTSTART 6

p

VREG5V_IN 5.5

VIInput voltage

STBY 12

V

TRIP, VCC_SENCE 25

R

T

‡

Timing register 82 kΩ

C

T

‡

Oscillator frequency

Timing capacitor 100 pF
f Frequency 200 kHz
T

A

Operating temperature range –40 85 °C

‡

Not a JEDEC symbol.

TPS5103

MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range, VCC = 7 V
(unless otherwise noted)

reference voltage

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

TA = 25°C, I

vref

= 50 µA 1.167 1.185 1.203

V

ref

Reference voltage

I

vref

= 50 µA

‡

1.155 1.215

V

Regin Line regulation

†

VCC = 4.5 V to 25 V, I = 50 µA 0.2 12 mV

Regl Load regulation

†

I = 1 µA to 1 mA 0.5 10 mV

†

Not a JEDEC symbol.

oscillator

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

f Frequency PWM mode 500 kHz
R

T

Timing resistor 47 kΩ

fdv

VCC = 4.5 V to 25 V 0.1%

fdt

Frequency change

†

TA = –40°C to 85°C 2%

p

DC includes internal comparator error 1 1.1 1.2

V

HL

‡

High-level output voltage

f = 200 kHz, includes internal comparator error 1.17

V

p

DC includes internal comparator error 0.4 0.5 0.6

V

LL

‡

Low-level output voltage

f = 200 kHz, includes internal comparator error 0.43

V

†

Not a JEDEC symbol.

‡

The output voltages of oscillator (f = 200 kHz) are ensured by design.

error amp

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V Input offset voltage TA = 25°C 2 10 mV
Av Open-loop voltage gain

†

50 dB

GB Unity-gain bandwidth

†

0.8 MHz

I

O

Output sink current VO = 0.4 V 30 45 µA

I

S

Output source current VO = 1 V 300 µA

†

Not a JEDEC symbol.

hysteresis comparator

§

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

hsy

Hysteresis window Hysteretic mode 6 9.7 13 mV
Vp-VSOffset voltage 2 mV
I Bias current 10 pA
t

PHL

Propagation delay from INV to OUT_U TTL input signal 230 ns
t

PLH

10 mV overdrive on hysteresis band signal 400 ns

§

The numbers in the table include the driver delay. All numbers are ensured by design.

control

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

p

STBY 2.5

V

IHA

High-level input voltage

PWM_SKIP 2

V

p

STBY 0.5

V

ILA

Low-level input voltage

PWM_SKIP 0.5

V

TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range, VCC = 7 V
(unless otherwise noted) (continued)

5-V regulator

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

O

Output voltage I = 10 mA 4.7 5.3 V

Regin Line regulation

†

VCC = 5.5 V to 25 V, I = 10 mA 20 mV

Regl Load regulation

†

I = 1 mA to 10 mA, VCC = 5.5 V 40 mV

I

OS

Short-circuit output current V

ref

= 0 V 70 mA

†

Not a JEDEC symbol.

5-V switch

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

IT(high)

4.2 4.9

V

IT(low)

Threshold voltage

†

4.1 4.8

V

V

hsy

Hysteresis) 50 150 250 mV

†

Not a JEDEC symbol.

UVLO

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

IT(high)

3.6 4.2

V

IT(low)

Threshold voltage

†

3.5 4.1

V

V

hys

Hysteresis 10 150 mV

†

Not a JEDEC symbol.

output

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

I

O

OUT_u sink curent VO = 3 V 0.5 1.2 A

I

S

OUT_u source current VO = 2 V –1 –1.7 A

I

O

OUT_d sink current VO = 3 V 0.5 1.2 A

I

S

OUT_d source current VO = 2 V –1 –1.5 A

PWM mode, VTRIP = 7 V 10 15 20

I

TRIP terminal current

SKIP mode, VTRIP = 7 V 3 5 7

µ

A

High side driver is GND referenced.
Input: INV = 0 – 3V

t

r

Rise time

tr/tf = 10 ns,

Frequency = 200 kHz

ns
CL = 2200 pF 28
CL = 3300 pF 39
High side driver is GND referenced.
Input: INV = 0 – 3 V

t

f

Fall time

tr/tf = 10 ns,

Frequency = 200 kHz

ns
CL = 2200 pF 30
CL = 3300 pF 38

TPS5103

MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range, VCC = 7 V
(unless otherwise noted) (continued)

softstart

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

I

(CTRL)

Softstart current 1.9 2.5 3 µA

V

IT(high)

3.9

V

IT(low)

Threshold voltage (SKIP mode)

†

2.6

V

†

Not a JEDEC symbol.

output voltage monitor

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

IT

Threshold voltage 1.08 1.18 1.28 V

driver deadtime section

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

T

DRVLH

Low-side to high-side 90 ns

T

DRVHL

High-side to low-side 110 ns

whole device

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

I

CC

Supply current 0.5 1.2 mA

I Shutdown current STBY = 0 V 0.01 10 µA

SOFTSTART

LH

INV

OUT_u

FB

LL

C

T

OUT_d

R

T

OUTGND

GND

TRIP
REF
COMP
PWM SKIP

VREF5

STBY

5V_IN

5V

7V

VCC_SENSE

VCC

0.1 µF

0.1 µF

Figure 2. Test Circuit

TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 3

550

500

400

300

–40 –20 25

– Quiescent Current –

600

650

QUIESCENT CURRENT

vs

JUNCTION TEMPERATURE

700

85 125

450

350

I

CC

Aµ

TJ – Junction Temperature – °C

VCC = 25 V

VCC = 7 V

VCC = 4.5 V

Figure 4

30

20
15

0

–40 –20 25

40

45

50

85 125

35

25

10

5

– Quiescent Current –

QUIESCENT CURRENT

vs

JUNCTION TEMPERATURE

I

CCS

Aµ

TJ – Junction Temperature – °C

VCC = 25 V

VCC = 7 V

VCC = 4.5 V

Figure 5

4

3.5

3

0.1 0.7

4.5

5

DRIVE OUTPUT VOLTAGE

vs

DRIVE CURRENT

5.5

1

I

(OUT_source)

– Drive Source Current – A

VCC = 7 V,
TJ = 25°C

– Drive Output Voltage – VV

(OUT_u)

Figure 6

1.5

1

0.5

0

0.1 0.7

2

2.5

DRIVE OUTPUT VOLTAGE

vs

DRIVE CURRENT

3

1

– Drive Output Voltage – VV

(OUT_u)

I

(OUT_sink)

– Drive Source Current – A

VCC = 7 V,
TJ = 25°C

TPS5103

MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 7

3

2

1

0

0.1 0.7

4

5

DRIVE OUTPUT VOLTAGE

vs

DRIVE CURRENT

6

1

I

(OUT_source)

– Drive Source Current – A

TJ = 25°C

– Drive Output Voltage – VV

(OUT_d)

Figure 8

3

2

1

0

0.1 0.7

3.5

4

4.5

1

2.5

1.5

0.5

DRIVE OUTPUT VOLTAGE

vs

DRIVE CURRENT

– Drive Output Voltage – VV

(OUT_d)

I

(OUT_sink)

– Drive Source Current – A

TJ = 25°C

Figure 9

VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V

1.095

1.085

1.075
–40 –20 25

– Oscillator Output Voltage – V

1.105

1.115

OSCILLATOR OUTPUT VOLTAGE

vs

JUNCTION TEMPERATURE

1.125

85 125

TJ – Junction Temperature – °C

V

(osch)

Figure 10

490

485

480

–40 –20 25

495

500

85 125

VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V

– Oscillator Output Voltage – V

OSCILLATOR OUTPUT VOLTAGE

vs

JUNCTION TEMPERATURE

TJ – Junction Temperature – °C

V

(oscl)

TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER

SLVS240 – SEPTEMBER 1999

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 11

1

0.5

0

–40 –20 25

– Error Amplifier Input Offset V oltage – mV

1.5

2

ERROR AMPLIFIER INPUT OFFSET VOLTAGE

vs

JUNCTION TEMPERATURE

2.5

85 125

VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V

TJ – Junction Temperature – °C

V

io

Figure 12

1

0.5

0

–40 –20 25

– Error Amplifier Output V oltage – mV

1.5

2

ERROR AMPLIFIER OUTPUT VOLTAGE

vs

JUNCTION TEMPERATURE

2.5

85 125

VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V

TJ – Junction Temperature – °C

V

om+

Figure 13

5.2

5

4.8

4.4

5.8

6

6.2

5.6

5.4

4.6

–40 –20 25

– Error Amplifier Output V oltage – mV

ERROR AMPLIFIER OUTPUT VOLTAGE

vs

JUNCTION TEMPERATURE

85 125

VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V

TJ – Junction Temperature – °C

V

om–

Figure 14

9.75

9.5

9.25

9

– Hysteresis Comparator Hysteresis Voltage – mV

10

10.25

HYSTERESIS COMPARATOR HYSTERESIS VOLTAGE

vs

JUNCTION TEMPERATURE

10.5

V

hys

–40 –20 25 85 125

VCC = 7 V

TJ – Junction Temperature – °C