Texas Instruments TPS2376DDAR-HG4, TPS2376-H Datasheet

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TPS2376-H

SMAJ58A

0.1mF

V

SS

CLASS

DET

T1 A

Da ta to

Et he r ne t

PH Y

1

2

RJ -4 5

T1 B

287KW

ILIM

RTN

V

DD

PG

C

BULK

3

6

4
5

7
8

To DC /D C Con ve rt er

PAD

UVLO

1.62KW

23.2KW

TPS2376-H

SLVS646A – SEPTEMBER 2006 – REVISED SEPTEMBER 2006

IEEE 802.3af PoE HIGH POWER PD CONTROLLER

FEATURES

• Adjustable Turn-on Thresholds

• Permits high-power 26 W designs

• Integrated 0.58- Ω , 100-V, Low-Side Switch

• 15-kV System Level ESD Capable

• Industrial Temperature Range: -40 ° C to 85 ° C

• 8-Pin PowerPad™ SOIC Package

APPLICATIONS

Device UVLO Protection Package

TPS2376-H Adjustable Auto-Retry DDA 600 mA
TPS2375-1 802.3af Auto-Retry PW 400 mA
TPS2377-1 Legacy Auto-Retry D 400 mA

TPS2375 802.3af Latch PW, D 400 mA
TPS2376 Adjustable Latch PW, D 400 mA
TPS2377 Legacy Latch PW, D 400 mA

• VoIP Video and Speaker Phones

• WiMAX Access Points

• Security Cameras

(1) Packages codes as follows: D = S0, DDA = SO PowerPad,

• RFID Readers PW = TSSOP

DESCRIPTION

The 8-pin integrated circuit contains all of the features needed to develop a high power IEEE 802.3af style
powered device (PD). The TPS2376-H offers a higher current limit and increased thermal dissipation capability
over the TPS237X family of devices. The TPS2376-H implements a fully compliant PoE interface while
permitting non-standard implementations that draw more power. A 26 W PD may be constructed when working
from a 52 V minimum PSE over 100 m of CAT-5 cable. The TPS2376-H features a 100 V rating, 600 mA
capability, adjustable inrush limiting, fault protection with auto-retry, and true open-drain power-good
functionality.

PRODUCT SELECTOR

(1)

Rated

Current

PowerPad is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Figure 1. Typical Application Circuit

Copyright © 2006, Texas Instruments Incorporated

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TPS2376-H

SLVS646A – SEPTEMBER 2006 – REVISED SEPTEMBER 2006

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

AVAILABLE OPTIONS

T

A

UVLO THRESHOLDS (NOMINAL) PACKAGE

TYPE LOW HIGH SO-8 PowerPad

-40 ° C to 85 ° C Adjustable 1.93 V 2.49 V TPS2376DDA-H 2376-H

(1) Add an R suffix to the device type for tape and reel.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

VDD, RTN

Voltage ILIM, UVLO -0.3 V to 10 V

CLASS -0.3 V to 12 V
RTN

Current, sinking PG 0 to 5 mA

DET 0 to 1 mA

Current, sourcing

ESD

T

J

T

stg

Maximum junction temperature range Internally limited
Storage temperature range -65 ° C to 150 ° C

CLASS 0 to 50 mA
ILIM 0 to 1 mA
Human body model 2 kV
System level (contact/air) at RJ-45

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating

conditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) I
(3) SOA limited to V
(4) Surges applied to RJ-45 of Figure 1 between pins of RJ-45, and between pins and output voltage rails per EN61000-4-2, 1999.

= 0

(RTN)

(RTN)

= 80 V and I

= 900 mA.

(RTN)

(2)

(3)

(1)

, voltages are referenced to V

, DET, PG -0.3 V to 100 V

(4)

(1)

(VSS)

TPS2376-H

Internally Limited

8/15 kV

MARKING

DISSIPATION RATING TABLE

θ

PACKAGE

(2)

(Modified HIGH-K) (Modified LOW-K)

JA

° C/W ° C/W

θ

JA

(1)

θJA(Best)

° C/W

DDA 58.6 50 45

(1) Tested per JEDEC JESD51, natural convection. The definitions of high-k and low-k are per JESD 51-7

and JESD 51-3. Modified low-k (2 signal - no plane, 3 in. by 3 in. board, 0.062 in. thick, 1 oz. copper)
test board with the pad soldered, and an additional 0.12 in.

2

of top-side copper added to the pad.
Modified high-k is a (2 signal – 2 plane) test board with the pad soldered. The best case thermal
resistance is obtained using the recommendations per SLMA002 (2 signal - 2 plane with the pad
connected to the plane).

(2) For the most current package and ordering information, see the Package Option Addendum at the end

of this document, or see the TI Web site at www.ti.com .

2

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TPS2376-H

SLVS646A – SEPTEMBER 2006 – REVISED SEPTEMBER 2006

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

Input voltage range VDD, PG, RTN 0 57 V
Operating current range (sinking) RTN 0 600 mA
Classification resistor

R

Inrush limit program resistor

(ILIM)

Sinking current PG 0 2 mA

T

Operating junction temperature ° C

J

T

Operating free–air temperature -40 85 ° C

A

(1) Voltage should not be externally applied to CLASS and ILIM.
(2) Temperature limitation is for 10 year life-expectancy at this temperature. Short-term operation to 125 ° C is permissable.

ELECTRICAL CHARACTERISTICS

V

= 48 V, R

(VDD)

currents are into pins. Typical values are at 25 ° C. All voltages are with respect to VSS unless otherwise noted.

DETECTION

CLASSIFICATION

I

(CLASS)

V

(CL_ON)

V

(CU_OFF)

V

(CU_H)

I

lkg

PASS DEVICE

r

DS(on)

I

(LIM)

(1) Classification is tested with exact resistor values. A 1% tolerance classification resistor ensures compliance with IEEE 802.3af limits.
(2) This parameter specifies the RTN current value, as a percentage of the steady state inrush current, below which it must fall to make PG

assert (open-drain).

(DET)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Offset current 0.3 3 µ A

Sleep current 4 12 µ A
DET leakage current V

Detection current

Classification current

Classification lower threshold V

Classification upper threshold

Leakage current V

On resistance 0.58 1 Ω
Leakage current V
Current limit V
Inrush limit V

Inrush current termination
Leakage current, ILIM V

(1)

= 24.9 k Ω , R

CLASS 255 4420 Ω

(1)

I

≤ 400 mA

RTN

400 mA < I

= 255 Ω , R

(CLASS)

DET open, V
I

(VDD)

DET open, V
I

(VDD)

(DET)

V

(RTN)

R

(DET)

measure I
I

(DET)

Measure I
V

(VDD)

R

(CLASS)

(1)

R

(CLASS)

R

(CLASS)

R

(CLASS)

R

(CLASS)

≤ 600 mA

RTN

= 287 k Ω , and –40 ° C ≤ TJ≤ 125 ° C, unless otherwise noted. Positive

(ILIM)

(VDD)

+ I

(RTN)

(VDD)

+ I

(RTN)

= V

= 57 V, measure I

(VDD)

= V

, V

(VDD)

= 24.9 k Ω ,

+ I

(VDD)

+ I

(VDD)

= V

(RTN)

= 4420 Ω 2.2 2.4 2.8
= 953 Ω 10.3 10.6 11.3
= 549 Ω 17.7 18.3 19.5
= 357 Ω 27.1 28 29.5
= 255 Ω 38 39.4 41.2

Regulator turns on, V

(2)

= V

= 1.9 V, measure

(RTN)

= V

= 10.1 V, measure

(RTN)

(DET)

= 1.4 V 53.7 56 58.3 µ A

(VDD)

+

(RTN)

(RTN)

V

= 10.1 V 395 410 417 µ A

(VDD)

, 13 V ≤ V

rising 10.2 11.3 13

(VDD)

≤ 21 V,

(VDD)

Hysteresis 1.6 1.8 1.95
Regulator turns off, V

rising 21 21.9 23 V

(VDD)

Hysteresis 0.5 0.78 1 V

= 0 V, V

(CLASS)

= V

(VDD)

(RTN)

= 1 V 625 765 900 mA

(RTN)

= 2 V, R

(RTN)

V

falling, R

(2)

(RTN)

state → normal operation

(VDD)

= 15 V, V

= 57 V 1 µ A

(VDD)

= 30 V 15 µ A

= 178 k Ω 160 224 296 mA

(ILIM)

= 287 k Ω , inrush

(ILIM)

= 0 V 1 µ A

(UVLO)

125 1000 k Ω

-40 125

-40 105

0.1 5 µ A

85% 91% 100%

mA

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10-V

Regulator

Thermalshutdown

50mW

3

2

11.3V

and9.5V

1.5V

and 10V

-

+

RTN

36mV

CLASS

DET

Current

Limit Amp.

EN

Delay
150 Sm

5

6

PG

1 =Limiting

PGComparator

Detection

Comparator

Classification

Comparator

0

1

800 W

2.5V

1:1

Current

Mirror

1

ILIM

4

VSS

7

UVLO

-

-

-

-

-

+

+

+

+

+

Q

S

R

2.49V

and1.93V

UVLO

Comp.

1 =Inrush

21.9V

and21.1V

VDD

8

TPS2376-H

SLVS646A – SEPTEMBER 2006 – REVISED SEPTEMBER 2006

ELECTRICAL CHARACTERISTICS (continued)

V

= 48 V, R

(VDD)

currents are into pins. Typical values are at 25 ° C. All voltages are with respect to VSS unless otherwise noted.

PG

UVLO

V

(UVLO_R)

V

(UVLO_F)

THERMAL SHUTDOWN

BIAS CURRENT

(DET)

= 24.9 k Ω , R

= 255 Ω , R

(CLASS)

= 287 k Ω , and –40 ° C ≤ TJ≤ 125 ° C, unless otherwise noted. Positive

(ILIM)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Voltage threshold rising

(3)

V

rising 9.5 10 10.5 V

(RTN)

PG deglitch Delay rising and falling PG 75 150 225 µ s

I

Output low voltage

Leakage current V

Voltage at UVLO - TPS2376-H V

= 2 mA, V

(PG)

V

= 38 V, V

(VDD)

I

= 2 mA, V

(PG)

= 57 V, V

(PG)

V

rising 2.43 2.49 2.57

(UVLO)

falling 1.87 1.93 1.98 V

(UVLO)

= 34 V,

(RTN)

falling

(RTN)

= 0 V, V

(RTN)

= 0 V 0.1 1 µ A

(RTN)

= 25 V 0.12 0.4 V

(VDD)

Hysteresis 0.53 0.56 0.58

Shutdown temperature Temperature rising 135 ° C
Hysteresis 20 ° C

Operating current I

(VDD)

0.12 0.4 V

240 450 µ A

(3) Start with V

= 0 V, then increase V

(RTN)

until PG switches. Measure before thermal shutdown occurs.

(RTN)

DEVICE INFORMATION

FUNCTIONAL BLOCK DIAGRAM

4

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1

2

3

4

5

6

7

8

VSS

CLASS

UVLO

DET

RTN

PG

VDD

ILIM

I

(LIM)

=

40000
R

(ILIM)

TPS2376-H

SLVS646A – SEPTEMBER 2006 – REVISED SEPTEMBER 2006

DEVICE INFORMATION (continued)

TPS2376-H

(TOP VIEW)

TERMINAL FUNCTIONS

PIN NAME I/O DESCRIPTION

ILIM 1 O

CLASS 2 O (PD). The IEEE classification levels and corresponding resistor values are shown in

DET 3 O Connect a 24.9-k Ω detection resistor from DET to VDD.
VSS 4 I Return line on the source side of the TPS2376-H from the PSE.
RTN 5 O Switched output side return line used as the low-side reference for the TPS2376-H load.
PG 6 O Open-drain, power-good output, active high, referenced to RTN.

UVLO 7 I
VDD 8 I Positive line from the rectified PSE provided input.
PowerPad™ - I

PIN NUMBER

'76-H

Connect a resistor from ILIM to VSS to set the start-up inrush current limit. The equation
for calculating the resistor is shown in the detailed pin description section for ILIM.

Connect a resistor from CLASS to VSS to set the classification of the powered device

Table 1 .

UVLO comparator input that controls pass-device turn-on and off. Connect UVLO to a
resistor divider from VDD to VSS.

The PowerPad must be connected to VSS. The VSS copper on the circuit board must be
a large fill area to assist in heat dissipation.

Detailed Pin Description

The following descriptions refer to the schematic of Figure 1 and the functional block diagram.
ILIM: A resistor from this pin to VSS sets the inrush current limit per Equation 1 :

where ILIM is the desired inrush current value, in Amperes, and R
from ILIM to VSS, in ohms. The practical limits on R

are 125 k Ω to 1 M Ω . A value of 287 k Ω is

(ILIM)

recommended for compatibility with legacy power sourcing equipment (PSE).
Inrush current limiting prevents current drawn by the bulk capacitor from causing the line voltage to sag below

the lower UVLO threshold. Adjustable inrush current limiting allows the use of arbitrarily large capacitors and
also accommodates legacy systems that require low inrush currents.

The ILIM pin must not be left open or shorted to VSS.
CLASS: Classification is implemented by means of an external resistor, R

and VSS. The controller draws current from the input line through R
13 V and 21 V. The classification currents specified in the electrical characteristics table include the bias current
flowing into VDD and any RTN leakage current.

A high power system will not meet the standard power CLASS ranges defined in IEEE 802.3af, which are shown
for reference in Table 1 . An end-to-end high power system may either redefine the CLASS power, or dispense
with CLASS entirely.

The CLASS pin must not be shorted to ground.

is the value of the programming resistor

(ILIM)

, connected between CLASS

(CLASS)

(CLASS)

when the input voltage lies between

(1)

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TPS2376-H

SLVS646A – SEPTEMBER 2006 – REVISED SEPTEMBER 2006

Table 1. CLASSIFICATION - IEEE 802.3af values

CLASS PD POWER (W) R

0 0.44 – 12.95 4420 ± 1% 0 - 4 Default class
1 0.44 – 3.84 953 ± 1% 9 - 12
2 3.84 – 6.49 549 ± 1% 17 - 20
3 6.49 – 12.95 357 ± 1% 26 - 30
4 - 255 ± 1% 36 - 44 Reserved for future use

( Ω ) 802.3af LIMITS (mA) NOTE

(CLASS)

DET: R
input line when V

should be connected between VDD and the DET pin when it is used. R

(DET)

lies between 1.4 V and 11.3 V, and is disconnected when the line voltage exceeds this

(VDD)

is connected across the

(DET)

range to conserve power.
The parallel combination of R

and the UVLO program resistors must equal 24.9 k Ω , ± 1%. Minimizing R

(DET)

and maximizing the UVLO program resistors, improves efficiency during normal operation. Conversely, R
may be eliminated with the UVLO divider providing the 24.9 k Ω signature to reduce component count.

VSS: This is the input supply negative rail that serves as a local ground. The PowerPad must be connected to
this pin.

RTN: This pin provides the switched negative power rail used by the downstream circuits. The operational and
inrush current limit control current into the pin. The PG circuit monitors the RTN voltage and also uses it as the
return for the PG pin pulldown transistor. The internal MOSFET body diode clamps VSS to RTN when voltage is
present between VDD and RTN and the Power-over-Ethernet (PoE) input is not present.

PG: This pin goes to a high resistance state when the internal MOSFET that feeds the RTN pin is enabled, and
the device is not in inrush current limiting. In all other states except detection, the PG output is pulled to RTN by
the internal open-drain transistor. Performance is ensured with at least 4 V between VDD and RTN.

PG is an open-drain output, which may require a pullup resistor or other interface to the dc/dc converter. PG
may be left open if not used.

UVLO: The UVLO pin is used with an external resistor divider between VDD and VSS to set the upper and
lower UVLO thresholds. The TPS2376-H enables the output when V

exceeds the upper UVLO threshold,

(UVLO)

and turns it off when the input falls below the lower threshold.
The UVLO divider resistance may be used alone to provide the 24.9 k Ω detection signature, or be used in

conjunction with R

Figure 1 demonstrates the elimination of R

. Eliminating R

(DET)

reduces the component count at the cost of lower operating efficiency.

(DET)

.

(DET)

VDD: This is the positive input supply that is also common to downstream load circuits. This pin provides
operating power and allows the controller to monitor the line voltage to determine the mode of operation.

,

(DET)

(DET)

6

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0

1

2

3

4

5

6

0 1 2 3 4 5 6 7 8 9 10 11

T =25 C

J

o

T =125 C

J

o

T =-40 C

J

o

V

(VDD)

− V

Current

−

Am

10

15

20

25

30

35

1 3 5 7 9 11

Specification Limits

V

(PI)

− V

Resistance − kΩ

11.0

11.1

11.2

11.3

−40 −20 0 20 40 60 80 100 120

ClassificationTurnonVoltage − V

T − JunctionTJemperature − C

o

21.90

21.91

21.92

21.93

21.94

−40 −20 0 20 40 60 80 100 120

ClassificationTurnoffVoltage − V

T − JunctionTJemperature − C

o

0.100

0.150

0.200

0.250

0.300

0.350

22 27 32 37 42 47 52 57

VDD − V

I

(VDD)

− mA

T =125 C

J

o

T =25 C

J

o

T =-40 C

J

o

0.4

0.5

0.6

0.7

0.8

0.9

−40 −20 0 20 40 60 80 100 120

PassDeviceResistance − W

T − JunctionTJemperature − C

o

2.484

2.485

2.486

2.487

2.488

2.489

−40 −20 0 20 40 60 80 100 120

TJ− JunctionTemperature − C°

V

(UVLO)

− V

150

175

200

250

−40 −20 0 20 40 60 80 100 120

TJ− JunctionTemperature − C°

I

(RTN)

− INRUSHCURRENTLIMIT − mA

100

125

225

R =178k

I(LIM)

W

R =278k

I(LIM)

W

1.923

1.924

1.925

1.926

1.927

1.928

1.929

−40 −20 0 20 40 60 80 100 120

TJ− JunctionTemperature − C°

V

(U

VLO)

− V

SLVS646A – SEPTEMBER 2006 – REVISED SEPTEMBER 2006

TYPICAL CHARACTERISTICS

Graphs over temperature are interpolations between the marked data points.

TPS2376-H

PD DETECTION RESISTANCE VOLTAGE

CLASSIFICATION TURN ON

vs vs

I

+ I

(VDD)

IN DETECTION V

(RTN)

(PI)

Figure 2. Figure 3. Figure 4.

CLASSIFICATION TURN OFF PASS DEVICE

VOLTAGE I

vs vs vs

(VDD)

TEMPERATURE VDD TEMPERATURE

TEMPERATURE

RESISTANCE

Figure 5. Figure 6. Figure 7.

UVLO RISING UVLO FALLING INRUSH CURRENT

vs vs vs

TEMPERATURE TEMPERATURE TEMPERATURE

Figure 8. Figure 9. Figure 10.

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