•Ultra-Low On Resistance (RON)
– RON= 16 mΩ at VIN= 5 V (V
– RON= 16 mΩ at VIN= 3.6 V (V
– RON= 16 mΩ at VIN= 1.8 V (V
BIAS
BIAS
BIAS
= 5 V)
= 5 V)
= 5 V)
•6-A Maximum Continuous Switch Current
•Low Quiescent Current (50 µA)
•Low Control Input Threshold Enables Use of
1.2-V, 1.8-V, 2.5-V, and 3.3-V Logic
•Configurable Rise Time
•Quick Output Discharge (QOD) (TPS22965 Only)
•SON 8-pin Package With Thermal Pad
•ESD Performance Tested per JESD 22
– 2000-V HBM and 1000-V CDM
2Applications
•Ultrabook™
•Notebooks/Netbooks
•Tablet PC
•Consumer Electronics
•Set-top Boxes/Residential Gateways
•Telecom Systems
•Solid State Drives (SSDs)
The TPS22965x is a single channel load switch that
provides configurable rise time to minimize inrush
current. The device contains an N-channel MOSFET
that can operate over an input voltage range of 0.8 V
to 5.7 V and can support a maximum continuous
current of 6 A. The switch is controlled by an on/off
input (ON), which is capable of interfacing directly
with low-voltage control signals. In the TPS22965, a
225-Ω on-chip load resistor is added for quick output
discharge when switch is turned off.
The TPS22965x is available in a small, space-saving
2.00 mm × 2.00 mm 8-pin SON package (DSG) with
integrated thermal pad allowing for high power
dissipation. The device is characterized for operation
over the free-air temperature range of –40°C to
105°C.
Device Information
PART NUMBERPACKAGEBODY SIZE (NOM)
TPS22965xWSON (8)2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
TPS22965
SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015
(1)
4Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Changes from Revision C (February 2015) to Revision DPage
•Added TPS22965N part number ........................................................................................................................................... 1
•Updated Thermal Information table ....................................................................................................................................... 5
•Updated typical AC timing parameters (tables, graphs and scope captures) ..................................................................... 11
Changes from Revision B (June 2014) to Revision CPage
•Extended Recommended Operating free-air temperature range maximum to 105°C. ......................................................... 1
•Added temperature operations to Electrical Characteristics, V
•Added temperature operations to Electrical Characteristics, V
= 5.0 V ........................................................................... 5
BIAS
= 2.5 V ........................................................................... 6
BIAS
Changes from Revision A (August 2013) to Revision BPage
•Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1
•Changed MAX value of "VIN" from 5.5 V to 5.7 V. ................................................................................................................. 4
•Changed MAX value of "V
" from 5.5 V to 5.7 V. .............................................................................................................. 4
BIAS
•Changed MAX value of "VON" from 5.5 V to 5.7 V.................................................................................................................. 4
•Added Thermal Information table .......................................................................................................................................... 5
Changes from Original (August 2012) to Revision APage
•Updated VON MAX value to fix typo that restricted operating range. Changed MAX value from "VIN" to "5.5" to align
with rest of document. ........................................................................................................................................................... 4
DEVICERONAT 3.3 V (TYP)MAXIMUM OUTPUT CURRENTENABLE
TPS2296516 mΩYes6 AActive high
TPS22965N16 mΩNo6 AActive high
7Pin Configuration and Functions
QUICK OUTPUT
DISCHARGE
DSG PACKAGE
Pin Functions
PIN
NAMENO.
VIN1, 2I
ON3IActive high switch control input. Do not leave floating.
VBIAS4I
GND5—Device ground.
CT6OSwitch slew rate control. Can be left floating. See Adjustable Rise Time for more information.
VOUT7, 8OSwitch output
ThermalThermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See Layout Example
Padfor layout guidelines.
——
I/ODESCRIPTION
Switch input. Input bypass capacitor recommended for minimizing VINdip. Must be connected to
Pin 1 and Pin 2. See Application and Implementation for more information.
Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5 V to
5.7 V. See Application and Implementation for more information.
over operating free-air temperature range (unless otherwise noted)
V
V
V
V
I
MAX
I
PLS
T
T
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
(2) All voltage values are with respect to network ground pin.
Input voltage–0.36V
IN
Output voltage–0.36V
OUT
Bias voltage–0.36V
BIAS
On voltage–0.36V
ON
Maximum continuous switch current6A
Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle8A
Maximum junction temperature125°C
J
Storage temperature–65150°C
stg
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions are not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
8.2 ESD Ratings
V
(ESD)
Electrostatic dischargeV
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
Charged-device model (CDM), per JEDEC specification JESD22-C101
(1) (2)
MINMAXUNIT
(1)
(2)
VALUEUNIT
±2000
±1000
8.3 Recommended Operating Conditions
MINMAXUNIT
V
V
V
V
V
V
C
T
A
(1) Refer to Application Information .
(2) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
Input voltage range0.8V
IN
Bias voltage range2.55.7V
BIAS
ON voltage range05.7V
ON
Output voltage rangeV
OUT
High-level input voltage, ONV
IH
Low-level input voltage, ONV
IL
Input capacitor1
IN
Operating free-air temperature range
have to be derated. Maximum ambient temperature [T
maximum power dissipation of the device in the application [P
in the application (θJA), as given by the following equation: T
= 2.5 V to 5.7 V1.15.7V
BIAS
= 2.5 V to 5.7 V00.5V
BIAS
(2)
] is dependent on the maximum operating junction temperature [T
A(max)
], and the junction-to-ambient thermal resistance of the part/package
All three RON curves have the sameNote:All three RONcurves have the same
values and hence only one line is visible.values; therefore, only one line is visible.
Figure 7. RONvs Ambient TemperatureFigure 8. RONvs Ambient Temperature
The TPS22965x device is a single channel, 6-A load switch in an 8-pin SON package. To reduce the voltage
drop in high current rails, the device implements an ultra-low resistance N-channel MOSFET. The device has a
programmable slew rate for applications that require specific rise-time.
The device has very low leakage current during off state. This prevents downstream circuits from pulling high
standby current from the supply. Integrated control logic, driver, power supply, and output discharge FET
eliminates the need for any external components, which reduces solution size and bill of materials (BOM) count.
A capacitor to GND on the CT pin sets the slew rate. The voltage on the CT pin can be as high as 12 V;
therefore, the minimum voltage rating for the CT capacitor should be 25 V for optimal performance. An
approximate formula for the relationship between CT and slew rate when V
Equation 1. This equation accounts for 10% to 90% measurement on V
and does NOT apply for CT = 0 pF.
OUT
Use Table 1 to determine rise times for when CT = 0 pF.
where
•SR = slew rate (in µs/V)
•CT = the capacitance value on the CT pin (in pF)
•The units for the constant 34 are µs/V. The units for the constant 0.38 are µs/(V × pF).(1)
Rise time can be calculated by multiplying the input voltage by the slew rate. The table below contains rise time
values measured on a typical device. Rise times shown below are only valid for the power-up sequence where
VINand V
are already in steady state condition before the ON pin is asserted high.
BIAS
Table 1. Rise Time vs CT Capacitor
RISE TIME (µs) 10% - 90%, CL= 0.1 µF, CIN= 1 µF, RL= 10 Ω, V
The TPS22965 includes a QOD feature. When the switch is disabled, a discharge resistor is connected between
VOUT and GND. This resistor has a typical value of 225 Ω and prevents the output from floating while the switch
is disabled.
9.3.3 Low Power Consumption During Off State
The ISDVINsupply current is 0.01 µA typical at 1.8 VIN. Typically, the downstream loads would have a
significantly higher off-state leakage current. The load switch allows system standby power consumption to be
reduced.
9.4 Device Functional Modes
The Table 2 lists the VOUT pin states as determined by the ON pin.
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.1.1 ON/OFF Control
The ON pin controls the state of the switch. Asserting ON high enables the switch. ON is active high and has a
low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard
GPIO logic thresholds. It can be used with any microcontroller with 1.2 V or higher GPIO voltage. This pin cannot
be left floating and must be driven either high or low for proper functionality.
10.1.2 Input Capacitor (Optional)
To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CINcan be used to further reduce
the voltage drop during high current applications. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.
10.1.3 Output Capacitor (Optional)
Due to the integrated body diode in the NMOS switch, a CINgreater than CLis highly recommended. A C
greater than CINcan cause V
flow through the body diode from V
to exceed VINwhen the system supply is removed. This could result in current
OUT
to VIN. A CINto CLratio of 10 to 1 is recommended for minimizing VINdip
OUT
caused by inrush currents during startup; however, a 10 to 1 ratio for capacitance is not required for proper
functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VINdip upon
turn-on due to inrush currents. This can be mitigated by increasing the capacitance on the CT pin for a longer
rise time (see Adjustable Rise Time section below).
10.1.4 VINand V
For optimal RONperformance, make sure VIN≤ V
exhibit RONgreater than what is listed in the Electrical Characteristics, V
example of a typical device. Notice the increasing RONas VINexceeds V
voltage rating for VINand V
When the switch is enabled, the output capacitors must be charged up from 0 V to the set value (3.3 V in this
example). This charge arrives in the form of inrush current. Inrush current can be calculated using the following
equation:
Inrush Current = C × dV/dt
where
•C = output capacitance
•dV = output voltage
•dt = rise time(2)
The TPS22965x offers adjustable rise time for VOUT. This feature allows the user to control the inrush current
during turn-on. The appropriate rise time can be calculated using the design requirements and the inrush current
equation.
400 mA = 22 µF × 3.3 V/dt(3)
dt = 181.5 µs(4)
To ensure an inrush current of less than 400 mA, choose a CT value that will yield a rise time of more than 181.5
µs. See the oscilloscope captures below (Application Curves) for an example of how the CT capacitor can be
used to reduce inrush current.
10.2.3 Application Curves
V
= 5 VVIN= 3.3 VCL= 22 µFV
BIAS
Figure 36. Inrush Current with CT = 0 pFFigure 37. Inrush Current with CT = 220 pF
= 5 VVIN= 3.3 VCL= 22 µF
BIAS
11Power Supply Recommendations
The device is designed to operate from a VBIAS range of 2.5 V to 5.7 V and a VIN range of 0.8 V to VBIAS.
Thermal relief vias connected
to the exposed thermal pad
GND
TPS22965
www.ti.com
SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015
12Layout
12.1 Layout Guidelines
For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects
along with minimizing the case to ambient thermal impedance. The CT trace should be as short as possible to
avoid parasitic capacitance.
12.2 Layout Example
Figure 38. Layout Recommendation
12.3 Thermal Considerations
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, P
following equation as a guideline:
where
•P
•T
•TA= ambient temperature of the device
•ΘJA= junction to air thermal impedance. See the Thermal Information. This parameter is highly dependent
Refer to Figure 38, notice that the thermal vias are located under the exposed thermal pad of the device. This
allows for thermal diffusion away from the device.
= maximum allowable junction temperature (125°C for the TPS22965x)
J(max)
upon board layout.(5)
Product Folder Links: TPS22965
for a given output current and ambient temperature, use the
D(max)
TPS22965
SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015
www.ti.com
13Device and Documentation Support
13.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.2 Trademarks
E2E is a trademark of Texas Instruments.
Ultrabook is a trademark of Intel.
All other trademarks are the property of their respective owners.
13.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
Lead/Ball Finish
(6)
CU NIPDAULevel-2-260C-1 YEAR-40 to 105ZSA0
CU NIPDAULevel-2-260C-1 YEAR-40 to 105ZSA0
CU NIPDAULevel-2-260C-1 YEAR-40 to 105ZDVI
MSL Peak Temp
(3)
Op Temp (°C)Device Marking
(4/5)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
26-Jun-2015
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS22965 :
Automotive: TPS22965-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
ProductsApplications
Audiowww.ti.com/audioAutomotive and Transportationwww.ti.com/automotive
Amplifiersamplifier.ti.comCommunications and Telecomwww.ti.com/communications
Data Convertersdataconverter.ti.comComputers and Peripheralswww.ti.com/computers
DLP® Productswww.dlp.comConsumer Electronicswww.ti.com/consumer-apps
DSPdsp.ti.comEnergy and Lightingwww.ti.com/energy
Clocks and Timerswww.ti.com/clocksIndustrialwww.ti.com/industrial
Interfaceinterface.ti.comMedicalwww.ti.com/medical
Logiclogic.ti.comSecuritywww.ti.com/security
Power Mgmtpower.ti.comSpace, Avionics and Defensewww.ti.com/space-avionics-defense
Microcontrollersmicrocontroller.ti.comVideo and Imagingwww.ti.com/video
RFIDwww.ti-rfid.com
OMAP Applications Processorswww.ti.com/omapTI E2E Communitye2e.ti.com
Wireless Connectivitywww.ti.com/wirelessconnectivity