Texas Instruments TPS22965DSGR, TPS22965NDSGR Schematic [ru]

0

5

10

15

20

25

30

35

40

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5

R

ON

(m)

VIN (V)

-40C

25C

105C

C001

Power

Supply

OFF

ON

TPS22965x

VIN

VOUT

R

L

C

L

GND

ON

CT

C

IN

VBIAS

GND

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TPS22965x 5.7-V, 6-A, 16-mΩ On-Resistance Load Switch

1 Features 3 Description

1

• Integrated Single Channel Load Switch

• Input Voltage Range: 0.8 V to 5.7 V

• Ultra-Low On Resistance (RON)
– RON= 16 mΩ at VIN= 5 V (V
– RON= 16 mΩ at VIN= 3.6 V (V
– RON= 16 mΩ at VIN= 1.8 V (V

BIAS

BIAS
BIAS

= 5 V)

= 5 V)
= 5 V)

• 6-A Maximum Continuous Switch Current

• Low Quiescent Current (50 µA)

• Low Control Input Threshold Enables Use of

1.2-V, 1.8-V, 2.5-V, and 3.3-V Logic

• Configurable Rise Time

• Quick Output Discharge (QOD) (TPS22965 Only)

• SON 8-pin Package With Thermal Pad

• ESD Performance Tested per JESD 22
– 2000-V HBM and 1000-V CDM

2 Applications

• Ultrabook™

• Notebooks/Netbooks

• Tablet PC

• Consumer Electronics

• Set-top Boxes/Residential Gateways

• Telecom Systems

• Solid State Drives (SSDs)

The TPS22965x is a single channel load switch that
provides configurable rise time to minimize inrush
current. The device contains an N-channel MOSFET
that can operate over an input voltage range of 0.8 V
to 5.7 V and can support a maximum continuous
current of 6 A. The switch is controlled by an on/off
input (ON), which is capable of interfacing directly
with low-voltage control signals. In the TPS22965, a
225-Ω on-chip load resistor is added for quick output
discharge when switch is turned off.

The TPS22965x is available in a small, space-saving

2.00 mm × 2.00 mm 8-pin SON package (DSG) with
integrated thermal pad allowing for high power
dissipation. The device is characterized for operation
over the free-air temperature range of –40°C to
105°C.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

TPS22965x WSON (8) 2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at

the end of the data sheet.

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

(1)

4 Simplified Schematic

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

RONvs VIN(V

BIAS

= 5 V, I

= –200 mA)

OUT

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

www.ti.com

Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Simplified Schematic............................................. 1

5 Revision History..................................................... 2

6 Device Comparison Table..................................... 3

7 Pin Configuration and Functions......................... 3

8 Specifications......................................................... 4

8.1 Absolute Maximum Ratings ...................................... 4

8.2 ESD Ratings.............................................................. 4

8.3 Recommended Operating Conditions....................... 4

8.4 Thermal Information.................................................. 5

8.5 Electrical Characteristics, V

8.6 Electrical Characteristics, V

8.7 Switching Characteristics.......................................... 7

8.8 Typical DC Characteristics........................................ 8

8.9 Typical Switching Characteristics ........................... 11

= 5.0 V ................... 5

BIAS

= 2.5 V ................... 6

BIAS

9 Detailed Description ............................................ 14

9.1 Overview ................................................................. 14

9.2 Functional Block Diagram....................................... 14

9.3 Feature Description................................................. 15

9.4 Device Functional Modes........................................ 15

10 Application and Implementation........................ 16

10.1 Application Information.......................................... 16

10.2 Typical Application ................................................ 17

11 Power Supply Recommendations ..................... 18

12 Layout................................................................... 19

12.1 Layout Guidelines ................................................. 19

12.2 Layout Example .................................................... 19

12.3 Thermal Considerations........................................ 19

13 Device and Documentation Support ................. 20

13.1 Community Resources.......................................... 20

13.2 Trademarks........................................................... 20

13.3 Electrostatic Discharge Caution............................ 20

13.4 Glossary................................................................ 20

14 Mechanical, Packaging, and Orderable

Information........................................................... 20

5 Revision History

Changes from Revision C (February 2015) to Revision D Page

• Added TPS22965N part number ........................................................................................................................................... 1

• Updated Thermal Information table ....................................................................................................................................... 5

• Updated typical AC timing parameters (tables, graphs and scope captures) ..................................................................... 11

Changes from Revision B (June 2014) to Revision C Page

• Extended Recommended Operating free-air temperature range maximum to 105°C. ......................................................... 1

• Added temperature operations to Electrical Characteristics, V

• Added temperature operations to Electrical Characteristics, V

= 5.0 V ........................................................................... 5

BIAS

= 2.5 V ........................................................................... 6

BIAS

Changes from Revision A (August 2013) to Revision B Page

• Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and

Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1

• Changed MAX value of "VIN" from 5.5 V to 5.7 V. ................................................................................................................. 4

• Changed MAX value of "V

" from 5.5 V to 5.7 V. .............................................................................................................. 4

BIAS

• Changed MAX value of "VON" from 5.5 V to 5.7 V.................................................................................................................. 4

• Added Thermal Information table .......................................................................................................................................... 5

Changes from Original (August 2012) to Revision A Page

• Updated VON MAX value to fix typo that restricted operating range. Changed MAX value from "VIN" to "5.5" to align

with rest of document. ........................................................................................................................................................... 4

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TOP VIEW

BOTTOM VIEW

VIN

VIN

ON

VBIAS

VIN

VIN

VBIAS

GND

VOUT

VOUT

CT

GND

VOUT

VOUT

CT

ON

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

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6 Device Comparison Table

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

DEVICE RONAT 3.3 V (TYP) MAXIMUM OUTPUT CURRENT ENABLE

TPS22965 16 mΩ Yes 6 A Active high

TPS22965N 16 mΩ No 6 A Active high

7 Pin Configuration and Functions

QUICK OUTPUT

DISCHARGE

DSG PACKAGE

Pin Functions

PIN

NAME NO.

VIN 1, 2 I
ON 3 I Active high switch control input. Do not leave floating.
VBIAS 4 I
GND 5 — Device ground.

CT 6 O Switch slew rate control. Can be left floating. See Adjustable Rise Time for more information.
VOUT 7, 8 O Switch output
Thermal Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See Layout Example

Pad for layout guidelines.

— —

I/O DESCRIPTION

Switch input. Input bypass capacitor recommended for minimizing VINdip. Must be connected to
Pin 1 and Pin 2. See Application and Implementation for more information.

Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5 V to

5.7 V. See Application and Implementation for more information.

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TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

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8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

V
V
V
V
I

MAX

I

PLS

T
T

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

(2) All voltage values are with respect to network ground pin.

Input voltage –0.3 6 V

IN

Output voltage –0.3 6 V

OUT

Bias voltage –0.3 6 V

BIAS

On voltage –0.3 6 V

ON

Maximum continuous switch current 6 A
Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle 8 A
Maximum junction temperature 125 °C

J

Storage temperature –65 150 °C

stg

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions are not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

8.2 ESD Ratings

V

(ESD)

Electrostatic discharge V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
Charged-device model (CDM), per JEDEC specification JESD22-C101

(1) (2)

MIN MAX UNIT

(1)

(2)

VALUE UNIT

±2000
±1000

8.3 Recommended Operating Conditions

MIN MAX UNIT

V
V
V
V
V
V
C
T

A

(1) Refer to Application Information .
(2) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

Input voltage range 0.8 V

IN

Bias voltage range 2.5 5.7 V

BIAS

ON voltage range 0 5.7 V

ON

Output voltage range V

OUT

High-level input voltage, ON V

IH

Low-level input voltage, ON V

IL

Input capacitor 1

IN

Operating free-air temperature range

have to be derated. Maximum ambient temperature [T
maximum power dissipation of the device in the application [P
in the application (θJA), as given by the following equation: T

= 2.5 V to 5.7 V 1.1 5.7 V

BIAS

= 2.5 V to 5.7 V 0 0.5 V

BIAS

(2)

] is dependent on the maximum operating junction temperature [T

A(max)

], and the junction-to-ambient thermal resistance of the part/package

D(max)

A (max)

= T

J(max)

– (θJA× P

D(max)

)

(1)

–40 105 °C

BIAS

IN

J(max)

V

V

µF

], the

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TPS22965

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SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

8.4 Thermal Information

TPS22965x

THERMAL METRIC

R

θJA

R

θJC(top)

R

θJB

ψ

JT

ψ

JB

R

θJC(bot)

Junction-to-ambient thermal resistance 72.3 °C/W
Junction-to-case (top) thermal resistance 96.1 °C/W
Junction-to-board thermal resistance 42.1 °C/W
Junction-to-top characterization parameter 3.3 °C/W
Junction-to-board characterization parameter 42.5 °C/W
Junction-to-case (bottom) thermal resistance 13.2 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(1)

DSG (WSON) UNIT

8 PINS

8.5 Electrical Characteristics, V

BIAS

= 5.0 V

Unless otherwise noted, the specification in the following table applies where V

PARAMETER TEST CONDITIONS T

POWER SUPPLIES AND CURRENTS

I

= 0 mA,

IQV
ISDV

ISDV

I

ON

VBIAS

V

quiescent current –40°C to 105°C 50 75 µA

BIAS

V

BIAS

IN

shutdown current VON= GND, V

BIAS

VINoff-state supply current µA

ON pin input leakage current VON= 5.5 V –40°C to 105°C 0.5 µA

RESISTANCE CHARACTERISTICS

R

ON

(1)

R

PD

ON-state resistance

Output pulldown resistance VIN= 5.0 V, VON= 0 V, I

(1) TPS22965 only

OUT

VIN= VON= V

VON= GND,
V

= 0 V

OUT

I

= –200 mA,

OUT

V

= 5.0 V

BIAS

= 5.0 V

BIAS

= 0 V –40°C to 105°C 2 µA

OUT

VIN= 5.0 V –40°C to 105°C 0.005 5
VIN= 3.3 V –40°C to 105°C 0.002 3
VIN= 1.8 V –40°C to 105°C 0.002 2
VIN= 0.8 V –40°C to 105°C 0.001 1

VIN= 5.0 V –40°C to 85°C 23 mΩ

VIN= 3.3 V –40°C to 85°C 23 mΩ

VIN= 1.8 V –40°C to 85°C 23 mΩ

VIN= 1.5 V –40°C to 85°C 23 mΩ

VIN= 1.2 V –40°C to 85°C 23 mΩ

VIN= 0.8 V –40°C to 85°C 23 mΩ

= 15 mA –40°C to 105°C 225 300 Ω

OUT

= 5.0 V. Typical values are for TA= 25 °C.

BIAS

A

MIN TYP MAX UNIT

25°C 16 21

–40°C to 105°C 25

25°C 16 21

–40°C to 105°C 25

25°C 16 21

–40°C to 105°C 25

25°C 16 21

–40°C to 105°C 25

25°C 16 21

–40°C to 105°C 25

25°C 16 21

–40°C to 105°C 25

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TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

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8.6 Electrical Characteristics, V

BIAS

= 2.5 V

Unless otherwise noted, the specification in the following table applies where V

PARAMETER TEST CONDITIONS T

POWER SUPPLIES AND CURRENTS

I

= 0 mA,

IQV
ISDV

ISDV

I

ON

VBIAS

V

quiescent current –40°C to 105°C 20 30 µA

BIAS

V

BIAS

IN

shutdown current VON= GND, V

BIAS

VINoff-state supply current µA

ON pin input leakage current VON= 5.5 V –40°C to 105°C 0.5 µA

RESISTANCE CHARACTERISTICS

R

ON

(1)

R

PD

ON-state resistance VIN= 1.5 V –40°C to 85°C 25 mΩ

Output pulldown resistance VIN= 2.5 V, VON= 0 V, I

(1) TPS22965 only

OUT

VIN= VON= V

VON= GND,
V

= 0 V

OUT

I

= –200 mA,

OUT

V

= 2.5 V

BIAS

= 2.5 V

BIAS

= 0 V –40°C to 105°C 2 µA

OUT

VIN= 2.5 V –40°C to 105°C 0.005 3
VIN= 1.8 V –40°C to 105°C 0.002 2
VIN= 1.2 V –40°C to 105°C 0.002 2
VIN= 0.8 V –40°C to 105°C 0.001 1

VIN= 2.5 V –40°C to 85°C 27 mΩ

VIN= 1.8 V –40°C to 85°C 26 mΩ

VIN= 1.2 V –40°C to 85°C 25 mΩ

VIN= 0.8 V –40°C to 85°C 25 mΩ

= 1 mA –40°C to 105°C 275 325 Ω

OUT

= 2.5 V. Typical values are for TA= 25 °C.

BIAS

A

MIN TYP MAX UNIT

25°C 20 24

–40°C to 105°C 28

25°C 19 23

–40°C to 105°C 28

25°C 18 23

–40°C to 105°C 27

25°C 18 23

–40°C to 105°C 27

25°C 17 22

–40°C to 105°C 27

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8.7 Switching Characteristics

PARAMETER TEST CONDITION MIN TYP MAX UNIT

VIN= VON= V

t
t
t
t
t

ON
OFF
R
F
D

Turn-on time 1600
Turn-off time 9
V
V
ON delay time 660

VIN= 0.8 V, VON= V

t
t
t
t
t

ON
OFF
R
F
D

Turn-on time 730
Turn-off time 100
V
V
ON delay time 560

VIN= 2.5 V, VON= 5 V, V

t
t
t
t
t

ON
OFF
R
F
D

Turn-on time 2435
Turn-off time 9
V
V
ON delay time 1230

VIN= 0.8 V, VON= 5 V, V

t
t
t
t
t

ON
OFF
R
F
D

Turn-on time 1565
Turn-off time 70
V
V
ON delay time 1110

= 5 V, TA= 25ºC (unless otherwise noted)

BIAS

rise time RL= 10 Ω, CL= 0.1 µF, CT= 1000 pF 1985 µs

OUT

fall time 3

OUT

= 5 V, TA= 25ºC (unless otherwise noted)

BIAS

rise time RL= 10 Ω, CL= 0.1 µF, CT= 1000 pF 380 µs

OUT

fall time 8

OUT

= 2.5 V, TA= 25ºC (unless otherwise noted)

BIAS

rise time RL= 10 Ω, CL= 0.1 µF, CT= 1000 pF 2515 µs

OUT

fall time 4

OUT

= 2.5 V, TA= 25ºC (unless otherwise noted)

BIAS

rise time RL= 10 Ω, CL= 0.1 µF, CT= 1000 pF 930 µs

OUT

fall time 8

OUT

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

A. Rise and fall times of the control signal is 100 ns.

Figure 1. Test Circuit

Figure 2. tON/t

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Waveforms

OFF

0

5

10

15

20

25

30

35

40

-50 0 50 100 150

R

ON

(m)

Temperature (£C)

VIN = 0.8V

VIN = 1.8V

VIN = 2.5V

C001

10

12

14

16

18

20

22

24

-50 0 50 100 150

R

ON

(m)

Temperature (£C)

VIN = 0.8V

VIN = 3.3V

VIN = 5V

C001

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

2 2.5 3 3.5 4 4.5 5 5.5 6

I

SD

V

BIAS

(µA)

V

BIAS

(V)

-40C

25C

105C

C001

0.000

0.002

0.004

0.006

0.008

0.010

0.012

0.014

0.016

0.018

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5

I

SD

V

IN

(µA)

V

(V)

-40°C

25°C

105°C

C001

0

10

20

30

40

50

60

70

2 2.5 3 3.5 4 4.5 5 5.5 6

I

Q

V

BIAS

(µA)

V

BIAS

(V)

-40C

25C

105C

C001

0

10

20

30

40

50

60

70

80

90

100

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6

I

Q

V

BIAS

(µA)

VIN (V)

-40C

25C

105C

C001

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

8.8 Typical DC Characteristics

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VIN= 1.8 V VON= 5 V V

Figure 3. V

Quiescent Current vs V

BIAS

BIAS

VIN= 5 V VON= 0 V V

Figure 5. ISDV

BIAS

vs V

BIAS

= 0 V V

OUT

= 0 V V

OUT

= 5 V VON= 5 V V

BIAS

Figure 4. IQV

= 5 V VON= 0 V V

BIAS

BIAS

vs V

Figure 6. ISDVINvs V

= 0 V

OUT

IN

= 0 V

OUT

IN

V

= 2.5 V I

BIAS

All three RON curves have the same Note: All three RONcurves have the same
values and hence only one line is visible. values; therefore, only one line is visible.

Figure 7. RONvs Ambient Temperature Figure 8. RONvs Ambient Temperature

8 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated

= –200 mA VON= 5.5 V V

OUT

Product Folder Links: TPS22965

= 5 V I

BIAS

= –200 mA VON= 5.5 V

OUT

-0.5

0

0.5

1

1.5

2

2.5

0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5

V

OUT

(V)

VON (V)

VBIAS = 2.5V

VBIAS = 3.3V
VBIAS = 5V

VBIAS = 5.5V

C001

10

12

14

16

18

20

22

24

26

28

30

0 0.5 1 1.5 2 2.5 3

R

ON

(m)

VIN (V)

-40C

25C

105C

C001

10

12

14

16

18

20

22

24

2 2.5 3 3.5 4 4.5 5 5.5 6

R

ON

(m)

V

BIAS

(V)

VIN = 0.8V

VIN = 1.8V

VIN = 2.5V

VIN = 3.3V

C001

200

220

240

260

280

300

320

2 2.5 3 3.5 4 4.5 5 5.5 6

R

PD

()

V

BIAS

(V)

-40C

25C

105C

C001

0

5

10

15

20

25

30

35

40

0 0.5 1 1.5 2 2.5 3

R

ON

(m)

VIN (V)

-40C

25C

105C

C001

0

5

10

15

20

25

30

35

40

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5

R

ON

(m)

VIN (V)

-40C

25C

105C

C001

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Typical DC Characteristics (continued)

V

= 2.5 V I

BIAS

= –200 mA VON= 5.5 V V

OUT

= 5 V I

BIAS

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

= –200 mA VON= 5.5 V

OUT

Figure 9. RONvs V

TA= 25°C I

Figure 11. RONvs V

IN

= –200 mA VON= 5.5 V VIN= 1.8 V VON= 0 V

OUT

BIAS

Figure 10. RONvs V

Figure 12. RPDvs V

IN

BIAS

VIN= 2 V TA= 25°C V

Figure 13. V

OUT

vs V

ON

= 2.5 V I

BIAS

= –4 A VON= 5.5 V

OUT

Figure 14. RONvs V

IN

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10

12

14

16

18

20

22

24

26

28

30

0 1 2 3 4 5 6

R

ON

(m)

VIN (V)

-40C

25C

105C

C001

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

Typical DC Characteristics (continued)

V

= 5 V I

BIAS

Figure 15. RONvs V

= –4 A VON= 5.5 V

OUT

IN

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0

20

40

60

80

100

120

0.0 0.5 1.0 1.5 2.0 2.5 3.0

t

OFF

(µs)

VIN (V)

-40°C
25°C
105°C

C001

0

20

40

60

80

100

120

140

160

0.0 1.0 2.0 3.0 4.0 5.0 6.0

t

OFF

(µs)

VIN (V)

-40°C
25°C
105°C

C001

0

2

4

6

8

10

12

0.0 0.5 1.0 1.5 2.0 2.5 3.0

t

F

(µs)

VIN (V)

-40°C
25°C
105°C

C001

0

2

4

6

8

10

12

0.0 1.0 2.0 3.0 4.0 5.0 6.0

t

F

(µs)

VIN (V)

-40°C
25°C
105°C

C001

400

600

800

1000

1200

1400

1600

0.0 0.5 1.0 1.5 2.0 2.5 3.0

t

D

(µs)

VIN (V)

-40°C
25°C
105°C

C001

200

300

400

500

600

700

800

900

0.0 1.0 2.0 3.0 4.0 5.0 6.0

t

D

(µs)

VIN (V)

-40°C
25°C
105°C

C001

www.ti.com

8.9 Typical Switching Characteristics

TA= 25°C, CT= 1000 pF, CIN= 1 µF, CL= 0.1 µF, RL= 10 Ω

V

= 2.5 V CT = 1000 pF V

BIAS

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

= 5 V CT = 1000 pF

BIAS

TPS22965

Figure 16. tDvs V

V

= 2.5 V CT = 1000 pF V

BIAS

Figure 18. tFvs V

IN

IN

Figure 17. tDvs V

= 5 V CT = 1000 pF

BIAS

Figure 19. tFvs V

IN

IN

V

= 2.5 V CT = 1000 pF V

BIAS

Figure 20. t

Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 11

OFF

vs V

IN

Product Folder Links: TPS22965

= 5 V CT = 1000 pF

BIAS

Figure 21. t

OFF

vs V

IN

0

500

1000

1500

2000

2500

3000

3500

0.0 0.5 1.0 1.5 2.0 2.5 3.0

t

R

(µs)

VIN (V)

-40°C
25°C
105°C

C001

0

500

1000

1500

2000

2500

0.0 1.0 2.0 3.0 4.0 5.0 6.0

t

R

(µs)

VIN (V)

-40°C
25°C
105°C

C001

0

500

1000

1500

2000

2500

3000

3500

0.0 0.5 1.0 1.5 2.0 2.5 3.0

t

ON

(µs)

VIN (V)

-40°C
25°C
105°C

C001

0

200

400

600

800

1000

1200

1400

1600

1800

2000

0.0 1.0 2.0 3.0 4.0 5.0 6.0

t

ON

(µs)

VIN (V)

-40°C
25°C
105°C

C001

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

Typical Switching Characteristics (continued)

TA= 25°C, CT= 1000 pF, CIN= 1 µF, CL= 0.1 µF, RL= 10 Ω

V

= 2.5 V CT = 1000 pF V

BIAS

= 5 V CT = 1000 pF

BIAS

www.ti.com

Figure 22. tONvs V

V

= 2.5 V CT = 1000 pF V

BIAS

Figure 24. tRvs V

IN

IN

Figure 23. tONvs V

= 5 V CT = 1000 pF

BIAS

Figure 25. tRvs V

IN

IN

VIN= 0.8 V V

BIAS

CL= 0.1 µF RL= 10 Ω CL= 0.1 µF RL= 10 Ω

Figure 26. Turn-on Response Time Figure 27. Turn-on Response Time

12 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated

= 2.5 V CIN= 1 µF VIN= 0.8 V V

Product Folder Links: TPS22965

= 5.0 V CIN= 1 µF

BIAS

www.ti.com

Typical Switching Characteristics (continued)

TA= 25°C, CT= 1000 pF, CIN= 1 µF, CL= 0.1 µF, RL= 10 Ω

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

VIN= 2.5 V V

= 2.5 V CIN= 1 µF, VIN= 5.0 V V

BIAS

= 5.0 V CIN= 1 µF

BIAS

CL= 0.1 µF RL= 10 Ω CL= 0.1 µF RL= 10 Ω

Figure 28. Turn-on Response Time Figure 29. Turn-on Response Time

VIN= 0.8 V V

= 2.5 V CIN= 1 µF VIN= 0.8 V V

BIAS

= 5.0 V CIN= 1 µF

BIAS

CL= 0.1 µF RL= 10 Ω CL= 0.1 µF RL= 10 Ω

Figure 30. Turn-off Response Time Figure 31. Turn-off Response Time

VIN= 2.5 V V

= 2.5 V CIN= 1 µF VIN= 5.0 V V

BIAS

= 5.0 V CIN= 1 µF

BIAS

CL= 0.1 µF RL= 10 Ω CL= 0.1 µF RL= 10 Ω)

Figure 32. Turn-off Response Time Figure 33. Turn-off Response Time

Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 13

Product Folder Links: TPS22965

Charge

Pump

Control

Logic

VIN

ON

VOUT

GND

CT

VBIAS

TPS22965 Only

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

www.ti.com

9 Detailed Description

9.1 Overview

The TPS22965x device is a single channel, 6-A load switch in an 8-pin SON package. To reduce the voltage
drop in high current rails, the device implements an ultra-low resistance N-channel MOSFET. The device has a
programmable slew rate for applications that require specific rise-time.

The device has very low leakage current during off state. This prevents downstream circuits from pulling high
standby current from the supply. Integrated control logic, driver, power supply, and output discharge FET
eliminates the need for any external components, which reduces solution size and bill of materials (BOM) count.

9.2 Functional Block Diagram

14 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated

Product Folder Links: TPS22965

SR 0.38 CT 34= ´ +

TPS22965

www.ti.com

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

9.3 Feature Description

9.3.1 Adjustable Rise Time

A capacitor to GND on the CT pin sets the slew rate. The voltage on the CT pin can be as high as 12 V;
therefore, the minimum voltage rating for the CT capacitor should be 25 V for optimal performance. An
approximate formula for the relationship between CT and slew rate when V

Equation 1. This equation accounts for 10% to 90% measurement on V

and does NOT apply for CT = 0 pF.

OUT

Use Table 1 to determine rise times for when CT = 0 pF.

where

• SR = slew rate (in µs/V)

• CT = the capacitance value on the CT pin (in pF)

• The units for the constant 34 are µs/V. The units for the constant 0.38 are µs/(V × pF). (1)

Rise time can be calculated by multiplying the input voltage by the slew rate. The table below contains rise time
values measured on a typical device. Rise times shown below are only valid for the power-up sequence where
VINand V

are already in steady state condition before the ON pin is asserted high.

BIAS

Table 1. Rise Time vs CT Capacitor

RISE TIME (µs) 10% - 90%, CL= 0.1 µF, CIN= 1 µF, RL= 10 Ω, V

CT (pF)

VIN = 5 V VIN = 3.3 V VIN = 1.8 V VIN = 1.5 V VIN = 1.2 V VIN = 1.05 V VIN = 0.8 V

0 180 136 94 84 74 70 60
220 547 378 232 202 173 157 129
470 962 654 386 333 282 252 206

1000 1983 1330 765 647 533 476 382
2200 4013 2693 1537 1310 1077 959 766
4700 8207 5490 3137 2693 2200 1970 1590

10000 17700 11767 6697 5683 4657 4151 3350

TYPICAL VALUES at 25°C with a 25 V X7R 10% CERAMIC CAPACITOR on CT

is set to 5 V is shown in

BIAS

= 5 V

BIAS

9.3.2 Quick Output Discharge (QOD) (TPS22965 Only)

The TPS22965 includes a QOD feature. When the switch is disabled, a discharge resistor is connected between
VOUT and GND. This resistor has a typical value of 225 Ω and prevents the output from floating while the switch
is disabled.

9.3.3 Low Power Consumption During Off State

The ISDVINsupply current is 0.01 µA typical at 1.8 VIN. Typically, the downstream loads would have a
significantly higher off-state leakage current. The load switch allows system standby power consumption to be
reduced.

9.4 Device Functional Modes

The Table 2 lists the VOUT pin states as determined by the ON pin.

Table 2. VOUT Connection

ON TPS22965 TPS22965N

L GND Open

H VIN VIN

Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 15

Product Folder Links: TPS22965

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

www.ti.com

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

10.1 Application Information

10.1.1 ON/OFF Control

The ON pin controls the state of the switch. Asserting ON high enables the switch. ON is active high and has a
low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard
GPIO logic thresholds. It can be used with any microcontroller with 1.2 V or higher GPIO voltage. This pin cannot
be left floating and must be driven either high or low for proper functionality.

10.1.2 Input Capacitor (Optional)

To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CINcan be used to further reduce
the voltage drop during high current applications. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.

10.1.3 Output Capacitor (Optional)

Due to the integrated body diode in the NMOS switch, a CINgreater than CLis highly recommended. A C
greater than CINcan cause V
flow through the body diode from V

to exceed VINwhen the system supply is removed. This could result in current

OUT

to VIN. A CINto CLratio of 10 to 1 is recommended for minimizing VINdip

OUT

caused by inrush currents during startup; however, a 10 to 1 ratio for capacitance is not required for proper
functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VINdip upon
turn-on due to inrush currents. This can be mitigated by increasing the capacitance on the CT pin for a longer
rise time (see Adjustable Rise Time section below).

10.1.4 VINand V

For optimal RONperformance, make sure VIN≤ V
exhibit RONgreater than what is listed in the Electrical Characteristics, V
example of a typical device. Notice the increasing RONas VINexceeds V
voltage rating for VINand V

Voltage Range

BIAS

BIAS

. The device will still be functional if VIN> V

BIAS

= 5.0 V table. See Figure 34 for an

BIAS

voltage. Never exceed the maximum

BIAS

BIAS

but it will

.

L

16 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated

Product Folder Links: TPS22965

Power
Supply

OFF

ON

TPS22965x

VIN

VOUT

R

L

C

L

GND

ON

CT

C

IN

VBIAS

GND

Power
Supply

www.ti.com

Application Information (continued)

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

TA= 25 °C I

Figure 34. RONvs V

= –200 mA

OUT

IN

10.2 Typical Application

This application demonstrates how the TPS22965x can be used to power downstream modules.

Figure 35. Powering a Downstream Module

10.2.1 Design Requirements

DESIGN PARAMETER EXAMPLE VALUE

V

IN

V

BIAS

C

L

Maximum Acceptable Inrush Current 400 mA

3.3 V
5 V

22 µF

Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 17

Product Folder Links: TPS22965

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

www.ti.com

10.2.2 Detailed Design Procedure

10.2.2.1 Inrush Current

When the switch is enabled, the output capacitors must be charged up from 0 V to the set value (3.3 V in this
example). This charge arrives in the form of inrush current. Inrush current can be calculated using the following
equation:

Inrush Current = C × dV/dt

where

• C = output capacitance

• dV = output voltage

• dt = rise time (2)

The TPS22965x offers adjustable rise time for VOUT. This feature allows the user to control the inrush current
during turn-on. The appropriate rise time can be calculated using the design requirements and the inrush current
equation.

400 mA = 22 µF × 3.3 V/dt (3)
dt = 181.5 µs (4)

To ensure an inrush current of less than 400 mA, choose a CT value that will yield a rise time of more than 181.5
µs. See the oscilloscope captures below (Application Curves) for an example of how the CT capacitor can be
used to reduce inrush current.

10.2.3 Application Curves

V

= 5 V VIN= 3.3 V CL= 22 µF V

BIAS

Figure 36. Inrush Current with CT = 0 pF Figure 37. Inrush Current with CT = 220 pF

= 5 V VIN= 3.3 V CL= 22 µF

BIAS

11 Power Supply Recommendations

The device is designed to operate from a VBIAS range of 2.5 V to 5.7 V and a VIN range of 0.8 V to VBIAS.

18 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated

Product Folder Links: TPS22965

J(max) A

D(max)

JA

T T

-

=

θ

Pin 1

VIN

VIN

ON

VBIAS

VOUT

VOUT

CT

GND

VIA to GND

*

*Note: Thermal relief vias

Thermal relief vias connected
to the exposed thermal pad

GND

TPS22965

www.ti.com

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

12 Layout

12.1 Layout Guidelines

For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects
along with minimizing the case to ambient thermal impedance. The CT trace should be as short as possible to
avoid parasitic capacitance.

12.2 Layout Example

Figure 38. Layout Recommendation

12.3 Thermal Considerations

The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, P
following equation as a guideline:

where

• P

• T

• TA= ambient temperature of the device

• ΘJA= junction to air thermal impedance. See the Thermal Information. This parameter is highly dependent

Refer to Figure 38, notice that the thermal vias are located under the exposed thermal pad of the device. This
allows for thermal diffusion away from the device.

Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 19

= maximum allowable power dissipation

D(max)

= maximum allowable junction temperature (125°C for the TPS22965x)

J(max)

upon board layout. (5)

Product Folder Links: TPS22965

for a given output current and ambient temperature, use the

D(max)

TPS22965

SLVSBJ0D –AUGUST 2012–REVISED JUNE 2015

www.ti.com

13 Device and Documentation Support

13.1 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

13.2 Trademarks

E2E is a trademark of Texas Instruments.
Ultrabook is a trademark of Intel.
All other trademarks are the property of their respective owners.

13.3 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

13.4 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

20 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated

Product Folder Links: TPS22965

PACKAGE OPTION ADDENDUM

www.ti.com

26-Jun-2015

PACKAGING INFORMATION

Orderable Device Status

TPS22965DSGR ACTIVE WSON DSG 8 3000 Green (RoHS

TPS22965DSGT ACTIVE WSON DSG 8 250 Green (RoHS

TPS22965NDSGR ACTIVE WSON DSG 8 3000 Green (RoHS

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

Package Type Package

(1)

Drawing

Pins Package

Qty

Eco Plan

(2)

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

Lead/Ball Finish

(6)

CU NIPDAU Level-2-260C-1 YEAR -40 to 105 ZSA0

CU NIPDAU Level-2-260C-1 YEAR -40 to 105 ZSA0

CU NIPDAU Level-2-260C-1 YEAR -40 to 105 ZDVI

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Samples

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

26-Jun-2015

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TPS22965 :

Automotive: TPS22965-Q1

•

NOTE: Qualified Version Definitions:

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jun-2015

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type

TPS22965DSGR WSON DSG 8 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2

TPS22965DSGT WSON DSG 8 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2

TPS22965NDSGR WSON DSG 8 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2

Package

Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0

(mm)B0(mm)K0(mm)P1(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jun-2015

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TPS22965DSGR WSON DSG 8 3000 210.0 185.0 35.0
TPS22965DSGT WSON DSG 8 250 210.0 185.0 35.0

TPS22965NDSGR WSON DSG 8 3000 210.0 185.0 35.0

Pack Materials-Page 2

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