TEXAS INSTRUMENTS TPS2220A, TPS2223A, TPS2224A, TPS2226A Technical data

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23
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16
15
14
13

1
2
3
4
5
6
7
8
9
10
11
12

TPS2223A, TPS2224A

DB OR PWP PACKAGE

(TOP VIEW)

5V
5V

DATA

CLOCK

LATCH

NC

12V

†

AVPP
AVCC
AVCC

GND

RESET

5V
NC
NC
SHDN
12V

†

BVPP
BVCC
BVCC
NC
OC

3.3V

3.3V

NC − No internal connection

†

Pin 7 and 20 are NC for TPS2223A.

查询TPS2220ADB供应商

CARDBUS POWER-INTERFACE SWITCHES

FOR SERIAL PCMCIA CONTROLLERS

FEATURES APPLICATIONS

• Single-Slot Switch: TPS2220A

Dual-Slot Switches: TPS2223A, TPS2224A,
TPS2226A

• Fast Current Limit Response Time

• Fully Integrated VCC and VPP Switching for

3.3 V, 5 V, and 12 V (no 12 V on TPS2223A)

• Meets Current PC Card™ Standards

• V

• 12-V and 5-V Supplies Can Be Disabled

• TTL-Logic Compatible Inputs

• Short-Circuit and Thermal Protection

• 24-Pin HTSSOP, 24- or 30-Pin SSOP

• 140-µA (Typical) Quiescent Current from

• Break-Before-Make Switching

• Power-On Reset

• 40 ° C to 85 ° C Operating Ambient Temperature

Output Selection Independent of V

pp

3.3-V Input

Range

TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

• Notebook and Desktop Computers

• Bar Code Scanners

• Digital Cameras

• Set-Top Boxes

• PDAs

CC

DESCRIPTION

The TPS2223A, TPS2224A, and TPS2226A CardBus™ power-interface switches provide an integrated
power-management solution for two PC Card sockets. The TPS2220A is a single-slot option for this family of
devices. These devices allow the controlled distribution of 3.3 V, 5 V, and 12 V to each card slot. The
current-limiting and thermal-protection features eliminate the need for fuses. Current-limit reporting helps the user
isolate a system fault. The switch r
requirements stated in the PC Card specification, and optimized for cost. A faster maximum current limit
response time is the only difference between the TPS2223A, TPS2224A, and TPS2226A and the TPS2223,
TPS2224, and TPS2226.

Like the TPS2214 and TPS2214A and the TPS2216 and TPS2216A, this family of devices supports independent
VPP/VCC switching; however, the standby and interface-mode pins are not supported. Shutdown mode is now
supported independently on SHDN as well as in the serial interface. Optimized for lower power implementation,
the TPS2223A does not support 12-V switching to VPP. See the available options table for pin-compatible device
information.

PC Card, CardBus are trademarks of PCMCIA (Personal Computer Memory Card International Association).
PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

and current-limit values have been set for the peak and average current

DS(on)

Copyright © 2002–2004, Texas Instruments Incorporated

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TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS

PACKAGED DEVICES

T

A

TPS2223ADB, TPS2224ADB TPS2226ADB

-40 ° C to 85 ° C TPS2220ADB TPS2220APWP

(1) The DB and PWP packages are also available taped and reeled. Add R suffix to device type (e.g., TPS2223APWPR) for taped and

reeled.

T

A

–40 ° C to 85 ° C Green

(1) The marketing status values are defined as follows:

• ACTIVE: This device recommended for new designs.

• LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

• NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend

using this part in a new design.

• PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

• OBSOLETE: TI has discontinued production of the device.

(2) Eco-Status Information – Additional details including specific material content can be accessed at www.ti.com/leadfree

• N/A: Not yet available Lead (Pb)-free, for estimated conversion dates go to www.ti.com/leadfree.

• Pb-Free: TI defines "Lead (Pb)-Free" or "Pb-Free" to mean RoHS compatible, including a lead concentration that does not exceed

0.1% of total product weight, and, if designed to be soldered, suitable for use in specified lead-free soldering processes.

• Green: TI devices "Green" to mean Lead (Pb)-Free and in addition, uses package materials that do not contain halogens, including
bromine (Br), or antimony (Sb) above 0.1% of total product weight.

Pin TPS2214, Pin

compatibles TPS2214A compatibles

SSOP(DB) STATUS

TPS2220ADBG4 Active TPS2220APWPRG4 Active
TPS2223ADBG4 Active TPS2223APWPRG4 Preview
TPS2224ADBG4 Active TPS2224APWPRG4 Preview
TPS2226ADBG4 Active TPS2226APWPRG4 Preview

PLASTIC SMALL OUTLINE PowerPAD™

DB-24 DB-30

TPS2216,
TPS2216A,
TPS2206

PLASTIC SMALL OUTLINE

TPS2223APWP,

TPS2224APWP

LEAD (PB-FREE) ORDERING INFORMATION

(1)

HTSSOP(PWP) STATUS

(1)

(PWP-24)

(1)

ECO-STATUS

(2)

2

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TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

V

I(3.3V)

V

V

I

T
T

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

(2) Not applicable for TPS2223A

Input voltage range for card power V

I

I(5V)

(2)

V

I(12V)

Logic input/output voltage –0.3 to 6 V

V

Output voltage

O

O(xVCC)

V

O(xVPP)

Continuous total power dissipation See Dissipation Rating Table

I

Output current

O

Operating virtual junction temperature range –40 to 100 ° C

J

Storage temperature range –55 to 150 ° C

stg

O(xVCC)

I

O(xVPP)

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds) 260 ° C
OC sink current 10 mA

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(1)

TPA222xA UNIT

–0.3 to 5.5 V
–0.3 to 5.5 V

–0.3 to 14 V

–0.3 to 6 V

–0.3 to 14 V

Internally Limited
Internally Limited

DISSIPATION RATING TABLE

PACKAGE

DB

(1)

24 890 mW 8.9 mW/ ° C 489 mW 356 mW
30 1095 mW 10.95 mW/ ° C 602 mW 438 mW

PWP 24 3322 mW 33.22 mW/ ° C 1827 mW 1329 mW

(1) These devices are mounted on an JEDEC low-k board (2-oz. traces on surface).

TA≤ 25 ° C DERATING FACTOR TA= 70 ° C TA= 85 ° C

POWER RATING ABOVE TA= 25 ° C POWER RATING POWER RATING

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

(1)

Input voltage, V
operations. 5V and 12V are only required for V
their respective functions.

I

O

f

(clock)

t

w

t

h

t

su

t

d(latch)

t

d(clock)

T

J

Output current

Clock frequency 2.5 MHz

Pulse duration ns

Data-to-clock hold time (see Figure 2 ) 100 ns
Data-to-clock setup time (see Figure 2 ) 100 ns
Latch delay time (see Figure 2 ) 100 ns
Clock delay time (see Figure 2 ) 250 ns
Operating virtual junction temperature (maximum to be calculated at worst case PDat 85 ° C

ambient)

(1) It is understood that for V
(2) Not applicable for TPS2223A

V

I(3.3V)

is required for all circuit

I(3.3V)
I(5V)

(2)

V

I(12V)

I

at TJ= 100 ° C 1 A

O(xVCC)

I

at TJ= 100 ° C 100 mA

O(xVPP)

Data 200
Latch 250
Clock 100
Reset 100

< 3 V, voltages within the absolute maximum ratings applied to pin 5V or pin 12V do not damage the IC.

I(3.3V)

3 3.6
3 5.5 V
7 13.5

–40 100 ° C

3

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TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

ELECTRICAL CHARACTERISTICS

TJ= 25 ° C, V
noted)

POWER SWITCH

r

DS(on)

I

OS

T

J

I

I

I

lkg

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account

separately.
(2) TPS2223A, TPS2224A, TPS2226A: two switches on. TPS2220A: one switch on.
(3) Specified by design; not tested in production.
(4) From application of short to 110% of final current limit.

= 5 V, V

I(5V)

PARAMETER TEST CONDITIONS

Static drain-source
on-state resistance

Output discharge
resistance

Short-circuit output current

Thermal shutdown
temperature

(2)

Current-limit response time

Input current, quiescent µA

Leakage current,
output off state

= 3.3 V, V

I(3.3V)

3.3V to xVCC

5V to xVCC

3.3V or 5V to xVPP

12V to xVPP

Discharge at xVCC I
Discharge at xVPP I

= 12 V (not applicable for TPS2223A), all outputs unloaded (unless otherwise

I(12V)

(1)

(2)

IO= 750 mA each 85 110
IO= 750 mA each, TJ= 100 ° C 110 140

(2)

IO= 500 mA each 95 130
IO= 500 mA each, TJ= 100 ° C 120 160
IO= 50 mA each 0.8 1

(2)

IO= 50 mA each, TJ= 100 ° C 1 1.3

(2)

IO= 50 mA each 2 2.5
IO= 50 mA each, TJ= 100 ° C 2.5 3.4

= 1 mA 0.5 0.7 1

O(disc)

= 1 mA 0.2 0.4 0.5

O(disc)

I

Limit (steady-state value), output pow­ered into a short circuit

Limit (steady-state value), output pow- I
ered into a short circuit,
TJ= 100 ° C

OS(xVCC)

I

OS(xVPP)
OS(xVCC)

I

OS(xVPP)

MIN TYP MAX UNIT

1 1.4 2 A

120 200 300 mA

1 1.4 2 A

120 200 300 mA

Thermal trip point Rising temperature 135
Hysteresis 10

(3) (4)

5V to xVCC = 5 V, with 100-m Ω short to GND 10
5V to xVPP = 5 V, with 100-m Ω short to GND 3

I
Normal VO(xVCC) = VO(xVPP) = 3.3 V and
operation also for RESET = 0 V

Shutdown mode I

Shutdown mode µA

I(3.3V)

I

I(5V)

I

I(12V)

I

I(3.3V)

VO(xVCC) = VO(xVPP) = Hi-z 0.1 2

I(5V)

I

I(12V)

V

= 5 V, V

O(xVCC)

V

= 12 V, V

O(xVPP)

= V

I(5V)

I(5V)

= 0 V

I(12V)

= V

= 0 V

I(12V)

TJ= 100 ° C 50

TJ= 100 ° C 50

m Ω

Ω

k Ω

° C

µs

140 200

8 12

100 180

0.3 2

0.3 2
10

10

4

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PARAMETER TEST CONDITIONS

LOGIC SECTION (CLOCK, DATA, LATCH, RESET, SHDN, OC)

(5)

I

I(/RESET)

(5)

I

I

I

V

IH

V

IL

V

O(sat)

I

lkg

Input current, logic SHDN = 0 V -50 -3 µA

High-level input voltage, logic 2 V
Low-level input voltage, logic 0.8 V
Output saturation voltage at OC IO= 2 mA 0.14 0.4 V
Leakage current at OC V

I(/SHDN)

(5)

I

I(LATCH)

I

I(CLOCK, DATA)

RESET = 5.5 V -1 1
RESET = 0 V -30 -20 -10
SHDN = 5.5 V -1 1

LATCH = 5.5 V 50
LATCH = 0 V -1 1
0 V to 5.5 V -1 1

O(/OC)

UVLO AND POR (POWER-ON RESET)

V

I(3.3V)

V

hys(3.3V)

V

I(5V)

V

hys(5V)

t

df

V

I(POR)

Input voltage at 3.3V pin, UVLO 3.3-V level below which all switches are Hi-Z 2.4 2.7 2.9 V
UVLO hysteresis voltage at VA

(6)

Input voltage at 5V pin, UVLO 5-V level below which only 5V switches are Hi-Z 2.3 2.5 V
UVLO hysteresis voltage at 5V
Delay time for falling response, UVLO

Input voltage, power-on reset

(6)

(6)

(6)

Delay from voltage hit (step from 3 V to 2.3 V) to
Hi-Z control (90% VGto GND)

3.3-V voltage below which POR is asserted causing a
RESET internally with all line switches open and all 1.7 V
discharge switches closed.

(5) LATCH has low-current pulldown. RESET and SHDN have low-current pullup.
(6) Specified by design; not tested in production.

TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

(1)

= 5.5 V 0 1 µA

MIN TYP MAX UNIT

100 mV

100 mV

4 µs

5

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TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

SWITCHING CHARACTERISTICS

V

= 5 V, TA= 25 ° C, V

CC

otherwise noted)

PARAMETER

t

Output rise times

r

t

Output fall times

f

Propagation delay

t

pd

times

(1)

(3)

= 3.3 V, V

I(3.3V)

C

L(xVCC)

I

(3)

(3)

O(xVCC)

C

L(xVCC)

I

O(xVCC)

C

L(xVCC)

I

O(xVCC)

C

L(xVCC)

I

O(xVCC)

C

L(xVCC)

I

O(xVCC)

C

L(xVCC)

I

O(xVCC)

= 5 V, V

I(5V)

= 12 V (not applicable for TPS2223A) all outputs unloaded (unless

I(12)

LOAD CONDITION TEST CONDITIONS

= 0.1 µF, C

= 0 A, I

= 150 µF, C

= 0.75 A, I

= 0.1 µF, C

= 0 A, I

= 150 µF, C

= 0.75 A, I

= 0.1 µF, C

= 0 A, I

= 150 µF, C

= 0.75 A, I

O(xVPP)

O(xVPP)

O(xVPP)

= 0.1 µF,

L(xVPP)

= 0 A

= 10 µF,

L(xVPP)

= 50 mA

O(xVPP)

= 0.1 µF,

L(xVPP)

= 0 A

= 10 µF,

L(xVPP)

= 50 mA

O(xVPP)

= 0.1 µF,

L(xVPP)

= 0 A

= 10 µF,

L(xVPP)

= 50 mA

O(xVPP)

(2)

V
V
V
V
V

Discharge switches ON
V

Discharge switches ON
V
V

Latch ↑ to xVPP (12V)

= 5 V 0.9

O(xVCC)

= 12 V 0.26

O(xVPP)

= 5 V 1.1

O(xVCC)

= 12 V 0.6

O(xVPP)

= 5 V,

O(xVCC)

= 12 V,

O(xVPP)

= 5 V 2.35

O(xVCC)

= 12 V 3.9

O(xVPP)

(4)

Latch ↑ to xVPP (5V)

Latch ↑ to xVPP (3.3V) ms

Latch ↑ to xVCC (5V)

Latch ↑ to xVCC (3.3V)

Latch ↑ to xVPP (12V)

(4)

Latch ↑ to xVPP (5V)

Latch ↑ to xVPP (3.3V) ms

Latch ↑ to xVCC (5V)

Latch ↑ to xVCC (3.3V)

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

t

pdon

t

pdoff

MIN TYP MAX UNIT

0.5

0.2

2

0.62

0.77

0.51

0.75

0.52

0.3

2.5

0.3

2.8

2.2

0.8

0.8

0.6

0.8

0.6

0.6

2.5

0.5

2.6

ms

ms

(1) Refer to Parameter Measurement Information in Figure 1 .
(2) No card inserted, assumes a 0.1-µF output capacitor (see Figure 1 ).
(3) Specified by design; not tested in production.
(4) Not applicable for TPS2223A

6

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CS

CS

S1

S4

CS

S7

CS

S11

Control Logic
SHDN
RESET
DATA
CLOCK
LATCH

OC

GND

UVLO

POR

Current Limit

Thermal Limit

S2

S5

S3

S6

S8

S9

S10

S12

S13

S14

Discharge
Element

13

14

3.3 V

3.3 V

Power
Inputs

3.3V
1

2

24

5 V
5 V
5 V

Power
Inputs

5V

7

12 V

Power
Inputs

12V

20

12 V

21
12

3
4
5

15

9

10

AVCC

AVCC

17

18

BVCC

BVCC

8

AVPP

19

BVPP

11

Power Outputs

NOTES:A. Diagram shown for 24-pin DB package.

B. Current sense
C. The two 12-V pins must be externally connected.
D. No connections for TPS2223A.

See Note B

See Note B

See Note B

See Note B

See Note C

See Note C

See Note C

See Note D

TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

FUNCTIONAL BLOCK DIAGRAM OF TPS2223A, TPS2224A and TPS2226A (see Note A)

7

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See Note A

See Note A

CS

S1

CS

S7

Control Logic
SHDN
RESET
DATA
CLOCK
LATCH

OC

GND

UVLO

POR

Current Limit

Thermal Limit

S2

S3

S4

S5

S6

3.3 V

5 V

5 V

12 V

AVCC

AVCC

AVPP

See Note B

NOTES:A. Current sense

B. The two 12-V pins must be externally connected.

12 V
See Note B

24
23
22
21
20
19
18
17
16
15
14
13

1
2
3
4
5
6
7
8
9
10
11
12

TPS2220A

DB OR PWP PACKAGE

(TOP VIEW)

5V
5V

DATA

CLOCK

LATCH

NC

12V

AVPP
AVCC
AVCC

GND

RESET

NC
NC
NC
SHDN
12V
NC
NC
NC
NC
OC
NC

3.3V

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

TPS2226A

DB PACKAGE

(TOP VIEW)

5V
5V

DATA

CLOCK

LATCH

NC

12V

AVPP
AVCC
AVCC
AVCC

GND

NC

RESET

3.3V

5V
NC
NC
NC
NC
SHDN
12V
BVPP
BVCC
BVCC
BVCC
NC
OC

3.3V

3.3V

NC - No internal connection

TPS2220A, TPS2223A
TPS2224A, TPS2226A

SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

FUNCTIONAL BLOCK DIAGRAM OF TPS2220A

8

PIN ASSIGNMENTS

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SLVS428B – MAY 2002 – REVISED SEPTEMBER 2004

Terminal Functions

TERMINAL

NAME

3.3V 13 13, 14 13, 14 15, 16, 17 I 3.3-V input for card power and chip power
5V 1, 2 1, 2, 24 1, 2, 24 1, 2, 30 I 5-V input for card power

12V 7, 20 NA 7, 20 7, 24 I

AVCC 9, 10 9, 10 9, 10 9, 10, 11 O

AVPP 8 8 8 8 O

BVCC -- 17, 18 17, 18 20, 21, 22 O

BVPP -- 19 19 23 O
GND 11 11 11 12 Ground
OC 15 15 15 18 O

SHDN 21 21 21 25 I

RESET 12 12 12 14 I
CLOCK 4 4 4 4 I Logic-level clock for serial data word

DATA 3 3 3 3 I Logic-level serial data word
LATCH 5 5 5 5 I Logic-level latch for serial data word, internal pulldown

NC 17, 18, 19, 26, 27, 28, No internal connection

TPS2220A TPS2223A TPS2224A TPS2226A

6, 14, 16, 6, 13, 19,

22, 23, 24 29

6, 7, 16, 6, 16, 22,

20, 22, 23 23

NO. I/O DESCRIPTION

12-V input for card power (xVPP). The two 12-V pins must be
externally connected.

Switched output that delivers 3.3 V, 5 V, ground or high impedance to
card

Switched output that delivers 3.3 V, 5 V, 12 V, ground or high
impedance to card (12 V not applicable to TPS2223A)

Switched output that delivers 3.3 V, 5 V, ground or high impedance to
card

Switched output that delivers 3.3 V, 5 V, 12 V, ground or high
impedance to card (12 V not applicable for TPS2223A)

Open-drain overcurrent reporting output that goes low when an
overcurrent condition exists. An external pullup is required.

Hi-Z (open) all switches. Identical function to serial D8. Asynchronous
active-low command, internal pullup

Logic-level RESET input active low. Asynchronous active-low com­mand, internal pullup

TPS2220A, TPS2223A
TPS2224A, TPS2226A

9