TEXAS INSTRUMENTS TPS2211 Technical data

CHIP FORM

TPS2211

SINGLE-SLOT PC CARD POWER INTERFACE SWITCH

FOR PARALLEL PCMCIA CONTROLLERS

SLVS156E – JULY 1997 – REVISED JANUARY 2001

D

Fully Integrated VCC and Vpp Switching for
Single-Slot PC Card Interface

D

Low r

3.3-V V

D

Compatible With Controllers From Cirrus,
Ricoh, O

(90-mΩ 5-V VCC Switch and

DS(on)

Switch)

CC

Micro, Intel, and Texas

2

Instruments

D

3.3-V Low-Voltage Mode

D

Meets PC Card Standards

D

12-V Supply Can Be Disabled Except

VCCD0
VCCD1

3.3V

3.3V
5V
5V

GND

OC

DB PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

During 12-V Flash Programming

D

Short-Circuit and Thermal Protection

D

Space-Saving 16-Pin SSOP (DB)

D

Compatible With 3.3-V, 5-V, and 12-V
PC Cards

D

Break-Before-Make Switching

description

The TPS221 1 PC Card power-interface switch provides an integrated power-management solution for a single
PC Card. All of the discrete power MOSFET s, a logic section, current limiting, and thermal protection for PC Card
control are combined on a single integrated circuit, using the Texas Instruments LinBiCMOS process. The
circuit allows the distribution of 3.3-V, 5-V, and/or 12-V card power, and is compatible with many PCMCIA
controllers. The current-limiting feature eliminates the need for fuses, which reduces component count and
improves reliability. Current-limit reporting can help the user isolate a system fault to the PC Card.

SHDN
VPPD0
VPPD1
AVCC
AVCC
AVCC
AVPP
12V

The TPS221 1 features a 3.3-V low-voltage mode that allows for 3.3-V switching without the need for 5 V. Bias
power can be derived from either the 3.3-V or 5-V inputs. This facilitates low-power system designs such as
sleep mode and pager mode where only 3.3 V is available.

End equipment for the TPS221 1 includes notebook computers, desktop computers, personal digital assistants
(PDAs), digital cameras, and bar-code scanners.

AVAILABLE OPTIONS

PACKAGED DEVICE

T

A

–40°C to 85°C TPS2211IDBR TPS2211Y

The DB package is only available taped and reeled, indicated by the
R suffix on the device type.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PC Card is a trademark of PCMCIA (Personal Computer Memory Card International Association).
LinBiCMOS is a trademark of Texas Instruments Incorporated.

SMALL OUTLINE

(DB)

(Y)

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  2001, Texas Instruments Incorporated

1

TPS2211
SINGLE-SLOT PC CARD POWER INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS

SLVS156E – JULY 1997 – REVISED JANUAR Y 2001

typical PC-card power-distribution application

TPS2211

AVCC
AVCC

AVCC

AVPP

12 V

5 V

1 µF0.1 µF

3.3 V

1 µF0.1 µF

12V
5V

5V

3.3V

3.3V

VCCD0
VCCD1

VPPD0
VPPD1

OC

SHDNGND

0.1 µF

0.1 µF

To CPU

V

CC1

V

CC2

PC Card

Connector

V

pp1

V

pp2

PCMCIA

Controller
VCC_EN0
VCC_EN1
VPP_EN0
VPP_EN1

CS

Shutdown Signal From CPU

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SINGLE-SLOT PC CARD POWER INTERFACE SWITCH

FOR PARALLEL PCMCIA CONTROLLERS

SLVS156E – JULY 1997 – REVISED JANUAR Y 2001

TPS2211Y chip information

This chip, when properly assembled, displays characteristics similar to those of the TPS2211. Thermal
compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. The chips may be
mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

TPS2211

140

2 1 16 15 14

3

4

5

6

13

13

12

11

VCCD0
VCCD1

3.3V

3.3V
5V

5V

GND

OC

CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.

1
2
3
4

TPS2211Y

5
6
7
8

16
15
14
13
12
11
10

SHDN
VPPD0

VPPD1
AVCC

AVCC
AVCC

AVPP

9

12V

7

10

8

9

77

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3

TPS2211

I/O

DESCRIPTION

Output current

SINGLE-SLOT PC CARD POWER INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS

SLVS156E – JULY 1997 – REVISED JANUAR Y 2001

Terminal Functions

TERMINAL

NAME NO.

3.3V 3, 4 I 3.3-V VCC input for card power and/or chip power if 5 V is not present
5V 5, 6 I 5-V VCC input for card power and/or chip power
12V 9 I 12-V Vpp input card power
AVCC 11, 12, 13 O Switched output that delivers 0 V, 3.3-V, 5-V, or high impedance to card
AVPP 10 O Switched output that delivers 0 V 3.3-V, 5-V, 12-V, or high impedance to card
GND 7 Ground
OC 8 O Logic-level overcurrent reporting output that goes low when an overcurrent conditions exists
SHDN 16 I Logic input that shuts down the TPS2211 and sets all power outputs to high-impedance state
VCCD0 1 I Logic input that controls voltage of AVCC (see control-logic table)
VCCD1 2 I Logic input that controls voltage of AVCC (see control-logic table)
VPPD0 15 I Logic input that controls voltage of AVPP (see control-logic table)
VPPD1 14 I Logic input that controls voltage of AVPP (see control-logic table)

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Input voltage range for card power: V

–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(5V)

V
V

–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(3.3V)

–0.3 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(12V)

†

Logic input voltage –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output current (each card): I
Operating

virtual junction temperature range, T

O(VCC)

I

O(VPP)

Operating free-air temperature range, T
Storage temperature range, T

stg

internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

J

–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A

–55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DISSIPATION RATING TABLE

PACKAGE

DB 775 mW 6.2 mW/°C 496 mW 403 mW

These devices are mounted on an FR4 board with no special thermal considerations.

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

recommended operating conditions

MIN MAX UNIT

V

I(5V)

Input voltage, V

p

Operating virtual junction temperature, T

I

V

I(3.3V)

V

I(12V)

I

O(AVCC)

I

O(AVPP)

J

0 5.25 V
0 5.25 V
0 13.5 V

1 A

150 mA

–40 125 °C

4

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PARAMETER

TEST CONDITIONS

†

UNIT

Switch resistance

I

high-impedance state

I

Leakage current

A

I

high-impedance state

I

J

PARAMETER

TEST CONDITIONS

†

UNIT

Logic output high level

V

TPS2211

SINGLE-SLOT PC CARD POWER INTERFACE SWITCH

FOR PARALLEL PCMCIA CONTROLLERS

SLVS156E – JULY 1997 – REVISED JANUAR Y 2001

electrical characteristics, TA = –40°C to 85°C (unless otherwise noted)

power switch

TPS2211

MIN TYP MAX

5 V to AVCC V

3.3 V to AVCC V

3.3 V to AVCC V
5 V to AVPP TJ=25°C 6

3.3 V to AVPP TJ=25°C 6
12 V to AVPP TJ=25°C 1

V

O(AVPP)

V

O(AVCC)

lkg

I

I

OS

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

Clamp low voltage Ipp at 10 mA 0.8 V
Clamp low voltage ICC at 10 mA 0.8 V

p

pp

p

CC

V

= 5 V V

I(5V)

V

= 0 V,

Input current

Short-circuit
output-current limit

I(5V)

V

= 3.3 V

I(3.3V)

Shutdown mode V
I

O(AVCC)

I

O(AVPP)

= 5 V 50 90

I(5V)

= 5 V, V

I(5V)

= 0 V, V

I(5V)

TA = 25°C 1 10
TA= 85°C 50
TA = 25°C 1 10
TA=85°C 50

O(AVCC)

V

O(AVCC)
O(AVCC)

TJ = 85°C, output powered into a
short to GND

= 5 V, V
= 3.3 V, V
= V

O(AVPP)

= 3.3 V 48 90

I(3.3V)

= 3.3 V 48 90

I(3.3V)

O(AVPP)

= 12 V 40 150

O(AVPP)

= 12 V 40 150

= Hi-Z 1

1 2.2 A

120 400 mA

mΩ

µ

µA

Ω

logic section

TPS2211

MIN MAX

Logic input current 1 µA
Logic input high level 2 V
Logic input low level 0.8 V

V

= 5 V, IO = 1 mA V

p

Logic output low level IO = 1 mA 0.4 V

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

I(5V)

V

= 0 V, IO = 1 mA, V

I(5V)

I(3.3V)

= 3.3 V V

I(5V)

I(3.3V)

– 0.4

– 0.4

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5

TPS2211

PARAMETER

TEST CONDITIONS

†

UNIT

Switch resistance

I

Leakage current

A

trRise times, output

ms

tfFall times, output

V

to V

tpdPropagation delay (see Figure1)

V

to V

(3.3V)

ms

V

to V

(5V)

SINGLE-SLOT PC CARD POWER INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS

SLVS156E – JULY 1997 – REVISED JANUAR Y 2001

electrical characteristics, TA = 25°C (unless otherwise noted)

power switch

TPS2211Y

MIN TYP MAX

5 V to AVCC V

3.3 V to AVCC V

3.3 V to AVCC V
5 V to AVPP TJ=25°C 4.3

3.3 V to AVPP TJ=25°C 4.3
12 V to AVPP TJ=25°C 0.5

V

O(AVPP)

V

O(AVCC)

lkg

I

I

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

Clamp low voltage Ipp at 10 mA 0.28 V
Clamp low voltage Ipp at 10 mA 0.28 V

Ipp high-impedance state 1
ICC high-impedance state 1
VI = 5 V V

Input current

V

I(5V)

V

I(3.3V)

= 5 V,

= 3.3 V

= 5 V 50

I(5V)
I(5V)
I(5V)

O(AVCC)

V

O(AVCC)

= 5 V, V
= 0 V, V

= 5 V, V
= 3.3 V, V

= 3.3 V 48

I(3.3V)

= 3.3 V 48

I(3.3V)

O(AVPP)

= 12 V 42

O(AVPP)

= 12 V 42

mΩ

µ

µA

Ω

switching characteristics

PARAMETER

p

p

p

‡

Switching Characteristics are with CL = 150 µF.

§

Refer to Parameter Measurement Information

‡

V

O(AVCC)

V

O(AVPP)

V

O(AVCC)

V

O(AVPP)

I(VPPD0)

I(VCCD1)

I(VCCD0)

TEST CONDITIONS

O(AVPP)

O(AVCC)

O(AVCC)

TPS2211,

§

t

on

t

off

t

on

t

off

t

on

t

off

TPS2211Y

MIN TYP MAX

2.8

6.4

4.5
12

6.8
18

4

17

6.6
17

UNIT

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2211

SINGLE-SLOT PC CARD POWER INTERFACE SWITCH

FOR PARALLEL PCMCIA CONTROLLERS

SLVS156E – JULY 1997 – REVISED JANUAR Y 2001

PARAMETER MEASUREMENT INFORMATION

V

(V

I(VPPD1)

V

I(VPPD0)

= 0 V)

O(AVPP)

AVPP

LOAD CIRCUIT

50%

t

t

on

90%

VOLTAGE WAVEFORMS

off

C

L

50%

10%

V

DD

GND

V

I(12V)

GND

V

I(VCCD1)

(V

I(VCCD0)

V

= VDD)

O(AVCC)

AVCC

LOAD CIRCUIT

50%

t

off

t

on

90%

VOLTAGE WAVEFORMS

Figure 1. Test Circuits and Voltage Waveforms

Table of Timing Diagrams

AVCC Propagation Delay and Rise Time With 1-µF Load, 3.3-V Switch 2
AVCC Propagation Delay and Fall Time With 1-µF Load, 3.3-V Switch 3
AVCC Propagation Delay and Rise Time With 150-µF Load, 3.3-V Switch 4
AVCC Propagation Delay and Fall Time With 150-µF Load, 3.3-V Switch 5
AVCC Propagation Delay and Rise Time With 1-µF Load, 5-V Switch 6
AVCC Propagation Delay and Fall Time With 1-µF Load, 5-V Switch 7
AVCC Propagation Delay and Rise Time With 150-µF Load, 5-V Switch 8
AVCC Propagation Delay and Fall Time With 150-µF Load, 5-V Switch 9
AVPP Propagation Delay and Rise Time With 1-µF Load, 12-V Switch 10
AVPP Propagation Delay and Fall Time With 1-µF Load, 12-V Switch 11
AVPP Propagation Delay and Rise Time With 150-µF Load, 12-V Switch 12
AVPP Propagation Delay and Fall Time With 150-µF Load, 12-V Switch 13

C

L

50%

FIGURE

10%

V

DD

GND

V

I(3.3V)

GND

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7