Texas Instruments TPS2205IDFR, TPS2205IDFLE, TPS2205IDBR, TPS2205IDBLE, TPS2205IDAPR Datasheet
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Fully Integrated VCC and Vpp Switching for
Dual-Slot PC Card Interface
D
Compatible with Controllers From Cirrus,
Ricoh, O
2
Micro, Intel, and Texas Instruments
D
3.3-V Low-Voltage Mode
D
Meets PC Card Standards
D
12-V Supply Can Be Disabled Except During
12-V Flash Programming
D
Short Circuit and Thermal Protection
D
30-Pin SSOP (DB) and 32-Pin TSSOP (DAP)
D
Compatible With 3.3-V, 5-V and 12-V PC Cards
D
Low r
DS(on)
(140-mΩ 5-V VCC Switch; 110-mΩ
3.3-V V
CC
Switch)
D
Break-Before-Make Switching
description
The TPS2205 PC Card power-interface switch
provides an integrated power-management
solution for two PC Cards. All of the discrete
power MOSFET s, a logic section, current limiting,
and thermal protection for PC Card control are
combined on a single integrated circuit (IC), using
the Texas Instruments LinBiCMOS process.
The circuit allows the distribution of 3.3-V, 5-V,
and/or 12-V card power, and is compatible with
many PCMCIA controllers. The current-limiting
feature eliminates the need for fuses, which
reduces component count and improves
reliability.
The TPS2205 is backward compatible with the
TPS2201, except that there is no V
DD
connection.
Bias current is derived from either the 3.3-V input
pin or the 5-V input pin. The TPS2205 also
eliminates the APWR_GOOD and BPWR_GOOD
pins of the TPS2201.
The TPS2205 features a 3.3-V low-voltage mode that allows for 3.3-V switching without the need for 5 V . This
facilitates low-power system designs such as sleep mode and pager mode where only 3.3 V is available.
End equipment for the TPS2205 includes notebook computers, desktop computers, personal digital assistants
(PDAs), digital cameras, and bar-code scanners.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments Incorporated.
PC Card is a trademark of PCMCIA (Personal Computer Memory Card International Association).
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1998, Texas Instruments Incorporated
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30
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26
25
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20
19
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17
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5V
5V
A_VPP_PGM
A_VPP_VCC
A_VCC5
A_VCC3
12V
AVPP
AVCC
AVCC
AVCC
GND
NC
SHDN
3.3V
5V
B_VPP_PGM
B_VPP_VCC
B_VCC5
B_VCC3
NC
12V
BVPP
BVCC
BVCC
BVCC
NC
OC
3.3V
3.3V
DB OR DF PACKAGE
(TOP VIEW)
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5
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30
29
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27
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21
20
19
18
17
5V
5V
NC
A_VPP_PGM
A_VPP_VCC
A_VCC5
A_VCC3
12V
AVPP
AVCC
AVCC
AVCC
GND
SHDN
NC
3.3V
5V
NC
B_VPP_PGM
B_VPP_VCC
B_VCC5
NC
B_VCC3
12V
BVPP
BVCC
BVCC
BVCC
OC
NC
3.3V
3.3V
DAP PACKAGE
(TOP VIEW)
NC – No internal connection
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
PLASTIC SMALL OUTLINE
(DB)
PLASTIC SMALL OUTLINE
(DF)
TSSOP
(DAP)
CHIP FORM
(Y)
–40°C to 85°C TPS2205IDBLE TPS2205IDFLE TPS2205IDAPR TPS2205Y
The DB package and the DF package are only available left-end taped and reeled (indicated by the LE suffix on the
device type; e.g., TPS2205IDBLE). The DAP package is only available taped and reeled (indicated by the R suffix
on the device type; e.g., TPS2205IDAPR).
typical PC card power-distribution application
PCMCIA
Controller
12 V
Power Supply
V
pp1
V
pp2
V
CC
V
CC
PC
Card A
TPS2205
5 V
3.3 V
OC
Control Lines
8
V
pp1
V
pp2
V
CC
V
CC
PC
Card B
12V
5V
3.3V
AVPP
AVCC
AVCC
BVPP
BVCC
BVCC
BVCC
AVCC
Supervisor
SHDN
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2205Y chip information
This chip, when properly assembled, displays characteristics similar to those of the TPS2205. Thermal
compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. The chips may be
mounted with conductive epoxy or a gold-silicon preform.
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2127
26 25 24
23
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171614
15
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8
7
6
5
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJ max = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
142
144
TPS2205Y
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2
3
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5
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7
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10
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26
25
24
23
22
21
20
19
18
17
16
15
5V
5V
A_VPP_PGM
A_VPP_VCC
A_VCC5
A_VCC3
12V
AVPP
AVCC
AVCC
AVCC
GND
SHDN
3.3V
5V
B_VPP_PGM
B_VPP_VCC
B_VCC5
B_VCC3
12V
BVPP
BVCC
BVCC
BVCC
OC
3.3V
3.3V
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NO.
I/O DESCRIPTION
NAME
DB, DF DAP
A_VCC3 6 7 I Logic input that controls voltage on AVCC (see TPS2205 Control-Logic table)
A_VCC5 5 6 I Logic input that controls voltage on AVCC (see TPS2205 Control-Logic table)
A_VPP_PGM 3 4 I Logic input that controls voltage on AVPP (see TPS2205 Control-Logic table)
A_VPP_VCC 4 5 I Logic input that controls voltage on AVPP (see TPS2205 Control-Logic table)
AVCC 9, 10, 11 10, 11, 12 O Switched output that delivers 0 V , 3.3 V, 5 V, or high impedance
AVPP 8 9 O Switched output that delivers 0 V, 3.3 V, 5 V , 12 V, or high impedance
B_VCC3 26 26 I Logic input that controls voltage on BVCC (see TPS2205 Control-Logic table)
B_VCC5 27 28 I Logic input that controls voltage on BVCC (see TPS2205 Control-Logic table)
B_VPP_PGM 29 30 I Logic input that controls voltage on BVPP (see TPS2205 Control-Logic table)
B_VPP_VCC 28 29 I Logic input that controls voltage on BVPP (see TPS2205 Control-Logic table)
BVCC 20, 21, 22 21, 22, 23 O Switched output that delivers 0 V, 3.3 V, 5 V, or high impedance
BVPP 23 24 O Switched output that delivers 0 V, 3.3 V, 5 V , 12 V, or high impedance
SHDN 14 14 I Logic input that shuts down the TPS2205 and set all power outputs to high-impedance
state
OC 18 20 O Logic-level overcurrent reporting output that goes low when an overcurrent condition
exists
GND 12 13 Ground
3.3V 15, 16, 17 16, 17, 18 I 3.3-V VCC in for card power
5V 1, 2, 30 1, 2, 32 I 5-V VCC in for card power
12V 7, 24 8, 25 I 12-V VPP in for card power
NC 13, 19, 25 3, 15, 19,
27, 31
I No internal connection
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
†
Input voltage range for card power: V
I(5V)
–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
I(3.3V)
–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
I(12V)
–0.3 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic input voltage –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current (each card): I
O(xVCC)
Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
O(xVPP)
Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
J
–40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
‡
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DB 1024 mW 8.2 mW/°C 655 mW 532 mW
DF 1158 mW 9.26 mW/°C 741 mW 602 mW
No backplane 1625 mW 13 mW/°C 1040 mW 845 mW
DAP
Backplane
§
6044 mW 48.36 mW/°C 3869 mW 3143 mW
‡
These devices are mounted on an FR4 board with no special thermal considerations.
§
2-oz backplane with 2-oz traces; 5.2-mm × 11-mm thermal pad with 6-mil solder; 0.18-mm diameter vias in a 3×6 array.
recommended operating conditions
MIN MAX UNIT
V
I(5V)
0 5.25 V
Input voltage range, V
I
V
I(3.3V)
0 5.25 V
V
I(12V)
0 13.5 V
p
I
O(xVCC)
at 25°C 1 A
Output current
I
O(xVPP)
at 25°C 150 mA
Operating virtual junction temperature, T
J
–40 125 °C
electrical characteristics, TA = 25°C, V
I(5V)
= 5 V (unless otherwise noted)
dc characteristics
TPS2205
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
5 V to xVCC 103 140
3.3 V to xVCC V
I(5V)
= 5 V, V
I(3.3 V)
= 3.3 V 69 110
mΩ
3.3 V to xVCC V
I(5V)
= 0, V
I(3.3V)
= 3.3 V 96 180
Switch
resistances
†
5 V to xVPP 6
3.3 V to xVPP 6
Ω
12 V to xVPP 1
V
O(xVPP)
Clamp low voltage Ipp at 10 mA 0.8 V
V
O(xVCC)
Clamp low voltage ICC at 10 mA 0.8 V
Ipp high-impedance
TA = 25°C 1 10
g
state
TA = 85°C 50
I
lkg
Leakage current
I
high-impedance
TA = 25°C 1 10
µ
A
CC
g
state
TA = 85°C 50
V
I(5V)
= 5 V
V
O(AVCC)
= V
O(BVCC)
= 5 V,
V
O(AVPP)
= V
O(BVPP)
= 12 V
117 150
I
I
Input current
V
I(5V)
= 0,
V
I(3.3V)
= 3.3 V
V
O(AVCC)
= V
O(BVCC)
= 3.3 V,
V
O(AVPP)
= V
O(BVPP)
= 0
131 150
µ
A
Shutdown mode
V
O(BVCC)
= V
O(AVCC)
= V
O(AVPP)
= V
O(BVPP)
= Hi-Z
1 µA
Short-circuit
I
O(xVCC)
TJ = 85°C,
1 2.2 A
I
OS
output-current limit
I
O(xVPP)
J
Output powered up into a short to GND
120 400 mA
†
Pulse-testing techniques are used to maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, TA = 25°C, V
I(5V)
= 5 V (unless otherwise noted)
logic section
TPS2205
PARAMETER
TEST CONDITIONS
MIN MAX
UNIT
Logic input current 1 µA
Logic input high level 2 V
Logic input low level 0.8 V
V
I(5V)
= 5 V, IO = 1mA V
I(5V)
–0.4
Logic output high level
V
I(5V)
= 0 V,
V
I(3.3V)
= 3.3 V
IO = 1mA,
V
I(3.3V)
–0.4
V
Logic output low level IO = 1mA 0.4 V
switching characteristics
†‡
TPS2205
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
p
V
O(xVCC)
1.2
trOutput rise time
V
O(xVPP)
5
p
V
O(xVCC)
10
ms
tfOutput fall time
V
O(xVPP)
14
t
on
4.4 ms
V
I(x_VPP_PGM)
to
V
O(xVPP)
t
off
18 ms
t
on
6.5 ms
p
V
I(x_VCC5)
to x
VCC (3.3 V), V
I(5V)
= 5
V
t
off
20 ms
tpdPropagation delay (see Figure 1)
t
on
5.7 ms
V
I(x_VCC5)
to xVCC (5 V)
t
off
25 ms
t
on
6.6 ms
V
I(x_VCC5)
to
xVCC (3.3 V), V
I(5V)
=
0
t
off
21 ms
†
Refer to Parameter Measurement Information
‡
Switching Characteristics are with CL = 150 µF.
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, TA = 25°C, V
I(5V)
= 5 V (unless otherwise noted)
dc characteristics
TPS2205Y
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
5 V to xVCC 103
3.3 V to xVCC V
I(5V)
= 5 V, V
I(3.3 V)
= 3.3 V 69
mΩ
3.3 V to xVCC V
I(5V)
= 0, V
I(3.3V)
= 3.3 V 96
Switch
resistances
§
5 V to xVPP 4.74
3.3 V to xVPP 4.74
Ω
12 V to xVPP 0.724
V
O(xVPP)
Clamp low voltage Ipp at 10 mA 0.275 V
V
O(xVCC)
Clamp low voltage ICC at 10 mA 0.275 V
Ipp High-impedance state TA = 25°C 1
I
lkg
Leakage current
ICC High-impedance state TA = 25°C 1
µ
A
p
V
I(5V)
= 5 V
V
O(AVCC)
= V
O(BVCC)
= 5 V,
V
O(AVPP)
= V
O(BVPP)
= 12 V
117
IIInput current
V
I(5V)
= 0,
V
I(3.3V)
= 3.3 V
V
O(AVCC)
= V
O(BVCC)
= 3.3 V,
V
O(AVPP)
= V
O(BVPP)
= 0
131
µ
A
§
Pulse-testing techniques are used to maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
switching characteristics
†‡
TPS2205Y
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
p
V
O(xVCC)
1.2
trOutput rise time
V
O(xVPP)
5
p
V
O(xVCC)
10
ms
tfOutput fall time
V
O(xVPP)
14
t
on
4.4 ms
V
I(x_VPP_PGM)
to V
O(xVPP)
t
off
18 ms
t
on
6.5 ms
p
V
I(x_VCC5)
to x
VCC (3.3 V), V
I(5V)
= 5
V
t
off
20 ms
tpdPropagation delay (see Figure 1)
t
on
5.7 ms
V
I(x_VCC5)
to
xVCC (5 V)
t
off
25 ms
t
on
6.6 ms
V
I(x_VCC5)
to xVCC (3.3 V), V
I(5V)
=
0
t
off
21 ms
†
Refer to Parameter Measurement Information
‡
Switching Characteristics are with CL = 150 µF.
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
LOAD CIRCUIT
C
L
t
on
VOLTAGE WAVEFORMS
V
I(12V)
GND
50% 50%
90%
V
DD
GND
V
X_VPP_PGM
V
O(xVPP)
V
pp
LOAD CIRCUIT
C
L
V
CC
t
on
t
off
VOLTAGE WAVEFORMS
V
I(5V)
GND
50% 50%
90%
10%
V
DD
GND
V
x_VCCx
V
O(xVCC)
10%
t
off
Figure 1. Test Circuits and Voltage Waveforms
Table of Timing Diagrams
FIGURE
xVCC Propagation Delay and Rise Time With 1-µF Load, 3.3-V Switch, V
I(5V)
= 5 V 2
xVCC Propagation Delay and Fall Time With 1-µF Load, 3.3-V Switch, V
I(5V)
= 5 V 3
xVCC Propagation Delay and Rise Time With 150-µF Load, 3.3-V Switch, V
I(5V)
= 5 V 4
xVCC Propagation Delay and Fall Time With 150-µF Load, 3.3-V Switch, V
I(5V)
= 5 V 5
xVCC Propagation Delay and Rise Time With 1-µF Load, 3.3-V Switch, V
I(5V)
= 0 6
xVCC Propagation Delay and Fall Time With 1-µF Load, 3.3-V Switch, V
I(5V)
= 0 7
xVCC Propagation Delay and Rise Time With 150-µF Load, 3.3-V Switch, V
I(5V)
= 0 8
xVCC Propagation Delay and Fall Time With 150-µF Load, 3.3-V Switch, V
I(5V)
= 0 9
xVCC Propagation Delay and Rise Time With 1-µF Load, 5-V Switch 10
xVCC Propagation Delay and Fall Time With 1-µF Load, 5-V Switch 11
xVCC Propagation Delay and Rise Time With 150-µF Load, 5-V Switch 12
xVCC Propagation Delay and Fall Time With 150-µF Load, 5-V Switch 13
xVPP Propagation Delay and Rise Time With 1-µF Load, 12-V Switch 14
xVPP Propagation Delay and Fall Time With 1-µF Load, 12-V Switch 15
xVPP Propagation Delay and Rise Time With 150-µF Load, 12-V Switch 16
xVPP Propagation Delay and Fall Time With 150-µF Load, 12-V Switch 17
TPS2205
DUAL-SLOT PC CARD POWER-INTERFACE SWITCH
FOR PARALLEL PCMCIA CONTROLLERS
SLVS128D OCT OBER 1995 – REVISED JUNE 1998
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
t – Time – ms
Figure 2. xVCC Propagation Delay and
Rise Time With 1-µF Load, 3.3-V Switch,
(V
I(5 V)
= 5 V)
0123456789
xVCC (2 V/div)
x_VCC5 (2 V/div)
t – Time – ms
Figure 3. xVCC Propagation Delay and
Fall Time With 1-µF Load, 3.3-V Switch,
(V
I(5 V)
= 5 V)
0 5 10 15 20 25 30 35 40 45
xVCC (2 V/div)
x_VCC5 (2 V/div)
t – Time – ms
Figure 4. xVCC Propagation Delay and
Rise Time With 150-µF Load, 3.3-V Switch,
V
I(5 V)
= 5 V
0123456789
xVCC (2 V/div)
x_VCC5 (2 V/div)
t – Time – ms
Figure 5. xVCC Propagation Delay and
Fall Time With 150-µF Load, 3.3-V Switch,
V
I(5 V)
= 5 V
0 5 10 15 20 25 30 35 40 45
xVCC (2 V/div)
x_VCC5 (2 V/div)
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