Datasheet TPS2201IDFR, TPS2201IDFLE, TPS2201IDBR, TPS2201IDBLE Datasheet (Texas Instruments)

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TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

• Fully Integrated V

and Vpp Switching for

Dual-Slot PC Card Interface

• Compatible With Controllers From Cirrus,

Intel, and Texas Instruments

• Meets PCMCIA Standards

• Internal Charge Pump (No External

Capacitors Required) – 12-V Supply Can Be Disabled Except for Programming

• Short Circuit and Thermal Protection

• Space Saving SSOP (DB) Package

• Compatible With 3.3-V, 5-V and 12-V PC

Cards

• Power Saving I

= 83 µA Typ, IQ = 1 µA

• Low r

DS(on)

(160-mΩ VCC Switch)

• Break-Before-Make Switching

description

The TPS2201 PC Card (PCMCIA) power interface switch provides an integrated power-management solution for two PC Cards. All of the discrete power MOSFETs, a logic section, current limiting, thermal protection, and power-good reporting for PC Card control are combined on a single integrated circuit (IC), using Texas Instruments LinBiCMOS process. The circuit allows the distribution of 3-V, 5-V and/or 12-V card power and is compatible with most PCMCIA controllers. The current-limiting feature eliminates the need for fuses, which reduces component count and improves reliability; current-limit reporting can help the user isolate a system fault to a bad card.

The TPS2201 maximizes battery life by generating its own switch-drive voltage using an internal charge pump. Therefore, the 12-V supply can be powered down and only brought out of standby when flash memory needs to be written to or erased. End equipment for the TPS2201 includes notebook computers, desktop computers, personal digital assistants (PDAs), digital cameras, handiterminals, and bar-code scanners.

typical PC card power distribution application

CPU

PCMCIA

Controller

12 V

Power Supply

pp1

pp2

Card A

TPS2201

5 V 3 V

SHDN

BPWR_GOOD OC

Control Lines

pp1

pp2

Card B

12V 5V

AVPP

AVCC AVCC

BVPP

BVCC BVCC

APWR_GOOD

BVCC

AVCC

LinBiCMOS is a trademark of Texas Instruments Incorporated.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

5V 5V

A_VPP_PGM

A_VPP_VCC

A_VCC5 A_VCC3

12V

AVPP AVCC AVCC AVCC

GND

APWR_GOOD

SHDN

5V B_VPP_PGM B_VPP_VCC B_VCC5 B_VCC3 V

12V BVPP BVCC BVCC BVCC BPWR_GOOD OC 3V 3V

DB OR DF PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

AVAILABLE OPTIONS PACKAGED DEVICES

SHINK SMALL-OUTLINE

(DB)

SMALL-OUTLINE

(DF)

CHIP FORM

(Y)

–40°C to 150°C TPS2201IDB TPS2201IDF TPS2201Y

†

The DF package is only available left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TPS2201IDFLE).

Terminal Functions

TERMINAL

NAME NO.

I/O

DESCRIPTION

A_VCC3 6 I Logic input that controls voltage on AVCC (see control-logic table) A_VCC5 5 I Logic input that controls voltage on AVCC (see control-logic table) A_VPP_PGM 3 I Logic input that controls voltage on AVPP (see control-logic table) A_VPP_VCC 4 I Logic input that controls voltage on AVPP (see control-logic table) APWR_GOOD 13 O Logic-level power-ready output that stays low as long as AVPP is within limits AVCC 9, 10, 11 O Switched output that delivers 0 V, 3.3 V, 5 V, or high impedance AVPP 8 O Switched output that delivers 0 V, 3.3 V, 5 V, 12 V, or high impedance B_VCC3 26 I Logic input that controls voltage on BVCC (see control-logic table) B_VCC5 27 I Logic input that controls voltage on BVCC (see control-logic table) B_VPP_PGM 29 I Logic input that controls voltage on BVPP (see control-logic table) B_VPP_VCC 28 I Logic input that controls voltage on BVPP (see control-logic table) BPWR_GOOD 19 O Logic-level power-ready output that stays low as long as BVPP is within limits BVCC 20, 21, 22 O Switched output that delivers 0 V, 3.3 V, 5 V, or high impedance BVPP 23 O Switched output that delivers 0 V , 3.3 V, 5 V, 12 V, or high impedance SHDN 14 I Logic input that shuts down the TPS2201 and set all power outputs to high-impedance state OC 18 O Logic-level overcurrent reporting output that goes low when an overcurrent condition exists V

25 5-V power to chip GND 12 Ground 3V 15, 16, 17 I 3-V VCC input for card power 5V 1, 2, 30 I 5-V VCC input for card power 12V 7, 24 I 12-V VPP input for card power

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2201Y chip information

This chip, when properly assembled, displays characteristics similar to the TPS2201. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chip may be mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10% ALL DIMENSIONS ARE IN MILS

204

142

TPS2201Y

(2)

(28)

(1)

(3)

(29)

(30)

(27)(4)

5V5V

A_VPP_PGM

A_VPP_VCC

B_VPP_PGM B_VPP_VCC

B_VCC5

(6)

(5)

(7) (8)

A_VCC5 A_VCC3

12V

AVPP

(10)

(9)

(11) (12)

AVCC AVCC

AVCC

GND

(14)

(13)

(15)

APWR_GOOD

SHDN

(24)

(25)

(26)

(23)

B_VCC3 V

12V BVPP

(20)

(21)

(22)

(19)

BVCC BVCC

BVCC BPWR_GOOD

(16)

(17)

(18)

OC 3V

(2)

(1)

(3) (4)

(6)

(5)

(7)

(8)

(10)

(9)

(11)

(12)

(14)

(13)

(15)

(20)

(21)

(22)

(19)

(16)

(17)

(18)

(28) (29)

(30)

(27)

(24)

(25)

(26)

(23)

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

†

Supply voltage range, V

–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range for card power: V

I(5V)

–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(3V)

–0.3 V to V

I(5V)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(12V)

–0.3 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Logic input voltage –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output current (each card): I

O(xVCC)

internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O(xVPP)

internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T

–40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T

–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

‡

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

DB 1024 mW 8.2 mW/°C 655 mW 532 mW DF 1158 mW 9.26 mW/°C 741 mW 602 mW

‡

Maximum values are calculated using a derating factor based on R

θJA

= 108°C/W for the package.

These devices are mounted on an FR4 board with no special thermal considerations.

recommended operating conditions

MIN MAX UNIT

Supply voltage, V

4.75 5.25 V

I(5V)

0 5.25 V

Input voltage range, V

I(3V)

0 V

I(5V)

†

I(12V)

0 13.5 V

O(xVCC)

at 25°C 1 A

Output current, I

O(xVPP)

at 25°C 150 mA

Operating virtual junction temperature, T

–40 125 °C

†

I(3 V)

should not be taken above V

I(5 V)

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics, TA = 25°C, VDD = 5 V (unless otherwise noted)

dc characteristics

TPS2201

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

5 V to xVCC 160 3 V to xVCC 225

mΩ

Switch resistances

5 V to xVPP 6 3 V to xVPP 6

Ω

12 V to xVPP 1 Clamp low voltage Ipp at 10 mA 0.8 V Clamp low voltage ICC at 10 mA 0.8 V

TA = 25°C 1 10

IppHigh-impedance state

TA = 85°C 50

Leakage current

TA = 25°C 1 10

ICCHigh-impedance state

TA = 85°C 50

O(AVCC)

= V

O(BVCC)

= 5 V,

O(AVPP)

= V

O(BVPP)

= 12 V

83 150 µA

Input current

IDD in shutdown

O(BVCC)

= V

O(AVCC)

= V

O(AVPP)

= V

O(BVPP)

= high Z

1 µA

Power-ready threshold, PWR_GOOD 10.72 11.05 11.4 V Power-ready hysteresis, PWR_GOOD (12-V mode) 50 mV Short-circuit output-

O(xVCC)

0.75 1.3 1.9 A

current limit

O(xVPP)

85°C

, Output

shorted to GND

120 200 400 mA

logic section

TPS2201

PARAMETER

TEST CONDITIONS

MIN MAX

UNIT

Logic input current 1 µA Logic input high level 2.7 V Logic input low level 0.8 V Logic output high level

VDD–0.4 V

Logic output low level

= 1

0.4 V

switching characteristics

†

TPS2201

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

O(xVCC)

1.2

Output rise time

O(xVPP)

O(xVCC)

Output fall time

O(xVPP)

5.8

I(x_VPP_PGM)

O(xVPP)

off

5.8

Propagation delay (see Figure 1‡)

I(x_VCC3)

to x

VCC (3 V)

off

I(x_VCC5)

xVCC (5 V)

off

†

Refer to Parameter Measurement Information

‡

Rise and fall times are with CL = 100 µF.

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics, TA = 25°C, VDD = 5 V (unless otherwise noted) (continued)

dc characteristics

TPS2201Y

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

IppHigh-impedance state 1

Leakage current

ICCHigh-impedance state 1

Input current I

O(AVCC)

= V

O(BVCC)

= 5 V,

O(AVPP)

= V

O(BVPP)

= 12 V

83 µA

Power-ready threshold, PWR_GOOD 11.05 V Power-ready hysteresis, PWR_GOOD (12-V mode) 50 mV

switching characteristics

†

TPS2201Y

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

O(xVCC)

1.2

Output rise time

O(xVPP)

O(xVCC)

Output fall time

O(xVPP)

5.8

I(x_VPP_PGM)

O(xVPP)

off

5.8

Propagation delay (see Figure 1‡)

I(x_VCC3)

to x

VCC

off

I(x_VCC5)

to xVCC

off

†

Refer to Parameter Measurement Information

‡

Rise and fall times are with CL = 100 µF.

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

LOAD CIRCUIT

VOLTAGE WAVEFORMS

I(12V)

GND

50% 50%

90%

GND

X_VPP_PGM

O(xVPP)

LOAD CIRCUIT

off

VOLTAGE WAVEFORMS

I(5V)

GND

50% 50%

90%

10%

GND

x_VCCx

O(xVCC)

10%

off

Figure 1. Test Circuits and Voltage Waveforms

Table of Timing Diagrams

FIGURE

xVCC Propagation Delay and Rise Times With 1-µF Load, 3-V Switch 2 xVCC Propagation Delay and Fall Times With 1-µF Load, 3-V Switch 3 xVCC Propagation Delay and Rise Times With 100-µF Load, 3-V Switch 4 xVCC Propagation Delay and Fall Times With 100-µF Load, 3-V Switch 5 xVCC Propagation Delay and Rise Times With 1-µF Load, 5-V Switch 6 xVCC Propagation Delay and Fall Times With 1-µF Load, 5-V Switch 7 xVCC Propagation Delay and Rise Times With 100-µF Load, 5-V Switch 8 xVCC Propagation Delay and Fall Times With 100-µF Load, 5-V Switch 9 xVPP Propagation Delay and Rise Times With 1-µF Load, 12-V Switch 10 xVPP Propagation Delay and Fall Times With 1-µF Load, 12-V Switch 11 xVPP Propagation Delay and Rise Times With 100-µF Load, 12-V Switch 12 xVPP Propagation Delay and Fall Times With 100-µF Load, 12-V Switch 13

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

0123456789

xVCC (1 V/div)

x_VCC3 (2 V/div)

t – Time – ms

0 5 10 15 20 25 30 35 40 45

xVCC (1 V/div)

x_VCC3 (2 V/div)

t – Time – ms

Figure 2. xVCC Propagation Delay and Rise Times With 1-µF Load, 3-V Switch

Figure 3. xVCC Propagation Delay and

Fall Times With 1-µF Load, 3-V Switch

0123456789

xVCC (1 V/div)

x_VCC_3 (2 V/div)

t – Time – ms

0 5 10 15 20 25 30 35 40 45

xVCC (1 V/div)

x_VCC_3 (2 V/div)

t – Time – ms

Figure 4. xVCC Propagation Delay and

Rise Times With 100-µF Load, 3-V Switch

Figure 5. xVCC Propagation Delay and

Fall Times With 100-µF Load, 3-V Switch

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

01234

xVCC (1 V/div)

x_VCC_5 (2 V/div)

t – Time – ms

0 5 10 15 20 25 30 35 40 45

xVCC (1 V/div)

x_VCC_5 (2 V/div)

t – Time – ms

Figure 6. xVCC Propagation Delay and

Rise Times With 1-µF Load, 5-V Switch

Figure 7. xVCC Propagation Delay and

Fall Times With 1-µF Load, 5-V Switch

Figure 8. xVCC Propagation Delay and

Rise Times With 100-µF Load, 5-V Switch

Figure 9. xVCC Propagation Delay and

Fall Times With 100-µF Load, 5-V Switch

0123456789

xVCC (1 V/div)

x_VCC_5 (2 V/div)

t – Time – ms

0 5 10 15 20 25 30 35 40 45

xVCC (1 V/div)

x_VCC_5 (2 V/div)

t – Time – ms

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

Figure 10. xVPP Propagation Delay and

Rise Times With 1-µF Load, 12-V Switch

Figure 11. xVPP Propagation Delay and Fall Times With 1-µF Load, 12-V Switch

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

xVPP (5 V/div)

x_VPP_PGM (2 V/div)

0123456789

xVPP (5 V/div)

x_VPP_PGM (2 V/div)

t – Time – ms t – Time – ms

0123456789

xVPP (5 V/div)

x_VPP_PGM (2 V/div)

0 5 10 15 20 25 30 35 40 45

xVPP (5 V/div)

x_VPP_PGM (2 V/div)

t – Time – ms t – Time – ms

Figure 12. xVPP Propagation Delay and

Rise Times With 100-µF Load, 12-V Switch

Figure 13. xVPP Propagation Delay and

Fall Times With 100-µF Load, 12-V Switch

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

†

Table of Graphs

FIGURE

Supply current vs Junction temperature 14

DS(on)

Static drain-source on-state resistance, 3-V switch vs Junction temperature 15

DS(on)

Static drain-source on-state resistance, 5-V switch vs Junction temperature 16

DS(on)

Static drain-source on-state resistance, 12-V switch vs Junction temperature 17

O(xVCC)

Output voltage, 5-V switch vs Output current 18

O(xVCC)

Output voltage, 3-V switch vs Output current 19

Output voltage, Vpp switch vs Output current 20

SC(xVCC)

Short-circuit current, 5-V switch vs Junction temperature 21

SC(xVPP)

Short-circuit current, 12-V switch vs Junction temperature 22

– Supply Current –

SUPPLY CURRENT

JUNCTION TEMPERATURE

TJ – Junction Temperature – °C

Aµ

100

0 150

O(AVCC)

= V

O(BVCC)

= 5 V

O(AVPP)

= V

O(BVPP)

= 12 V

No load

–50

10050

Figure 14

†

t = pulse tested

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

†

200

100

400

300

– Static Drain-Source On-State Resistance – m

3-V SWITCH

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

JUNCTION TEMPERATURE

–50 0 125

DS(on)

Ω

TJ – Junction Temperature – °C

120

100

160

140

5-V SWITCH

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

JUNCTION TEMPERATURE

TJ – Junction Temperature – °C

VDD = 5 V VCC = 3.3 V

–25 25 50 75 100 –50 0 125

–25 25 50 75 100

240

220

250

150

350

VDD = 5 V VCC = 5 V

– Static Drain-Source On-State Resistance – mr

DS(on)

Ω

200

180

Figure 15 Figure 16

1100

900

700

500

1300

1500

1700

–50 50 125

12-V SWITCH

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

JUNCTION TEMPERATURE

TJ – Junction Temperature – °C

4.99

4.85

4.8

4.75

4.9

0 0.1 0.2 0.3 0.4 0.5

– Output Voltage – V

5.05

5-V SWITCH

OUTPUT VOLTAGE

OUTPUT CURRENT

0.6 0.7

O(xVCC)

– Output Current – A

–40°C

–25 0 25 75 100

VDD = 5 V Vpp = 12 V

25°C

85°C

125°C

VDD = 5 V VCC = 5 V

– Static Drain-Source On-State Resistance – mr

DS(on)

Ω

Figure 17 Figure 18

†

t = pulse tested

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–13

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

†

3.2

3.15

3.1

3.05 0 0.1 0.2

3.25

3.3

3.35

0.3 0.4 0.6

0.70.5

O(xVCC)

– Output Current – A

3-V SWITCH

OUTPUT VOLTAGE

OUTPUT CURRENT

11.80 0 0.02 0.04 0.06

11.95

Vpp SWITCH

OUTPUT VOLTAGE

OUTPUT CURRENT

12.05

0.08 0.12

11.90

11.85

0.1

O(xVPP)

– Output Current – A

– Output Voltage – V

–40°C

85°C

125°C

VDD = 5 V VCC = 3.3 V

– Output Voltage – VV

O(xVCC)

25°C

VDD = 5 V Vpp = 12 V

125°C

–40°C

25°C

85°C

Figure 19 Figure 20

5-V SWITCH

SHORT-CIRCUIT CURRENT

JUNCTION TEMPERATURE

TJ – Junction Temperature – °CT

– Junction Temperature – °C

12-V SWITCH

SHORT-CIRCUIT CURRENT

JUNCTION TEMPERATURE

– Short-Circuit Current – AI

SC(xVCC)

– Short-Circuit Current – mAI

SC(xVPP)

0.5 050

1.5

100 150–50

VDD = 5 V VCC = 5 V

200

150

100

300

250

VDD = 5 V Vpp = 12 V

400

350

0–50 50 150

100

Figure 21 Figure 22

†

t = pulse tested

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

6–14

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

overview

PC Cards were initially introduced as a means to add EEPROM (flash memory) to portable computers with limited on-board memory. The idea of add-in cards quickly took hold: modems, wireless LANs, GPS systems, multimedia, and hard-disk versions were soon available. As the number of PC Card applications grew, the engineering community quickly recognized the need for a standard to ensure compatibility across platforms. T o this end, the PCMCIA (Personal Computer Memory Card International Association) was established and was comprised of members from leading computer, software, PC card, and semiconductor manufacturers. One key goal was to realize the concept of plug and play – cards and hosts from different vendors should be compatible and able to communicate with one another transparently.

PC Card power specification

System compatibility also means power compatibility . The most current set of specifications (PC Card Standard) set forth by the PCMCIA committee states that power is to be transferred between the host and the card through eight of the PC Card connector’s 68 pins. This power interface consists of two V

, two Vpp, and four ground

pins. Multiple V

and ground pins are used to minimize connector-pin and line resistance. The two Vpp pins were originally specified as separate signals but are commonly tied together in the host to form a single node to minimize voltage losses. Card primary power is supplied through the V

pins; flash-memory programming

and erase voltage is supplied through the V

pins. As each pin is rated to 0.5 A, VCC and Vpp can theoretically supply up to 1 A, assuming equal pin resistance and no pin failure. A conservative design would limit current to 500 mA. Some applications, however, require higher V

currents; disk drives, for example, may need as

much as 750-mA peak current to create the initial torque necessary to spin up the platter. V

currents, on the

other hand, are defined by flash-memory programming requirements, typically under 120 mA.

future power trends

The 1-A physical-pin current alluded to in the PC Card specification has caused some host-system engineers to believe they are required to deliver 1 A within the voltage tolerance of the card. Future applications, such as RF cards, could use the extra power for their radio transmitters. The 5 W required for these cards will require very robust power supplies and special cooling considerations. The limited number of host sockets that will be able to support them makes the market for these high-powered PC Cards uncertain. The vast majority of the cards require less than 600 mA continuous current and the trend is towards even lower-powered PC Cards that will assure compatibility with a greater number of host systems. Recognizing the need for power derating, an adhoc committee of the PCMCIA is currently working to limit the amount of steady-state dc current to the PC Card to something less than the currently implied 1 A. If a system is designed to support 1 A, then the switch r

DS(on)

, power supply requirements, and PC Card cooling need to be carefully considered.

designing around 1-A delivery

Delivering 1 A means minimizing voltage (and power) losses across the PC Card power interface, which requires that designers trade off switch resistance and the cost associated with large-die (low r

DS(on)

) MOSFET transistors. The PC Card standard requires that 5 V ±5%, or 3.3 V ±0.3 V be supplied to the card. The approximate 10% tolerance for the 3.3-V supply makes the 3.3-V r

DS(on)

less critical than the 5-V switch. A conservative approach is to allow 2% for voltage-regulator tolerance and 1% for etch- and terminal-resistance drops, which leaves 2% (100 mV) voltage drop for the 5-V switch, and at least 6% (198 mV) for the 3.3-V switch.

Calculating the r

DS(on)

necessary to support a 100 mV or 198 mV switch loss, using R = E/I and setting I = 1 A, the 5-V and 3.3-V switches would need to be 100 mΩ and 198 mΩ respectively . One solution would be to pay for a more expensive switch with lower r

DS(on)

. A second, less expensive approach is to increase the headroom of the power supply–for example, to increase the 5-V supply 1.5% or to 5.075 ±2%. Working through the numbers once more, the 2% for the regulator plus 1 % for etch and terminal losses leaves 97% or 4.923 V . The allowable

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

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designing around 1-A delivery (continued)

voltage loss across the power distribution switch is now 4.923 V minus 4.750 V or 173 mV . Therefore, a switch with 173 mΩ or less could deliver 1 A or greater. Setting the power supply high is a common practice for delivering voltages to allow for system switch, connector, and etch losses and has a minimal ef fect on overall battery life. In the example above, setting the power supply 1.5% high would only decrease a 3-hour battery life by approximately 2.7 minutes, trivial when compared with the decrease in battery life when running a 5-W PC Card.

heat dissipation

A greater concern in delivering 1 A or 5 W is the ability of the host to dissipate the heat generated by the PC Card. For desktop computers the solution is simpler: locate the PC Card cage such that it receives convection cooling from the forced air of the fan. Notebooks and other handheld equipment will not be able to rely on convection, but must rely on conduction of heat away from the PC Card through the rails into the card cage. This is difficult because PC Card/card cage heat transfer is very poor. A typical design scenario would require the PC Card to be held at 60°C maximum with the host platform operating as high as 50°C. Preliminary testing reveals that a PC Card can have a 20°C rise, exceeding the 10°C differential in the example, when dissipating less than 2 W of continuous power. The 60°C temperature was chosen because it is the maximum operating temperature allowable by PC Card specification. Power handling requirements and temperature rises are topics of concern and are currently being addressed by the PCMCIA committee.

overcurrent and over-temperature protection

PC Cards are inherently subject to damage that can result from mishandling. Host systems require protection against short-circuited cards that could lead to power supply or PCB-trace damage. Even systems sufficiently robust to withstand a short circuit would still undergo rapid battery discharge into the damaged PC Card, resulting in the rather sudden and unacceptable loss of system power. This can be particularly frustrating to the consumer who has already experienced problems with shortened battery life due to improper Nicad conditioning or memory effect. Most hosts include fuses for protection. The reliability of fused systems is poor, though, as blown fuses require troubleshooting and repair, usually by the manufacturer . The TPS2201 takes a two-pronged approach to overcurrent protection. First, instead of fuses, sense FETs monitor each of the power outputs. Excessive current generates an error signal that linearly limits the output current, preventing host damage or failure. Sense FET s, unlike sense resistors or polyfuses, have the added advantage that they do not add to the series resistance of the switch and thus produce no additional voltage losses. Second, when an overcurrent condition is detected, the TPS2201 asserts a signal at OC

that can be monitored by the microprocessor to initiate diagnostics and/or send the user a warning message. In the event that an overcurrent condition persists, causing the IC to exceed its maximum junction temperature, thermal-protection circuitry engages, shutting down all power outputs until the device cools to within a safe operating region.

12-V supply not required

Most PC Card switches use the externally supplied 12-V V

power for switch-gate drive and other chip functions, requiring that it be present at all times. The TPS2201 offers considerable power savings by using an internal charge pump to generate the required higher voltages from the 5-V V

supply; therefore, the external 12-V supply can be disabled except when needed for flash-memory functions, thereby extending battery lifetime. Additional power savings are realized by the TPS2201 during a software shutdown, in which quiescent current drops to a maximum of 1 µA.

voltage transitioning requirement

PC Cards, like portables, are migrating from 5 V to 3.3 V to minimize power consumption, optimize board space, and increase logic speeds. The TPS2201 is designed to meet all combinations of power delivery as currently defined in the PCMCIA standard. The latest protocol accommodates mixed 3.3-V/5-V systems by first powering the card with 5 V , then polling it to determine its 3.3-V compatibility . The PCMCIA specification requires that the

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

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voltage transitioning requirement (continued)

capacitors on 3.3-V compatible cards be discharged to below 0.8 V before applying 3.3-V power. This ensures that sensitive 3.3-V circuitry is not subjected to any residual 5-V charge and functions as a power reset. The TPS2201 offers a selectable V

and V

ground state, per PCMCIA 3.3-V/5-V switching specifications, to fully

discharge the card capacitors while switching between V

voltages.

output ground switches

Several PCMCIA power-distribution switches on the market do not have an active-grounding FET switch. These devices do not meet the PC Card specification requiring a discharge of V

within 100 ms. PC Card resistance can not be relied on to provide a discharge path for voltages stored on PC Card capacitance because of possible high-impedance isolation by power-management schemes. A method commonly shown to alleviate this problem is to add to the switch output an external 100 kΩ resistor in parallel with the PC Card. Considering that this is the only discharge path to ground, a timing analysis will reveal that the RC time constant delays the required discharge time to over 2 seconds. The only way to ensure timing compatibility with PC Card standards is to use a power-distribution switch that has an internal ground switch, like that of the TPS22xx family , or add an external ground FET to each of the output lines with the control logic necessary to select it.

In summary, the TPS2201 is a complete single-chip dual-slot PC Card power interface. It meets all currently defined PCMCIA specifications for power delivery in 5-V , 3.3-V , and mixed systems, and offers a serial controller interface. The TPS2201 offers functionality, power savings, overcurrent and thermal protection, and fault reporting in one 30-pin SSOP surface-mount package for maximum value added to new portable designs.

power supply considerations

The TPS2201 has multiple terminals for each of its 3.3 V , 5 V, and 12 V power inputs and for the switched V

outputs. Any individual terminal can conduct the rated input or output current. Unless all terminals are connected in parallel, the series resistance is significantly higher than that specified, resulting in increased voltage drops and lost power. Both 12 V inputs must be connected for proper V

switching; it is recommended that all input

and output power terminals be paralleled for optimum operation. The V

input lead must be connected to the

5V input leads. Although the TPS2201 is fairly immune to power input fluctuations and noise, it is generally considered good

design practice to bypass power supplies typically with a 1-µF electrolytic or tantalum capacitor paralleled by a 0.047-µF to 0.1-µF ceramic capacitor. It is strongly recommended that the switched V

and Vpp outputs be bypassed with a 0.1-µF or larger capacitor; doing so improves the immunity of the TPS2201 to electrostatic discharge (ESD). Care should be taken to minimize the inductance of PCB traces between the TPS2201 and the load. High switching currents can produce large negative-voltage transients, which forward biases substrate diodes, resulting in unpredictable performance.

The TPS2201, unlike other PC Card power-interface switches, does not use the 12-V power supply for switching or other chip functions. Instead, an internal charge pump generates the necessary voltage from V

, allowing

the 12-V input supply to be shut down except when the V

programming or erase voltage is needed. Careful

system design making use of this feature reduces power consumption and extends battery lifetime. The 3.3-V power input should not be taken higher than the 5-V input. Doing so, though nondestructive, results

in high current flow into the device, and could result in abnormal operation. In any case, this occurrence indicates a malfunction of one input voltage or both, which should be investigated.

Similarly, no terminal should be taken below – 0.3 V; forward biasing the parasitic-substrate diode results in substrate currents and unpredictable performance.

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

overcurrent and thermal protection

The TPS2201 uses sense FET s to check for overcurrent conditions in each of the VCC and Vpp outputs. Unlike sense resistors or polyfuses, these FETs do not add to the series resistance of the switch; therefore, voltage and power losses are reduced. Overcurrent sensing is applied to each output separately . When an overcurrent condition is detected, only the power output affected is limited; all other power outputs continue to function normally. The OC

indicator, normally a logic high, is a logic low when any overcurrent condition is detected,

providing for initiation of system diagnostics and/or sending a warning message to the user. During power up, the TPS2201 controls the rise time of the V

and Vpp outputs and limits the current into a faulty card or connector. If a short circuit is applied after power is established (e.g., hot insertion of a bad card), current is initially limited only by the impedance between the short and the power supply . In extreme cases, as much as 10 A to 15 A may flow into the short before the current limiting of the TPS2201 engages. If the V

or Vpp outputs are driven below ground, the TPS2201 may latch nondestructively in an off state. Cycling power will reestablish normal operation.

Overcurrent limiting for the V

outputs is designed to engage if powered up into a short in the range of

0.75 A to 1.9 A, typically at about 1.3 A; the V

outputs limit from 120 mA to 400 mA, typically around 200 mA. The protection circuitry acts by linearly limiting the current passing through the switch, rather than initiating a full shutdown of the supply. Shutdown occurs only during thermal limiting.

Thermal limiting prevents destruction of the IC from overheating when the package power-dissipation ratings are exceeded. Thermal limiting, disables all power outputs (both A and B slots) until the device has cooled.

calculating junction temperature

The switch resistance, r

DS(on)

, is dependent on the junction temperature, TJ, of the die. The junction temperature

is dependent on both r

DS(on)

and the current through the switch. T o calculate TJ, first find r

DS(on)

from Figures 16, 17, and 18 using an initial temperature estimate about 50°C above ambient. Then calculate the power dissipation for each switch, using the formula:

PD+

DS(on)

Next, sum the power dissipation and calculate the junction temperature:

TJ+

PD@

)

TA,R

108 CńW

Compare the calculated junction temperature with the initial temperature estimate. If they are not within a few degrees of each other, reiterate using the calculated temperature as the initial estimate.

logic input and outputs

The TPS2201 was designed to be compatible with most popular PCMCIA controllers and current PCMCIA and JEIDA standards. However, some controllers require slightly counterintuitive connections to achieve desired output states. The TPS2201 control logic inputs A_VCC3

, A_VCC5, B_VCC3 and B_VCC5 are defined active low (see Figure 23 and control-logic table). As such, they are directly compatible with the Cirrus Logic CL-PD6720 controller’s logic outputs (see Figure 24). The TPS2201 separate V

power good indicators can

be ORed together to provide a single input to the Cirrus controller.

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

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APPLICATION INFORMATION

A_VPP_PGM A_VPP_VCC A_VCC5 A_VCC3 B_VPP_PGM B_VPP_VCC B_VCC5 B_VCC3

D0–D7

SHDN

APWR_GOOD OC

Internal

Current Monitor

CPU

Controller

Thermal

VPP1

VPP2

VCC

VPP1

12V

Logic

S12

S11

S10

TPS2201

Card A

Card B

VPP2

GND

3 4 5

6 29 28 27 26

BPWR_GOOD

Figure 23. Internal Switching Matrix

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

SLVS094B – AUGUST 1994 – REVISED AUGUST 1995

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APPLICATION INFORMATION

TPS2201 control logic

AVPP

CONTROL SIGNALS INTERNAL SWITCH SETTINGS OUTPUT

SHDN A_VPP_PGM A_VPP_VCC S7 S8 S9 VAVPP

1 0 0 CLOSED OPEN OPEN 0 V 1 0 1 OPEN CLOSED OPEN VCC

†

1 1 0 OPEN OPEN CLOSED VPP(12 V) 1 1 1 OPEN OPEN OPEN Hi-Z 0 X X OPEN OPEN OPEN Hi-Z

BVPP

CONTROL SIGNALS INTERNAL SWITCH SETTINGS OUTPUT

SHDN B_VPP_PGM B_VPP_VCC S10 S11 S12 VBVPP

1 0 0 CLOSED OPEN OPEN 0 V 1 0 1 OPEN CLOSED OPEN VCC

‡

1 1 0 OPEN OPEN CLOSED VPP(12 V) 1 1 1 OPEN OPEN OPEN Hi-Z 0 X X OPEN OPEN OPEN Hi-Z

A VCC

CONTROL SIGNALS INTERNAL SWITCH SETTINGS OUTPUT

SHDN A_VCC3 A_VCC5 S1 S2 S3 VAVCC

1 0 0 CLOSED OPEN OPEN 0 V 1 0 1 OPEN CLOSED OPEN 3 V 1 1 0 OPEN OPEN CLOSED 5 V 1 1 1 CLOSED OPEN OPEN 0 V 0 X X OPEN OPEN OPEN Hi-Z

BVCC

CONTROL SIGNALS INTERNAL SWITCH SETTINGS OUTPUT

SHDN B_VCC3 B_VCC5 S4 S5 S6 VBVCC

1 0 0 CLOSED OPEN OPEN 0 V 1 0 1 OPEN CLOSED OPEN 3 V 1 1 0 OPEN OPEN CLOSED 5 V 1 1 1 CLOSED OPEN OPEN 0 V 0 X X OPEN OPEN OPEN Hi-Z

†

Output depends on AVCC

‡

Output depends on BVCC

TPS2201, TPS2201Y DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES FOR PARALLEL PCMCIA CONTROLLERS

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logic input and outputs (continued)

A_Vpp_PGM A_V

pp_VCC

A_V

CC_3

A_V

CC_5

B_Vpp_PGM B_Vpp_VCC B_V

CC_3

B_V

CC_5

Cirrus Logic

CL-PD6720

To CPU

GND

A_VPP_PGM

A_VPP_VCC

A_VCC3 A_VCC5

B_VPP_PGM

B_VPP_VCC

B_VCC3 B_VCC5

APWR_GOOD

TPS2201

_Valid

BPWR_GOOD

Figure 24. Logic Connections to CL-PD6720

Intel’s 82365SLDF controller uses active-high control logic for V

selection, which requires connecting the

82365SLDF’s 3-V control outputs (A_VCC_EN0, B_VCCEN0) to the TPS2201’s 5-V control inputs (A_VCC5

B_VCC5

) and the 5-V control outputs (A VCC_EN1, B_VCC_EN1) to the 3-V control inputs (A_VCC3, B_VCC3), as illustrated in Figure 25. Examination of the control logic tables on page 16 will confirm that these connections will in fact select the correct output voltage. An alternative approach would be to invert the Intel V

control logic

signals before routing them to the TPS2201. The separate V

power-good indicators of the TPS2201 can be connected directly to the Intel controller as

shown in Figure 25. Cirrus Logic defines a (1, 1) on the V

select lines to be the PC Card no connect state; Intel chose (0, 0) to

select this state. As the tables show, either combination switches the V

outputs to 0 V . The decision to provide 0 V versus a high impedance for the no connect state eliminates potential charging at the switch-to-card interface. Feedback from the PC Card design community favors this approach.

logic allows for 0-V or high-impedance output for no connect (0, 0) or reserved (1, 1) logic inputs, respectively (refer to A VPP and BVPP control-logic tables on page 16). Both the Cirrus Logic and Intel controllers interface directly with the V

control inputs of the TPS2201.

The shutdown input of the TPS2201, SHDN

, when held at a logic low places all VCC and Vpp outputs in a

high-impedance state and reduces chip quiescent current to 1 µA to conserve battery power. An overcurrent output (OC

) is provided to indicate an overcurrent condition in any of the VCC or Vpp supplies

(see discussion above).

ESD protection

All TPS2201 inputs and outputs incorporate ESD-protection circuitry designed to withstand a 2-kV human-body-model discharge as defined in MIL-STD-883C. The V

and Vpp outputs can be exposed to potentially higher discharges from the external environment through the PC card connector. Bypassing the outputs with 0.1-µF capacitors protects the devices from discharges up to 10 kV.

TPS2201, TPS2201Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR PARALLEL PCMCIA CONTROLLERS

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A_VCC5 A_VCC3

A_VPP_VCC

A_VPP_PGM

B_VCC5 B_VCC3

B_VPP_VCC

B_VPP_PGM

APWR_GOOD

A_VCC _EN0

A_VCC _EN1 A_Vpp _EN0 A_Vpp _EN1 B_VCC _EN0 B_VCC _EN1 B_Vpp _EN0 B_Vpp _EN1 A:GPI

B:GPI

pp1

pp2

pp1

pp2

CSSHDN

PC Card

Connector B

PC Card

Connector A

INTEL

82365SL DF

AVCC AVCC AVCC

BVCC BVCC BVCC

AVPP AVPP

BVPP BVPP

3 V

0.1 µF

5 V

12 V

Shutdown

Signal

From CPU

To CPUOC

BPWR_GOOD

5 V

GND

12V

TPS2201 0.1 µF

0.1 µF

Figure 25. Detailed Operating Circuits Using Intel 82365SLDF Controller

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IMPORTANT NOTICE

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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

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TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Datasheet TPS2201IDFR, TPS2201IDFLE, TPS2201IDBR, TPS2201IDBLE Datasheet (Texas Instruments)

Specifications and Main Features

Frequently Asked Questions

User Manual