Texas Instruments TPS2114PW, TPS2115PW Schematic [ru]

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1
2
3
4

8
7
6
5

STAT

D0
D1

ILIM

IN1
OUT
IN2
GND

PW PACKAGE

(TOP VIEW)

STAT
D0
D1
ILIM

IN1

OUT

IN2

GND

1
2
3
4

8
7
6
5

TPS2115PW

0.1 µF

0.1 µF

C

L

R

L

IN1: 2.8 - 5.5 V

IN2: 2.8 - 5.5 V

R

ILIM

Switch Status

R1

AUTOSWITCHING POWER MULTIPLEXER

TPS2114
TPS2115

SLVS447A – DECEMBER 2002 – REVISED MARCH 2004

FEATURES

• Available in a TSSOP-8 Package

• Two-Input, One-Output Power Multiplexer

With Low r

Switches:

DS(on)

– 84 mΩ Typ (TPS2115)
– 120 mΩ Typ (TPS2114)

• Reverse and Cross-Conduction Blocking

• Wide Operating Voltage Range: 2.8 V to 5.5 V

• Low Standby Current: 0.5 µA Typical

• Low Operating Current: 55 µA Typical

APPLICATIONS

• PCs

• PDAs

• Digital Cameras

• Modems

• Cell phones

• Digital Radios

• MP3 Players

• Adjustable Current Limit

• Controlled Output Voltage Transition Times,

Limits Inrush Current and Minimizes Output
Voltage Hold-Up Capacitance

• CMOS and TTL Compatible Control Inputs

• Manual and Auto-Switching Operating Modes

• Thermal Shutdown

DESCRIPTION

The TPS211x family of power multiplexers enables seamless transition between two power supplies, such as a
battery and a wall adapter, each operating at 2.8-5.5 V and delivering up to 1 A. The TPS211x family includes
extensive protection circuitry, including user-programmable current limiting, thermal protection, inrush current
control, seamless supply transition, cross-conduction blocking, and reverse-conduction blocking. These features
greatly simplify designing power multiplexer applications.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TYPICAL APPLICATION

Copyright © 2002–2004, Texas Instruments Incorporated

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TPS2114
TPS2115

SLVS447A – DECEMBER 2002 – REVISED MARCH 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS

FEATURE TPS2110 TPS2111 TPS2112 TPS2113 TPS2114 TPS2115

Current limit adjustment range 0.31-0.75A 0.63-1.25A 0.31-0.75A 0.63-1.25A 0.31-0.75A 0.63-1.25A

Switching modes

Switch status output No No Yes Yes Yes Yes
Package TSSOP-8 TSSOP-8 TSSOP-8 TSSOP-8 TSSOP-8 TSSOP-8

T

A

-40°C to 85°C TSSOP-8 (PW)

(1) The PW package is available taped and reeled. Add an R suffix to the device type (e.g., TPS2114PWR) to indicate tape and reel.

PACKAGE DISSIPATION RATINGS

PACKAGE

TSSOP-8 (PW) 3.87 mW/°C 386.84 mW 212.76 mW 154.73 mW

Manual Yes Yes No No Yes Yes
Automatic Yes Yes Yes Yes Yes Yes

ORDERING INFORMATION

PACKAGE ORDERING NUMBER

TPS2114PW 2114
TPS2115PW 2115

DERATING FACTOR TA≤ 25°C TA= 70°C TA= 85°C

ABOVE TA= 25°C POWER RATING POWER RATING POWER RATING

(1)

MARKINGS

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

V

I

V

O

I

O

I

O

T

J

T

stg

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to GND.

Input voltage range IN1, IN2, D0, D1, ILIM
Output voltage range
Output sink current STAT 5 mA

Continuous output current

Continuous total power dissipation See Dissipation Rating Table
Operating virtual junction temperature range -40°C to 125°C
Storage temperature range -65°C to 150°C
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260°C

(2)

OUT, STAT -0.3 V to 6 V

TPS2114 0.9 A
TPS2115 1.5 A

(1)

TPS2114, TPS2115

(2)

-0.3 V to 6 V

2

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TPS2114
TPS2115

SLVS447A – DECEMBER 2002 – REVISED MARCH 2004

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

V

≥ 2.8 V 1.5 5.5

V

I

V

I

V

I

I

O(OUT)

T

J

Input voltage at IN1 V

Input voltage at IN2 V

Input voltage at D0, D1 0 5.5 V

Current limit adjustment range A

Operating virtual junction temperature -40 125 °C

ELECTROSTATIC DISCHARGE (ESD) PROTECTION

Human body model 2 kV
CDM 500 V

ELECTRICAL CHARACTERISTICS

over recommended operating junction temperature range, V

PARAMETER TEST CONDITIONS UNIT

POWER SWITCH

TJ= 25°C,
IL= 500 mA

Drain-source on-state

(1)

r

DS(on)

(1) The TPS211x can switch a voltage as low as 1.5 V as long as there is a minimum of 2.8 V at one of the input power pins. In this specific

resistance (INx-OUT)

TJ= 125°C,
IL= 500 mA

case, the lower supply voltge has no effect on the IN1 and IN2 switch on-resistances.

I(IN2)

V

< 2.8 V 2.8 5.5

I(IN2)

V

≥ 2.8 V 1.5 5.5

I(IN1)

V

< 2.8 V 2.8 5.5

I(IN1)

TPS2114 0.31 0.75
TPS2115 0.63 1.25

MIN MAX UNIT

= V

I(IN1)

I(IN2)

= 5.5 V, R

= 400 Ω (unless otherwise noted)

(ILIM)

TPS2114 TPS2115

MIN TYP MAX MIN TYP MAX

V

= V

I(IN1)

V

I(IN1)

V

I(IN1)

V

I(IN1)

V

I(IN1)

V

I(IN1)

= 5.0 V 120 140 84 110

I(IN2)

= V

= 3.3 V 120 140 84 110 mΩ

I(IN2)

= V

= 2.8 V 120 140 84 110

I(IN2)

= V

= 5.0 V 220 150

I(IN2)

= V

= 3.3 V 220 150 mΩ

I(IN2)

= V

= 2.8 V 220 150

I(IN2)

3

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TPS2114
TPS2115

SLVS447A – DECEMBER 2002 – REVISED MARCH 2004

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS UNIT

LOGIC INPUTS (D0 AND D1)

V

IH

V

IL

High-level input voltage 2 V
Low-level input voltage 0.7 V

Input current at D0 or D1 µA

D0 or D1 = High, sink current 1
D0 or D1 = Low, source current 0.5 1.4 5

SUPPLY AND LEAKAGE CURRENTS

D1 = High, D0 = Low (IN1 active), V
V

I(IN2)

= 3.3 V, I

= 0 A

O(OUT)

D1 = High, D0 = Low (IN1 active), V
V

= 5.5 V, I

Supply current from IN1 (operating) µA

I(IN2)

D0 = D1 = Low (IN2 active), V
V

= 3.3 V, I

I(IN2)

D0 = D1 = Low (IN2 active), V
V

= 5.5 V, I

I(IN2)

= 0 A

O(OUT)

I(IN1)

= 0 A

O(OUT)

I(IN1)

= 0 A

O(OUT)

D1 = High, D0 = Low (IN1 active), V
V

I(IN2)

= 3.3 V, I

= 0 A

O(OUT)

D1 = High, D0 = Low (IN1 active), V
V

= 5.5 V, I

Supply current from IN2 (operating) µA

I(IN2)

D0 = D1 = Low (IN2 active), V
V

= 3.3 V, I

I(IN2)

D0 = D1 = Low (IN2 active), V
V

= 5.5 V, I

I(IN2)

D0 = D1 = High (inactive), V
V

= 3.3 V, I

Quiescent current from IN1 (STANDBY) µA

I(IN2)

D0 = D1 = High (inactive), V
V

= 5.5 V, I

I(IN2)

D0 = D1 = High (inactive), V
V

= 3.3 V, I

Quiescent current from IN2 (STANDBY) µA

I(IN2)

D0 = D1 = High (inactive), V
V

= 5.5 V, I

I(IN2)

Forward leakage current from IN1 D0 = D1 = High (inactive), V
(measured from OUT to GND) V

= 0 V (shorted), TJ= 25°C

O(OUT)

Forward leakage current from IN2 D0 = D1= High (inactive), V
(measured from OUT to GND) V

= 0 V (shorted), TJ= 25°C

O(OUT)

Reverse leakage current to INx D0 = D1 = High (inactive), V
(measured from INx to GND) V

O(OUT)

= 5.5 V, TJ= 25°C

= 0 A

O(OUT)

= 0 A

= 0 A

= 0 A

= 0 A

= 0 A

I(IN2)

I(IN1)

I(IN1)

I(IN1)

I(IN1)

I(IN1)

I(IN1)

I(IN1)

= 5.5 V, IN1 open,

I(INx)

= 0 A

O(OUT)

O(OUT)

O(OUT)

O(OUT)

O(OUT)

O(OUT)

I(IN1)

I(IN1)

= 5.5 V,

= 3.3 V,

I(IN1)

I(IN1)

= 5.5 V,

= 3.3 V,

= 5.5 V,

= 3.3 V,

= 5.5 V,

= 3.3 V,

= 5.5 V, IN2 open,

= 0 V,

= 5.5 V,

= 3.3 V,

= 5.5 V,

= 3.3 V,

CURRENT LIMIT CIRCUIT

R

= 400 Ω 0.51 0.63 0.80

(ILIM)

R

= 700 Ω 0.30 0.36 0.50

(ILIM)

R

= 400 Ω 0.95 1.25 1.56

(ILIM)

R

= 700 Ω 0.47 0.71 0.99

(ILIM)

Time for short-circuit output current to settle within
10% of its steady state value.

= 0 V, I

I(ILIM)

= 0 A -15 0 µA

O(OUT)

Current limit
accuracy

t

d

TPS2114

TPS2115

Current limit settling time

(1)

Input current at ILIM V

(1) Not tested in production.

TPS2115

MIN TYP MAX

55 90

1 12

75

1

1

75

1 12

55 90

0.5 2

1

1

0.5 2

0.1 5 µA

0.1 5 µA

0.3 5 µA

1 ms

A

4

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TPS2114
TPS2115

SLVS447A – DECEMBER 2002 – REVISED MARCH 2004

ELECTRICAL CHARACTERISTICS (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS UNIT

UNDERVOLTAGE LOCKOUT

IN1 and IN2 UVLO V

IN1 and IN2 UVLO hysteresis

Internal V

Internal V

UVLO (the higher of IN1 and IN2) V

DD

UVLO hysteresis

DD

UVLO deglitch for IN1, IN2

(2)

(2)

(2)

Falling edge 1.15 1.25
Rising edge 1.30 1.35

Falling edge 24 2.53
Rising edge 2.58 2.8

Falling edge 110 µs

REVERSE CONDUCTION BLOCKING

∆V

O(I_block)

Minimum output-to-input voltage V supply through a series 1-kΩ resistor. Let
difference to block switching D0 = low. Slowly decrease the supply voltage until

D0 = D1 = high, V

= 3.3 V. Connect OUT to a 5

I(INx)

OUT connects to IN1.

THERMAL SHUTDOWN

Thermal shutdown threshold
Recovery from thermal shutdown
Hysteresis

(2)

(2)

(2)

TPS211x is in current limit. 135
TPS211x is in current limit. 125 °C

IN2-IN1 COMPARATORS

Hysteresis of IN2-IN1 comparator 0.1 0.2 V
Deglitch of IN2-IN1 comparator, (both↑↓ )

(2)

STAT OUTPUT

Leakage current V
Saturation voltage I

= 5.5 V 0.01 1 µA

O(STAT)

= 2 mA, IN1 switch is on 0.13 0.4 V

I(STAT)

Deglitch time (falling edge only) 150 µs

(2) Not tested in production.

TPS2115

MIN TYP MAX

30 57 65 mV

30 50 75 mV

80 100 120 mV

10

90 150 220 µs

5

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TPS2114
TPS2115

SLVS447A – DECEMBER 2002 – REVISED MARCH 2004

SWITCHING CHARACTERISTICS

over recommended operating junction temperature range, V

PARAMETER TEST CONDITIONS UNIT

POWER SWITCH

Output rise time from an

t

r

t

f

t

t

t

PLH1

t

PHL1

t

PLH2

t

PHL2

(1)

enable

Output fall time from a

(1)

disable

Transition time

Turnon propagation delay CL= 10 µF,
from enable

Turnoff propagation delay CL= 10 µF,
from a disable

Switch-over rising CL= 10 µF,
propagation delay

Switch-over falling CL= 10 µF,
propagation delay

(1)

(1)

(1)

(1)

(1)

V

= V

I(IN1)

V

I(IN1)

= 5 V IL= 500 mA, 0.5 1.0 1.5 1 1.8 3 ms

I(IN2)

= V

= 5 V IL= 500 mA, 0.35 0.5 0.7 0.5 1 2 ms

I(IN2)

IN1 to IN2 transition, TJ= 125°C,
V

= 3.3 V, CL= 10 µF, 40 60 40 60

I(IN1)

V

= 5 V IL= 500 mA [Measure

I(IN2)

IN2 to IN1 transition,
V

= 5 V, 40 60 40 60

I(IN1)

V

= 3.3 V

I(IN2)

V

= V

I(IN1)

Measured from enable 0.5 1 ms
to 10% of V

V

I(IN1)

Measured from disable 3 5 ms
to 90% of V

= 5 V,

I(IN2)

O(OUT)

= V

= 5 V,

I(IN2)

O(OUT)

Logic 1 to Logic 0 tran­sition on D1,
V

= 1.5 V,

I(IN1)

V

= 5 V, 0.17 1 0.17 1 ms

I(IN2)

V

= 0 V,

I(D0)

Measured from D1 to
10% of V

O(OUT)

Logic 0 to Logic 1 tran­sition on D1,
V

= 1.5 V,

I(IN1)

V

= 5V, 2 3 10 2 5 10 ms

I(IN2)

V

= 0 V, Measured

I(D0)

from D1 to 90% of
V

O(OUT)

= V

I(IN1)

I(IN2)

TJ= 25°C, CL= 1 µF,
See Figure 1 (a)

TJ= 25°C, CL= 1 µF,
See Figure 1(a)

transition time as
10-90% rise time or
from 3.4 V to 4.8 V
on V
See Figure 1 (b)

],

O(OUT)

TJ= 25°C,
IL= 500 mA,

SeeFigure 1 (a)
TJ= 25°C,

IL= 500 mA,
See Figure 1 (a)

TJ= 25°C,
IL= 500 mA,

See Figure 1 (c)

TJ= 25°C,
IL= 500 mA,

See Figure 1 (c)

= 5.5 V, R

= 400 Ω (unless otherwise noted)

(ILIM)

TPS2114 TPS2115

MIN TYP MAX MIN TYP MAX

µs

(1) Not tested in production.

6

TRUTH TABLE

D1 D0 V

0 0 X Hi-Z IN2
0 1 No 0 IN1
0 1 Yes Hi-Z IN2
1 0 X 0 IN1
1 1 X 0 Hi-Z

(1) The under-voltage lockout circuit causes the output OUT to go Hi-Z

if the selected power supply does not exceed the IN1/IN2 UVLO, or
if neither of the supplies exceeds the internal V

> V

I(IN2)

I(IN1)

STAT OUT

UVLO.

DD

(1)

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Q2 is ON

1

STAT

Control

Logic

D1

D0

UVLO (IN1)

UVLO (IN2)

UVLO (VDD)

Q2 is ON

Q1 is ON

_

+

_

+

+

0.6 V

EN2

EN1

Cross-Conduction
Detector

_
+

Q2

Q1

Charge

Pump

0.5 V

TPS2114: k = 0.2%
TPS2115: k = 0.1%

k* I

O(OUT)

_

+

V

O(OUT)

> V

I(INx)

+

100 mV

_

+

I

O(OUT)

Vf = 0 V

EN1

IN2
IN1

7

4

OUT

ILIM

Internal V

DD

Vf = 0 V

V

DD

ULVO

Thermal

Sense

1 µA

IN2

ULVO

1 µA

IN1

ULVO

8

6

2
3

5

IN1

IN2

D0
D1

GND

TPS2114
TPS2115

SLVS447A – DECEMBER 2002 – REVISED MARCH 2004

Terminal Functions

TERMINAL

NAME NO.

D0 2 I TTL and CMOS compatible input pins. Each pin has a 1-µA pullup resistor. The truth table shown above illustrates
D1 3 I
GND 5 I Ground
IN1 8 I Primary power switch input. The IN1 switch can be enabled only if the IN1 supply is above the UVLO threshold and

IN2 6 I Secondary power switch input. The IN2 switch can be enabled only if the IN2 supply is above the UVLO threshold

ILIM 4 I A resistor R

OUT 7 O Power switch output
STAT 1 O STAT is an open-drain output that is Hi-Z if the IN2 switch is ON. STAT pulls low if the IN1 switch is ON or if OUT is

FUNCTIONAL BLOCK DIAGRAM

I/O DESCRIPTION

the functionality of D0 and D1.

at least one supply exceeds the internal V

and at least one supply exceeds the internal V

from ILIM to GND sets the current limit ILto 250/R

TPS2115, respectively.

(ILIM)

Hi-Z (i.e., EN is equal to logic 0).

UVLO.

DD

UVLO.

DD

and 500/R

(ILIM)

for the TPS2114 and

(ILIM)

7