SLVS288A – SEPTEMBER 2000 – REVISED FEBRUAR Y 2001
D
Complete USB Hub Power Solution
D
Meets USB Specifications 1.1 and 2.0
D
Independent Thermal and Short-Circuit
Protection
D
3.3-V Regulator for USB Hub Controller
D
Overcurrent Logic Outputs
D
4.5-V to 5.5-V Operating Range
D
CMOS- and TTL-Compatible Enable Inputs
D
185 µA Bus-Power Supply Current
D
Available in 24-Pin SSOP Package
D
–40°C to 85°C Ambient Temperature Range
description
The TPS2074 and TPS2075 provide a complete
USB hub power solution by incorporating three
major functions: current-limited power switches
for four ports, a 3.3-V 100-mA regulator, and a
DP0 line control to signal attach/detach of the hub.
These devices are designed to meet bus-powered and self-powered hub requirements. These
PG_DLY
AGND
3.3V_OUT
BPMODE
DP0_RST
DGND
NC – No internal connection
†
Pin 9 is active low (BPMODE
and active high (BPMODE) for TPS2075.
simplified hybrid-hub diagram
Power
Supply
DB PACKAGE
EN1
PG
SP
SP
NC
†
EN2
SP
devices are also designed for hybrid hub
implementations and allow for automatic switching from self-powered mode to bus-powered
mode if loss of self-power is experienced. This
feature can be disabled by applying a logic high to
the BP_DIS input
Each port has a current-limited 100-mΩ Nchannel MOSFET high-side power switch for
500 mA self-powered operation. Each port also
has a current-limited 500-mΩ N-channel MOS-
FET high-side power switch for 100-mA buspowered operation. All the N-channel MOSFETs
Upstream
Port
D+
D–
5 V
GND
1.5
kΩ
DP0_RST
BP
3.3 V_OUTBPMODE
VCCEN OC
DP0
DM0
are designed without parasitic diodes, preventing
current backflow into the inputs.
‡
For applications where a 5-V regulator is needed,
See Figure 33 for complete implementation.
use the TPS2070 or TPS2071 device.
SELECTION GUIDE
PACKAGED DEVICES
PIN COUNTBPMODEHTSSOP (DAP)SSOP (DB)
p
–
p
†
The DB package is available taped and reeled. Add an R suffix to the device type (e.g., TPS2074DBR).
Active lowTPS2070DAP—
Active highTPS2071DAP—
Active low—TPS2074DB
Active high—TPS2075DB
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
TPS2074
Hub
Controller
BP_DIS
24
BP
23
OUT1
22
OUT2
21
OUT3
20
OUT4
19
OC4
18
OC3
17
OC2
16
OC1
15
EN4
14
EN3
13
) for TPS2074
OUT1
OUT2
OUT3
OUT4
DP1
DM1
DP2
DM2
DP3
DM3
DP4
DM4
‡
D+
D–
5 V
GND
D+
D–
5 V
GND
Downstream
Ports
D+
D–
5 V
GND
D+
D–
5 V
GND
†
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2001, Texas Instruments Incorporated
1
TPS2074, TPS2075
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS288A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
functional block diagram
BP
SP
SP
3.3 V/100 mA LDO
S1
S2
S3
S4
S5
S6
3.3 V_OUT
PG
PG_DLY
OUT1
OUT2
OUT3
S7
S8
Control
Logic
OUT4
DPO_RST
BP_DIS
AGND
DGND
EN1
OC1
EN2
OC2
EN3
OC3
EN4
OC4
BPMODE (TPS2074)
BPMODE (TPS2075)
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2074, TPS2075
I/O
DESCRIPTION
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS288A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
Terminal Functions
TERMINAL
NAMENO.
PG_DLY
EN12IActive-low enable for OUT1
AGND3Analog ground
PG4OLogic output, power good
SP5ISelf-power voltage input, connects to local power supply
SP6ISelf-power voltage input, connects to local power supply
NC7No internal connection
3.3V_OUT8O3.3-V internal voltage regulator output
BPMODE
DP0_RST10OConnects to DP signal from upstream hub/host through an external 1.5-kΩ resistor
EN211IActive-low enable for OUT2
DGND12Digital ground
EN313IActive-low enable for OUT3
EN414IActive-low enable for OUT4
OC115OLogic output, overcurrent response for OUT1
OC216OLogic output, overcurrent response for OUT2
OC317OLogic output, overcurrent response for OUT3
OC418OLogic output, overcurrent response for OUT4
OUT419OPower switch output for downstream ports
OUT320OPower switch output for downstream ports
OUT221OPower switch output for downstream ports
OUT122OPower switch output for downstream ports
BP23IBus power voltage input, connect to V
BP_DIS24IActive-high logic input, disables autoswitch to bus power when self power is disconnected. Connect to BP or GND
†
‡
†
1Adjusts the PG time delay with a capacitor to ground. Adjust the pulse width to fit the application.
‡
9OA logic signal that indicates if the outputs source from the bus-powered supply, BPMODE (TPS2074) or BPMODE
Use the following formula to calculate the capacitance needed;
C = (desired pulse width × 3 × 10–6 / 1.22
Pin 9 is active low for TPS2074 and active high for TPS2075.
(TPS2075), can be used to signal the hub controller.
BUS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
TPS2074, TPS2075
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS288A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
detailed description
BP
The bus-powered supply input (BP) serves as the source for the internal 3.3-V LDO and for all logic functions
in the device. In bus-powered mode, BP also serves as the source for all the outputs (OUTx). If BP is below the
undervoltage threshold, all power switches will turn off and the LDO will be disabled. BP must be connected to
a voltage source in order for the device to operate.
SP
The self-powered supply input (SP) serves as the source for all the outputs (OUTx) in self-powered mode. The
enable logic for the SP switches requires that BP be connected to a voltage source.
OUT1, OUT2, OUT2, OUT4
OUTx are the outputs of the integrated power switches.
3.3V_OUT
The internal 3.3-V LDO output can be used to supply up to 100 mA current to low-power functions, such as hub
controllers.
DP0_RST
DP0_RST functions as a hub reset when a 1.5-kΩ resistor is connected between DP0_RST and the upstream
DP0 data line in a hub system. To provide a clean attach signal on DP0 data line, the DP0_RST output goes
low momentarily (because of the upstream pulldown resistor) to discharge any parasitic charge on the cable,
then goes to 3-state and finally outputs a high signal. The low and Hi-Z pulse widths are adjustable using a
capacitor between PG_DL Y and ground, and are approximately 50% of the power-good time delay. Detachment
is signaled by a Hi-Z on DP0_RST. Both DP0_RST and PG will transition high at the same time.
Power Good (PG)
The power good (PG) function serves as a reset for a USB hub controller. PG is asserted low when the output
voltage on the internal voltage regulator is below a fixed threshold. A time delay to ensure a stable output voltage
before PG goes high is adjustable using a small-value ceramic capacitor from PG_DLY to ground.
PG_DLY
PG_DL Y connects to an external capacitor to adjust the time delay for PG and DP0_RST . For USB applications,
a 0.1 µF capacitor is recommended, however, reference the USB hub controller data sheet to determine the
needed pulse width criteria.
BP_DIS
BP_DIS is used to enable or disable the autoswitching function between bus-powered mode and self-powered
mode. When BP_DIS is connected low and the voltage on SP is greater than the undervoltage-lockout (UVLO)
threshold, the device will switch to self-powered operation automatically; if the SP voltage falls lower than the
UVLO threshold, the device will switch to bus-powered operation. When BP_DIS is connected high, the
autoswitching function is disabled and the device will not autoswitch to bus-powered operation if the SP voltage
is below the UVLO threshold.
BPMODE
4
or BPMODE
BPMODE
mode. The logic state is set according to the voltages on BP, SP, and BP_DIS. For the TPS2074, BPMODE
outputs a low signal to indicate bus-powered mode or a high signal to indicate self-powered mode. For the
TPS2075, BPMODE outputs a high signal to indicate bus-powered mode or a low signal to indicate self-powered
mode. This output can be used to inform a USB hub controller to configure for bus-powered mode or
self-powered mode.
(TPS2074) or BPMODE (TPS2075) is an output that signals when the device is in bus-powered
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2074, TPS2075
Input voltage
V
O
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS288A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
detailed description (continued)
OC1, OC2, OC3, OC4
OCx is an output signal that is asserted (active low) when an overcurrent or overtemperature condition is
encountered for the corresponding channel. OCx
condition is removed.
, EN2, EN3, EN4,
EN1
will remain asserted until the overcurrent or overtemperature
The active-low logic input ENx
enables or disables the power switches in the device. The enable input is
compatible with both TTL and CMOS logic levels. The switches will not turn on until 3.3V_OUT is above the PG
threshold.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range: V
Output voltage range: V
, V
I(BP)
O(OUTx)
V
O(3.3V_OUT)
V
O(DP0_RST)
Continuous output current: I
Maximum output current:I
Operating virtual junction temperature range, T
Storage temperature range, T
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds260°C. . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Specified by design, not tested in production.
SP4.5
BPV
SP4
BP3.75
SP300
BP300
= Hi-Z4.25
I(SP)
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7
TPS2074, TPS2075
_
mA
tonTurnon time (see Note 1)
ms
t
Turnoff time (see Note 1)
ms
trRise time, output (see Note 1)
ms
tfFall time, output (see Note 1)
ms
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS288A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
electrical characteristics over recommended operating junction temperature range,
4.5 V ≤ V
≤ 5.5 V, 4.85 V ≤ V
I(BP)
otherwise noted)
internal voltage regulator
PARAMETER
V
I
OS
PSRRPower-supply ripple rejection (see Note 1)
V
V
V
V
ref
t
d
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
NOTES: 1. Specified by design, not tested in production.
Output voltage, dcV
O
Dropout voltageIO = 100 mA0.6V
Line regulationV
Load regulationV
Short-circuit current limit
Pulldown transistor at 3.3V_OUTPUT
(see Note 1)
Low-level trip threshold voltage at PG2.882.943V
Hysteresis voltage at PG (see Note 1)50100mV
hys
High-level output voltage at PG4.25 V ≤ V
OH
Low-level output voltage at PG4.25 V ≤ V
OL
Reference voltage at PG_DLY1.22V
Charge current at PG_DLY3µA
Delay time at PG (see Notes 1 and 2)C
2. The PG delay time (td) is calculated using the PG_DLY reference voltage and charge current:
C
L(PG_DLY)
td+
Charge Current
†
V
ref
≤ 5.5 V, ENx = 0 V, BP_DIS = 0 V, C
I(SP)
TEST CONDITIONSMINTYPMAXUNIT
= 4.25 V to 5.5 V, IO= 5 mA to 100 mA3.23.33.4V
I(BP)
= 4.25 V to 5.25 V, IO= 5 mA0.1%/v
I(BP)
= 4.25 V,IO= 5 mA to 100 mA0.6%
I(BP)
V
= 4.25 V, 3.3V_OUT connected to GND0.120.20.3A
I(BP)
V
I(3.3V_OUT)
V
I(3.3V_OUT)
F = 1 kHz, C
IO=5 mA, V
L(PG_DLY)
= 3.3 V10
= 1 V
L(3.3V_OUT)
I(BP)PP
≤ 5.25 V, IO = 2 mA2.4V
I(BP)
≤ 5.25 V, IO = 3.2 mA0.4V
I(BP)
= 0.47 µF190ms
=4.7 µF, ESR=0.25 Ω ,
=100 mV
L(3.3V_OUT)
5
40dB
= 10 µF (unless
power switch timing requirements
PARAMETERTEST CONDITIONS
BP to OUTx
switch
SP to OUTx
switch
BP to OUTx
off
p
p
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
‡
All BP to OUTx , SP to OUTx switches and the internal 3.3-V voltage regulator are loaded to the recommended continuous current rating of
100 mA, 500 mA and 100 mA, respectively, for the static drain-source on-state resistance measurements.
NOTE 1. Specified by design, not tested in production.
switch
SP to OUTx
switch
BP to OUTx
switch
SP to OUTx
switch
BP to OUTx
switch
SP to OUTx
switch
V
= 5 V, V
I(BP)
CL = 100 µF, RL = 50 Ω
V
= V
I(SP)
CL = 100 µF, RL = 10 Ω
V
I(BP)
CL = 100 µF, RL = 50 Ω
V
I(SP)
CL = 100 µF, RL = 10 Ω
V
I(BP)
CL = 100 µF, RL = 50 Ω
V
I(SP)
CL = 100 µF, RL = 10 Ω
V
I(BP)
CL = 100 µF, RL = 50 Ω
V
I(SP)
CL = 100 µF, RL = 10 Ω
I(BP)
= 5 V, V
= V
I(BP)
= 5 V, V
= V
I(BP)
= 5 V, V
= V
I(BP)
= open, TA = 25°C,
I(SP)
= 5 V, TA = 25°C,
= open, TA = 25°C,
I(SP)
= 5 V, TA = 25°C,
= open, TA = 25°C,
I(SP)
= 5 V, TA = 25°C,
= open, TA = 25°C,
I(SP)
= 5 V, TA = 25°C,
†‡
MINTYPMAXUNIT
4.5
4.5
15
10
4
3
10
3
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
thermal shutdown
TJThermal shutdown
°C
Hysteresis
°C
TPS2074, TPS2075
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS288A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
PARAMETERMINTYPMAX
First140
Second150
First15
Second25
UNIT
°
DUT
+
INOUT
TEST CIRCUIT
Figure 1. Current Limit Response
V
I(EN)
(2 V/div)
Current
Meter
V
= 5 V
I(BP)
TA = 25°C
CL = 10 µF
RL = 50 Ω
V
I(ENx
V
O(OUTx)
V
O(OUTx)
)
t
pd(on)
t
on
50%50%
10%10%
t
r
10%10%
TIMING
90%90%
90%90%
t
pd(off)
t
off
t
f
Figure 2. Timing and Internal Voltage Regulator
Transition Waveforms
V
I(EN)
(2 V/div)
V
O(out)
(2 V/div)
024681012 1416 18 20
t – time – ms
Figure 3. Turnon Delay and Rise Time
(BP Switch)
V
O(OUT)
(2 V/div)
0 2 4 6 8 101214161820
Figure 4. Turnoff Delay and Fall Time
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V
= 5 V
I(BP)
TA = 25°C
CL = 10 µF
RL = 50 Ω
t – time – ms
(BP Switch)
9
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