Texas Instruments TPS2060DGN, TPS2060DRBR, TPS2064DGN, TPS2064DRBR, TPS2068D Schematic [ru]

D−8 DRB−8DGN−8

TPS2060/TPS2064

DGNPACKAGE

(TOP VIEW)

GND

1
2
3
4

8
7
6
5

IN

EN1
EN2

OC1
OUT1
OUT2

OC2

TPS2068

DGNPACKAGE

(TOP VIEW)

GND

1
2
3
4

8
7
6
5

IN

IN

EN

OUT
OUT
OUT

OC

TPS2069

DGNPACKAGE

(TOP VIEW)

GND

1
2
3
4

8
7
6
5

IN
IN

EN

OUT
OUT
OUT

OC

TPS2068

DPACKAGE

(TOP VIEW)

GND

IN

IN

EN

OUT

OUT

OUT

OC

1

2

3

4

8

7

6

5

GND

IN

EN1

†

EN2

OC1

OUT1

OUT2

OC2

TPS2060/TPS2064

DRBPACKAGES

(TOP VIEW)

† Allenableinputsareactivehighforthe TPS2064devices.

†

†

†

4

3

2

1

5

6

7

8

www.ti.com

SLVS553K –MARCH 2005– REVISED MAY 2011

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

Check for Samples: TPS2060, TPS2064, TPS2068, TPS2069

1

FEATURES

2

• 70-mΩ High-Side MOSFET

• 1.5-A Continuous Current • Short-Circuit Protections

• Thermal and Short-Circuit Protection

• Accurate Current Limit (1.6 A min, 2.6 A max)

• Operating Range: 2.7 V to 5.5 V

• 0.6-ms Typical Rise Time

• Undervoltage Lockout

• Deglitched Fault Report (OC)

• No OC Glitch During Power Up

• 1-μA Maximum Standby Supply Current

• Reverse Current Blocking

• TPS2060/64 Temperature Range: 0°C to 70°C

• TPS2068/69 DGN Package Temperature
Range: –40°C to 85°C

• TPS2068 D Package Temperature Range:
0°C to 70°C

• UL Listed – File No. E169910

• TPS2068/69: CB Certified

APPLICATIONS

• Heavy Capacitive Loads

TPS2060, TPS2064
TPS2068, TPS2069

DESCRIPTION

The TPS206x power-distribution switches are intended for applications where heavy capacitive loads and
short-circuits are likely to be encountered. This device incorporates 70-mΩ N-channel MOSFET power switches
for power-distribution systems that require single or dual power switches in a single package. Each switch is
controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the
power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no
external components and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the device limits the output current
to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When
continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction
temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal
shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains
off until valid input voltage is present. Current limit is typically 2.1 A.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPad is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2005–2011, Texas Instruments Incorporated

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

AVAILABLE OPTION AND ORDERING INFORMATION

RECOMMENDED TYPICAL PACKAGED

T

A

0°C to 70°C Dual

–40°C to 85°C Single

ENABLE

Active low TPS2060DGN TPS2060DRB

Active high TPS2064DGN TPS2064DRB

Active low 1.5 A 2.1 A TPS2068DGN

Active high TPS2069DGN

MAXIMUM SHORT-CIRCUIT NUMBER OF DEVICES

CONTINUOUS CURRENT LIMIT SWITCHES

LOAD CURRENT AT 25°C

MSOP (DGN) SON (DRB)

0°C to 70°C Active low Single TPS2068D

(1) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2060DGN).
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

Input voltage range, V

VIInput voltage range, V

Voltage range, V
VOOutput voltage range, V
I

Continuous output current, I

O

Continuous total power dissipation See Dissipation Rating Table

Operating virtual junction temperature

T

J

range

T

Storage temperature range –65°C to 150°C

stg

ESD Electrostatic discharge protection

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

I(/OC)

I(IN)
I(/ENx)

, V

, V

I(/OCx)

O(OUT)

I(ENx)

, V

O(OUT)

O(OUTx)

, I

O(OUTx)

TPS2060/64 0°C to 105°C
TPS2068/69 (DGN Package) –40°C to 105°C
TPS2068 (D Package) 0°C to 105°C

Human body model MIL-STD-883C 2 kV
Charge device model (CDM) 500 V

(1)

UNIT

–0.3 V to 6 V
–0.3 V to 6 V
–0.3 V to 6 V
–0.3 V to 6 V

Internally limited

www.ti.com

(1) (2)

DISSIPATING RATING TABLE

(1)

THERMAL TA< 25°C DERATING TA= 70°C TA= 85°C

PACKAGE RESISTANCE POWER RATING FACTOR POWER RATING POWER RATING

DGN-8

θ

(2)

JA

1370 mW 17 mW/°C 600 mW 342 mW

ABOVE TA= 25°C

D-8 585.82 mW 5.8582 mW/°C 322.20 mW 234.32 mW

DRB-8 (Low-K)

DRB-8 (High-K)

(3)

(4)

270 °CW 370 mW 3.71 mW/°C 203 mW 148 mW

60 °CW 1600 mW 16.67 mW/°C 916 mW 866 mW

(1) Heatsink the PowerPad™per the recommendations of SLMA002. PCB used for recommendations per appendix A4.
(2) See Recommended Operating Conditions Table for PowerPad connection guidelines to meet qualifying conditions for CB Certificate.
(3) Soldered PowerPAD on a standard 2-layer PCB without vias for thermal pad. See TI application note SLMA002 for further details.
(4) Soldered PowerPAD on a standard 4-layer PCB with vias for thermal pad. See TI application note SLMA002 for further details.

2 Copyright © 2005–2011, Texas Instruments Incorporated

TPS2060, TPS2064
TPS2068, TPS2069

www.ti.com

RECOMMENDED OPERATING CONDITIONS

V

I

Input voltage, V

I

Input voltage, V
Continuous output current, I

O

I(IN)
I(ENx)

, V

I(/ENx)

O(OUTx)

(1)

TPS2060/64 0 105

T

Operating virtual junction temperature TPS2068/69 (DGN Package) –40 105 °C

J

TPS2068 (D Package) 0 105

(1) The PowerPad must be connected externally to GND pin to meet qualifying conditions for CB Certificate (DGN package only).

ELECTRICAL CHARACTERISTICS

0°C ≤ TJ≤ 105°C for the TPS2060/64 and TPS2068 (D package), plus –40°C ≤ TJ≤ 105° for the
TPS2068/69 (DGN package), V

PARAMETER TEST CONDITIONS

POWER SWITCH

Static drain-source on-state resistance,
5-V operation and V

r

DS(on)

t

r

t

f

ENABLE INPUT EN OR EN

V

IH

V

IL

I

I

t

on

t

off

CURRENT LIMIT

I

OS

I

OC_TRIP

I

OS

I

OC_TRIP

I

OL

I

OH

I

OH

I

lkg

UNDERVOLTAGE LOCKOUT

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
(2) This configuration has not been tested for UL certification.

3.3-V operation
Static drain-source on-state resistance,

2.7-V operation

Rise time, output

Fall time, output

High-level input voltage 2.7 V < V
Low-level input voltage 2.7 V < V
Input current V
Turnon time CL= 100 μF, RL= 5 Ω 3
Turnoff time CL= 100 μF, RL= 5 Ω 10

Short-circuit output current 1.6 2.1 2.6 A

Overcurrent trip threshold A

(2)

Short-circuit output current 3.2 4.2 5.2 A
Overcurrent trip threshold V

(2)

TPS2060/64 together, current measured at V

Supply current, low-level output μA

Supply current, high-level output No load on OUT, V
TPS2060/64 or V

Supply current, high-level output No load on OUT, V
TPS2068/69 or V

Leakage current 1 μA
Reverse leakage current V

Low-level input voltage, IN 2 2.5 V
Hysteresis, IN TJ= 25°C 75 mV

separately.

= 5.5 V, IO= 1 A, V

I(IN)

I(IN)

V

I(IN)

V

I(IN)

V

I(IN)

V

I(IN)

V

I(IN)

I(/ENx)

V

I(IN)

short-circuit
V

I(IN)

(≤ 100 A/s) on OUT
V

I(IN)

into short-circuit, current measured at V

I(IN)

No load on OUT, V
or V

OUT connected to ground, V
or V

I(OUTx)

I(/ENx)

= 0 V, or V

= 5.5 V (unless otherwise noted).

I(ENx)

(1)

= 5 V or 3.3 V, IO= 1.5 A 70 115 mΩ

= 2.7 V, IO= 1.5 A 75 125 mΩ
= 5.5 V 0.6 1.5

= 2.7 V 0.4 1
= 5.5 V 0.05 0.5

CL= 1 μF,
RL= 5 Ω

= 2.7 V 0.05 0.5

< 5.5 V 2

I(IN)

< 5.5 V 0.8

I(IN)

= 0 V or 5.5 V, V

= 0 V or 5.5 V -0.5 0.5 μA

I(ENx)

= 5 V, OUT connected to GND, device enabled into

= 5 V, Current ramp

= 5 V, OUT1 and OUT2 connected to GND, Device enabled

I(IN)

= 5 V, Current ramp (≤ 100 A/s) on OUT1 and OUT2 tied

I(IN)

= 5.5 V,

I(ENx)

I(ENx)

I(ENx)

I(ENx)

= 0 V

= 5.5 V

= 5.5 V

= 0 V

I(/ENx)

I(/ENx)

I(/ENx)

= 0 V,

= 0 V,

I(/ENx)

= 5.5 V,

= 5.5 V, IN = ground TJ= 25°C 0.2 μA

SLVS553K –MARCH 2005– REVISED MAY 2011

MIN MAX UNIT

2.7 5.5 V
0 5.5 V
0 1.5 A

MIN TYP MAX UNIT

TJ= 25°C ms

TPS2060/64 3.2 3.9
TPS2068/69 2.3 2.85 3.4

6.4 7.8 A

TJ= 25°C 0.5 1
Over TJrange 0.5 5
TJ= 25°C 50 70
Over TJrange 50 90
TJ= 25°C 43 60
Over TJrange 43 70

V

ms

μA

μA

Copyright © 2005–2011, Texas Instruments Incorporated 3

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

ELECTRICAL CHARACTERISTICS (continued)

0°C ≤ TJ≤ 105°C for the TPS2060/64 and TPS2068 (D package), plus –40°C ≤ TJ≤ 105° for the
TPS2068/69 (DGN package), V

PARAMETER TEST CONDITIONS

OVERCURRENT OCx

V

OL(/OCx)

THERMAL SHUTDOWN

(3) The thermal shutdown only reacts under overcurrent conditions.

DGN and DRB PACKAGES

NAME TPS2060 TPS2064

EN1 3 — I Enable input, logic low turns on power switch IN-OUT1
EN2 4 — I Enable input, logic low turns on power switch IN-OUT2
EN1 — 3 I Enable input, logic high turns on power switch IN-OUT1
EN2 — 4 I Enable input, logic high turns on power switch IN-OUT2
GND 1 1 Ground
IN 2 2 I Input voltage
OC1 8 8 O Overcurrent, open-drain output, active low, IN-OUT1
OC2 5 5 O Overcurrent, open-drain output, active low, IN-OUT2
OUT1 7 7 O Power-switch output, IN-OUT1
OUT2 6 6 O Power-switch output, IN-OUT2

Output low voltage I
Off-state current V
OC deglitch OCx assertion or deassertion 4 8 15 ms

(3)

Thermal shutdown threshold 135 °C
Recovery from thermal shutdown 125 °C
Hysteresis 10 °C

PINS

PowerPad PowerPad Connect to GND

= 5.5 V, IO= 1 A, V

I(IN)

O(/OCx)

O(/OCx)

= 5 mA 0.4 V

= 5 V or 3.3 V 1 μA

I(/ENx)

= 0 V, or V

= 5.5 V (unless otherwise noted).

I(ENx)

(1)

DEVICE INFORMATION

Pin Functions

I/O DESCRIPTION

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MIN TYP MAX UNIT

4 Copyright © 2005–2011, Texas Instruments Incorporated

Thermal

Sense

Driver

Current

Limit

Charge

Pump

UVLO

CS

Driver

Current

Limit

CS

Thermal

Sense

Charge

Pump

GND

EN1

IN

EN2

OC1

OUT1

OUT2

OC2

Deglitch

Deglitch

(SeeNote A)

(SeeNote A)

(SeeNoteB)

(SeeNoteB)

www.ti.com

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

Functional Block Diagram (TPS2060 and TPS2064)

A. Current sense.
B. Active low (ENx) for TPS2060. Active high (ENx) for TPS2064.

Copyright © 2005–2011, Texas Instruments Incorporated 5

OUT

OC

IN

EN

GND

Current

Limit

Driver

UVLO

Charge

Pump

CS

Thermal

Sense

Deglitch

(SeeNote A)

(SeeNoteB)

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

DEVICE INFORMATION

Pin Functions (TPS2068 and TPS2069)

PINS

NAME TPS2068 TPS2069

EN 4 — I Enable input, logic low turns on power switch
EN — 4 I Enable input, logic high turns on power switch
GND 1 1 Ground
IN 2, 3 2, 3 I Input voltage
OC 5 5 O Overcurrent, open-drain output, active-low
OUT 6, 7, 8 6, 7, 8 O Power-switch output

PowerPad PowerPad Connect to GND (DGN Package Only)

(1) See the Recommended Operating Conditions Table for PowerPad connection guidelines to meet qualifying conditions for CB Certificate

(DGN package only).

Functional Block Diagram (TPS2068 and TPS2069)

I/O DESCRIPTION

(1)

www.ti.com

A. Current sense.
B. Active low (EN) for TPS2068. Active high (EN) for TPS2069.

6 Copyright © 2005–2011, Texas Instruments Incorporated

R

L

C

L

OUT

t

r

t

f

90%

90%

10%

10%

50%

50%

90%

10%

V

O(OUT)

V

I(EN)

V

O(OUT)

VOLTAGE WAVEFORMS

TEST CIRCUIT

t

on

t

off

50%

50%

90%

10%

V

I(EN)

V

O(OUT)

t

on

t

off

V

I(EN)

5V/div

V

O(OUT)

2V/div

t-Time-400 sm

R =5

C =1 F,

L

L

W

m

,

=25 CT

A

°

V

I(EN)

5V/div

V

O(OUT)

2V/div

t-Time-400 sm

R =5

C =1 F,

L

L

W

m

,

=25 CT

A

°

www.ti.com

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

PARAMETER MEASUREMENT INFORMATION

Figure 1. Test Circuit and Voltage Waveforms

Figure 2. Turnon Delay and Rise Time With 1-μF Figure 3. Turnoff Delay and Fall Time With 1-μF

Load Load

Copyright © 2005–2011, Texas Instruments Incorporated 7

V

I(EN)

5V/div

V

O(OUT)

2V/div

t-Time-400 sm

R =5

C =100 F,

L

L

W

m

,

=25 CT

A

°

V

I(EN)

5V/div

V

O(OUT)

2V/div

t-Time-400 sm

R =5

C =100 F,

L

L

W

m

,

=25 CT

A

°

V

I(EN)

5 V/div

I

O(OUT)

1 A/div

t − Time − 500 ms/div

220 mF

470 mF

100 mF

V

I(EN)

5 V/div

I

O(OUT)

500 mA/div

t − Time − 500 ms/div

VIN = 5 V ,
RL = 3 W,
TA = 255C

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 4. Turnon Delay and Rise Time With 100-μF Figure 5. Turnoff Delay and Fall Time With 100-μF

Load Load

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Figure 6. Short-Circuit Current, Figure 7. Inrush Current With Different

Device Enabled Into Short Load Capacitance

8 Copyright © 2005–2011, Texas Instruments Incorporated

V

O( )OCx

2V/div

I

O(OUT)

1 A/div

t-Time-2ms/div

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

2 3 4 5 6

Turnon Time − ms

VI − Input Voltage − V

CL = 100 mF,
RL = 5 W,
TA = 255C

1.5

1.6

1.7

1.8

1.9

2

2 3 4 5 6

CL = 100 mF,
RL = 5 W,
TA = 255C

Turnoff Time − mS

VI − Input Voltage − V

www.ti.com

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 8. 0.6-Ω Load Connected to Enabled Device

TYPICAL CHARACTERISTICS

TURNON TIME TURNOFF TIME

vs vs

INPUT VOLTAGE INPUT VOLTAGE

Copyright © 2005–2011, Texas Instruments Incorporated 9

Figure 9. Figure 10.

0

0.1

0.2

0.3

0.4

0.5

0.6

2 3 4 5 6

Rise Time − ms

VI − Input Voltage − V

CL = 1 mF,
RL = 5 W,
TA = 255C

0

0.05

0.1

0.15

0.2

0.25

2 3 4 5 6

CL = 1 mF,
RL = 5 W,
TA = 255C

Fall Time − ms

VI − Input Voltage − V

0

10

20

30

40

50

60

70

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − 5C

− Supply Current, Output Enabled −

I

I (IN)

Aµ

0

10

20

40

50

60

-50

0 50 100 150

30

T -JunctionTemperature- CJ°

I -SupplyCurrent,OutputEnabled- A

I(IN)

m

V =5.5V

I

V =3.3V

I

V =2.7V

I

V =5V

I

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

TYPICAL CHARACTERISTICS (continued)

RISE TIME FALL TIME

vs vs

INPUT VOLTAGE INPUT VOLTAGE

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Figure 11. Figure 12.

TPS2060, TPS2064 TPS2068, TPS2069

SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLED

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

10 Copyright © 2005–2011, Texas Instruments Incorporated

Figure 13. Figure 14.

vs vs

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − 5C

− Supply Current, Output Disabled −

I

I (IN)

Aµ

0

20

40

60

80

100

120

−50 0 50 100 150

Out1 = 5 V

Out1 = 3.3 V

Out1 = 2.7 V

IO = 0.5 A

TJ − Junction Temperature − 5C

r

DS(on) − Static Drain-Source

On-State Resistance − mΩ

2.1

2.14

2.18

2.22

2.26

2.3

−50 0 50 100 150

UVLO Rising

UVLO Falling

UVOL − Undervoltage Lockout − V

TJ − Junction Temperature − 5C

1.6

1.7

1.8

1.9

2

2.2

2.3

2.4

2.5

2.6

-50

0 50 100 150

2.1

T -JunctionTemperature- CJ°

I -Short-CircuitCurrentLimit- A

OS

V =2.7V

I

V =3.3V

I

V =5V

I

V =5.5V

I

www.ti.com

TPS2060, TPS2064
TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

TYPICAL CHARACTERISTICS (continued)

SUPPLY CURRENT, OUTPUT DISABLED STATIC DRAIN-SOURCE ON-STATE RESISTANCE

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 15. Figure 16.

SHORT-CIRCUIT OUTPUT CURRENT UNDERVOLTAGE LOCKOUT

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Copyright © 2005–2011, Texas Instruments Incorporated 11

Figure 17. Figure 18.

vs vs