Texas Instruments TPS2041BQDBVRQ1, TPS2042BQDRQ1, TPS2051BQDRQ1 Schematic [ru]

1
2
3
4
8
7
6
5
GND
IN IN
EN
OUT OUT OUT OC
TPS2051B
(TOP VIEW)
1
2
3
4
8
7
6
5
GND
IN EN1 EN2
OC1 OUT1 OUT2 OC2
TPS2042B
D PACKAGE
(TOP VIEW)
1
2
3
5
4
IN
EN
OC
GNDGND
OUT
TPS2041B
DBV PACKAGE
(TOP VIEW)
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SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
Check for Samples: TPS2041B-Q1, TPS2042B-Q1, TPS2051B-Q1
1

FEATURES

Qualified for Automotive Applications Heavy Capacitive Loads
70-mHigh-Side MOSFET Short-Circuit Protection
500-mA Continuous Current
Thermal and Short-Circuit Protection
Accurate Current Limit:
0.75 A (Min), 1.25 A (Max)
Operating Range: 2.7 V to 5.5 V
0.6-ms Typical Rise Time
Undervoltage Lockout
Deglitched Fault Report (OC)
No OC Glitch During Power Up
Maximum Standby Supply Current: 1 μA (Single, Dual) or 2 μA (Triple, Quad)
Bidirectional Switch
Junction Temperature Range: 40°C to 125°C
ESD Protection Level Per AEC-Q100
Classification
UL Recognized, File Number E169910

APPLICATIONS

TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1

DESCRIPTION

The TPS204xB/TPS205xB power-distribution switches are intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices incorporate 70-mN-channel MOSFET power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, the device limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains off until valid input voltage is present. This power-distribution switch is designed to set current limit at 1 A (typ).
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2007–2011, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TPS201xA TPS202x TPS203x
33 m, single
0.2 A − 2 A
0.2 A − 2 A
0.2 A − 2 A
TPS2014 TPS2015 TPS2041B TPS2051B TPS2045 TPS2055 TPS2061 TPS2065
80 m, single
600 mA 1 A 500 mA 500 mA 250 mA 250 mA 1 A 1 A
GENERAL SWITCH CATALOG
TPS2042B TPS2052B TPS2046 TPS2056 TPS2062 TPS2066 TPS2060 TPS2064
80 m, dual
500 mA 500 mA 250 mA 250 mA 1 A 1 A
1.5 A
1.5 A
TPS2100/1
260 m
IN1 500 mA IN2 10 mA
OUT
IN1 IN2
TPS2102/3/4/5
IN1 500 mA IN2 100 mA
1.3
TPS2043B TPS2053B TPS2047 TPS2057
80 m, triple
500 mA 500 mA 250 mA 250 mA
TPS2044B TPS2054B TPS2048 TPS2058
80 mΩ, quad
500 mA 500 mA 250 mA 250 mA
80 m, dual
TPS2080 TPS2081 TPS2082 TPS2090
500 mA 500 mA 500 mA
250 mA TPS2091 TPS2092
250 mA
250 mA
80 mΩ, quad
TPS2085 TPS2086 TPS2087 TPS2095
500 mA 500 mA 500 mA
250 mA TPS2096 TPS2097
250 mA
250 mA
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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ORDERING INFORMATION
T
J
ENABLE PACKAGE
NO. OF ORDERABLE TOP-SIDE
SWITCHES PART NUMBER MARKING
(1)
(2)
Active high Single SOIC D Reel of 2500 TPS2051BQDRQ1 2051BQ
40°C to 125°C Single SOT-23 DBV Reel of 3000 TPS2041BQDBVRQ1 PLIQ
Active low
Dual SOIC – D Reel of 2500 TPS2042BQDRQ1 2042B
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
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Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
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ABSOLUTE MAXIMUM RATINGS

(1)
over operating free-air temperature range unless otherwise noted
V
I(IN)
V
O(OUT)
V
O(OUTx)
V
I(
ENx
Input voltage range (IN)
,
Output voltage range (OUT, OUTx)
Input voltage range (ENx, EN) –0.3 V to 6 V , V
I(EN)
V
I(
OC
, Voltage range (OC, OCx) –0.3 V to 6 V V
I(
OCx
I
,
O(OUT)
I
O(OUTx)
Continuous output current Internally limited
Continuous total power dissipation See Dissipation Ratings T
J
T
stg
Operating virtual-junction temperature range –40°C to 125°C
Storage temperature range –65°C to 150°C
Lead temperature, soldering 1,6 mm (1/16 in) from case for 10 s 260°C
Electrostatic discharge (ESD)
protection
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.
(2)
(2)
)
)
)
Human-Body Model (HBM) (H2) 2500 V
TPS2041B Machine Model (MM) (M0) 50 V
Charged-Device Model (CDM) (C5) 1500 V Human-Body Model (HBM) (H2) 2500 V
TPS2042B Machine Model (MM) (M0) 50 V
Charged-Device Model (CDM) (C5) 1500 V Human-Body Model (HBM) (H2) 2000 V
TPS2051B Machine Model (MM) (M0) 50 V
Charged-Device Model (CDM) (C5) 1500 V
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
0.3 V to 6 V0.3 V to 6 V

DISSIPATING RATINGS

PACKAGE
D-8 585.82 mW 5.8582 mW/°C 322.20 mW 234.32 mW
DBV-5 285 mW 2.85 mW/°C 155 mW 114 mW
TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C
POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT
V
I(IN)
V
I(
ENx
, V I
O(OUT)
I
O(OUTx)
T
J
Copyright © 2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Input voltage (IN) 2.7 5.5 V
Input voltage (ENx, EN) 0 5.5 V
I(EN)
,
Continuous output current (OUT, OUTx) 0 500 mA
)
Operating virtual-junction temperature –40 125 °C
Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011

ELECTRICAL CHARACTERISTICS

over recommended operating junction temperature range, V
PARAMETER TEST CONDITIONS
Power Switch
Static drain-source on-state resistance, 5-V or 3.3-V V
r
t
t
operation
DS(on)
Static drain-source on-state resistance, 2.7-V operation
Rise time, output
r
Fall time, output
f
(2)
(2)
(2)
Enable Input (EN, ENx ) V V I t t
High-level input voltage 2.7 V V
IH
Low-level input voltage 2.7 V V
IL
Input current V
I on off
Turn-on time Turn-off time
(2) (2)
Current Limit
I
Short-circuit output current A
OS
Supply Current (TPS2041B/TPS2051B)
Supply current, low-level output μA
Supply current, high-level output μA
Leakage current –40°C TJ≤ 125°C 1 μA Reverse leakage current V
Supply Current (TPS2042B)
Supply current, low-level output μA
Supply current, high-level output μA
Leakage current –40°C TJ≤ 125°C 1 μA
Reverse leakage current V
Undervoltage Lockout
Low-level input voltage, IN, INx 2 2.5 V Hysteresis, IN, INx TJ= 25°C 75 mV
Overcurrent (OC, OCx )
Output low voltage, V Off-state current OC deglitch
(2)
OL(/OCx)
(2)
= 5 V or 3.3 V, IO= 0.5 A –40°C TJ≤ 125°C 70 135
I(IN)
V
= 2.7 V, IO= 0.5 A –40°C TJ≤ 125°C 75 150
I(IN)
V
= 5.5 V 0.6 1.5
I(IN)
V
= 2.7 V 0.4 1
I(IN)
V
= 5.5 V 0.05 0.5
I(IN)
V
= 2.7 V 0.05 0.5
I(IN)
5.5 V 2 V
I(IN)
5.5 V 0.8 V
I(IN)
I( ENx )
CL= 100 μF, RL= 10 3 ms CL= 100 μF, RL= 10 10 ms
V
= 5 V, OUT connected to GND,
I(IN)
device enabled into short-circuit
No load on OUT, V
= 5.5 V or V
I(EN)
I(EN)
No load on OUT, V
= 0 V or V
I(EN)
I(EN)
OUT connected to ground, V
= 5.5 V or V
I(EN)
= 5.5 V, IN = ground
I(OUTx)
No load on OUT, V
ENx
I(EN)
I(
= 5.5 V No load on OUT, V
ENx
I(
= 0 V OUT connected to ground, V
ENx
= 5.5 V
= 5.5 V, IN = ground
I(OUTx)
I
O( OCx )
V
O( OCx )
OCx assertion or deassertion 4 8 15 ms
= 5.5 V, IO= 0.5 A, V
I(IN)
CL= 1 μF, RL= 10
= 0 V
= 5.5 V
= 0 V
(2)
I(
(2)
= 0 V (unless otherwise noted)
I(ENx)
(1)
MIN TYP MAX UNIT
TJ= 25°C ms
= 0 V or 5.5 V –0.5 0.5 μA
TJ= 25°C 0.65 1 1.25 –40°C TJ≤ 125°C 0.6 1 1.3
TJ= 25°C 0.5 1 –40°C ≤ TJ≤ 125°C 0.5 5 TJ= 25°C 43 60 –40°C ≤ TJ≤ 125°C 43 70
TJ= 25°C 0 μA
TJ= 25°C 0.5 1
)
–40°C TJ≤ 125°C 0.5 5
TJ= 25°C 50 70
)
–40°C TJ≤ 125°C 50 90
)
TJ= 25°C 0.2 μA
= 5 mA 0.4 V
= 5 V or 3.3 V 1 μA
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m
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be accounted for separately. (2) Specified by design
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Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
OUT
OC
IN
EN
GND
Current
Limit
Driver
UVLO
Charge
Pump
CS
Thermal
Sense
Deglitch
(See Note A)
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ELECTRICAL CHARACTERISTICS (continued)
over recommended operating junction temperature range, V
PARAMETER TEST CONDITIONS
Thermal Shutdown
Thermal shutdown threshold Recovery from thermal shutdown Hysteresis
(3) The thermal shutdown only reacts under overcurrent conditions.
(2)
(3)
(2)
(2)
= 5.5 V, IO= 0.5 A, V
I(IN)

DEVICE INFORMATION

Terminal Functions (TPS2041B)
TERMINAL
NAME NO.
EN 4 I Enable input, logic low turns on power switch GND 2 Ground IN 5 I Input voltage OC 3 O Overcurrent, open-drain output, active low OUT 1 O Power-switch output
I/O DESCRIPTION
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
= 0 V (unless otherwise noted)
I(ENx)
(1)
MIN TYP MAX UNIT
135 °C 125 °C
10 °C
Functional Block Diagram (TPS2041B)
A. CS = Current sense
Copyright © 2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
Thermal
Sense
Driver
Current
Limit
Charge
Pump
UVLO
CS
Driver
Current
Limit
CS
Thermal
Sense
Charge
Pump
GND
EN1
IN
EN2
OC1
OUT1
OUT2
OC2
Deglitch
Deglitch
(See Note A)
(See Note A)
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
Terminal Functions (TPS2042B)
TERMINAL
NAME NO.
EN1 3 I Enable input, logic low turns on power switch IN-OUT1 EN2 4 I Enable input, logic low turns on power switch IN-OUT2 GND 1 Ground IN 2 I Input voltage OC1 8 O Overcurrent, open-drain output, active low, IN-OUT1 OC2 5 O Overcurrent, open-drain output, active low, IN-OUT2 OUT1 7 O Power-switch output, IN-OUT1 OUT2 6 O Power-switch output, IN-OUT2
I/O DESCRIPTION
Functional Block Diagram (TPS2042B)
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A. CS = Current sense
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Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
OUT
OC
IN
EN
GND
Current
Limit
Driver
UVLO
Charge
Pump
CS
Thermal
Sense
Deglitch
(See Note A)
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Terminal Functions (TPS2051B)
TERMINAL
NAME NO.
EN 4 I Enable input, logic high turns on power switch GND 1 Ground IN 2, 3 I Input voltage OC 5 O Overcurrent open-drain output, active low OUT 6, 7, 8 O Power-switch output
I/O DESCRIPTION
Functional Block Diagram (TPS2051B)
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
A. CS = Current sense
Copyright © 2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
R
L
C
L
OUT
t
r
t
f
90%
90%
10%
10%
50%
50%
90%
10%
V
O(OUT)
V
I(EN)
V
O(OUT)
VOLTAGE WAVEFORMS
TEST CIRCUIT
t
on
t
off
50%
50%
90%
10%
V
I(EN)
V
O(OUT)
t
on
t
off
V
I(EN
)
V
I(EN)
5 V/div
V
O(OUT)
2 V/div
RL = 10 W, CL = 1 mF TA = 255C
t − Time − 500 ms/div
V
I(EN
)
V
I(EN)
5 V/div
V
O(OUT)
2 V/div
RL = 10 W, CL = 1 mF TA = 255C
t − Time − 500 ms/div
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011

PARAMETER MEASUREMENT INFORMATION

Figure 1. Test Circuit and Voltage Waveforms
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Figure 2. Turn-On Delay and Rise Time With 1-μF Figure 3. Turn-Off Delay and Fall Time With 1-μF
Load Load
Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
8 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated
V
I(EN
)
V
I(EN)
5 V/div
V
O(OUT)
2 V/div
RL = 10 W, CL = 100 mF TA = 255C
t − Time − 500 ms/div
V
O(OUT)
2 V/div
V
I(EN
)
V
I(EN)
5 V/div
RL = 10 W, CL = 100 mF TA = 255C
t − Time − 500 ms/div
220 mF
470 mF
100 mF
VI = 5 V , RL = 10 W, TA = 255C
V
I(EN
)
V
I(EN)
5 V/div
I
O(OUT)
500 mA/div
t − Time − 500 ms/div
V
I(EN
)
V
I(EN)
5 V/div
I
O(OUT)
500 mA/div
t − Time − 500 ms/div
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
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PARAMETER MEASUREMENT INFORMATION (continued)
Figure 4. Turn-On Delay and Rise Time With Figure 5. Turn-Off Delay and Fall Time With 100-μF
100-μF Load Load
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
Figure 6. Short-Circuit Current, Figure 7. Inrush Current With Different
Device Enabled Into Short Load Capacitance
Copyright © 2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
V
O(OC
)
2 V/div
I
O(OUT)
500 mA/div
t − Time − 2 ms/div
V
O(OC
)
2 V/div
I
O(OUT)
500 mA/div
t − Time − 2 ms/div
TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
SLVS782B – NOVEMBER 2007–REVISED OCTOBER 2011
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 8. 3-Load Connected to Enabled Device Figure 9. 2-Load Connected to Enabled Device
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Product Folder Link(s): TPS2041B-Q1 TPS2042B-Q1 TPS2051B-Q1
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