TEXAS INSTRUMENTS TPA6211A1 Technical data

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APPLICATION CIRCUIT

_

+

V

DD

V

O+

V

O-

GND

6

5
8

7

To Battery

C

s

Bias

Circuitry

IN-

IN+

4

3

2

+

-

In From

DAC

SHUTDOWN

R

I

R

I

1

C

(BYPASS)

(1)

DGN PACKAGE

(TOP VIEW)

1
2
3
4

8
7
6
5

SHUTDOWN

BYPASS

IN+
IN-

V

O-

GND
V

DD

V

O+

100 kΩ

40 kΩ

40 kΩ

8

SHUTDOWN

BYPASS

IN+
IN-

V

O-

GND
V

DD

V

O+

8-PIN QFN (DRB) PACKAGE

(TOP VIEW)

7
6
5

1
2
3
4

(1)

C

(BYPASS)

is optional.

3.1-W MONO FULLY DIFFERENTIAL AUDIO POWER AMPLIFIER

FEATURES APPLICATIONS

• Designed for Wireless or Cellular Handsets

and PDAs

• 3.1 W Into 3Ω From a 5-V Supply at

THD = 10% (Typ)

• Low Supply Current: 4 mA Typ at 5 V

• Shutdown Current: 0.01 µA Typ

• Fast Startup With Minimal Pop

• Only Three External Components

– Improved PSRR (-80 dB) and Wide Supply

Voltage (2.5 V to 5.5 V) for Direct Battery
Operation

– Fully Differential Design Reduces RF

Rectification

– -63 dB CMRR Eliminates Two Input

Coupling Capacitors

TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

• Ideal for Wireless Handsets, PDAs, and

Notebook Computers

DESCRIPTION

The TPA6211A1 is a 3.1-W mono fully-differential
amplifier designed to drive a speaker with at least
3-Ω impedance while consuming only 20 mm
printed-circuit board (PCB) area in most applications.
The device operates from 2.5 V to 5.5 V, drawing
only 4 mA of quiescent supply current. The
TPA6211A1 is available in the space-saving
3-mm × 3-mm QFN (DRB) and the 8-pin MSOP
(DGN) PowerPAD™ packages.

Features like -80 dB supply voltage rejection from
20 Hz to 2 kHz, improved RF rectification immunity,
small PCB area, and a fast startup with minimal pop
makes the TPA6211A1 ideal for PDA/smart phone
applications.

2

total

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright © 2003–2004, Texas Instruments Incorporated

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TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

PACKAGED DEVICES

T

A

SMALL OUTLINE MSOP PowerPAD™

(DRB) (DGN)

-40°C to 85°C TPA6211A1DRB TPA6211A1DGN TPA6211A1EVM

(1) The DGN and DRB are available taped and reeled. To order taped and reeled parts, add the suffix R

to the part number (TPA6211A1DGNR or TPA6211A1DRBR).

Terminal Functions

TERMINAL

NAME DRB, DGN

IN- 4 I Negative differential input
IN+ 3 I Positive differential input
V

DD

V

O+

6 I Power supply

5 O Positive BTL output
GND 7 I High-current ground
V

O-

8 O Negative BTL output
SHUTDOWN 1 I Shutdown terminal (active low logic)
BYPASS 2 Mid-supply voltage, adding a bypass capacitor improves PSRR

Thermal Pad - -

I/O DESCRIPTION

Connect to ground. Thermal pad must be soldered down in all applications to properly secure
device on the PCB.

(1)

EVALUATION MODULES

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

V

Supply voltage -0.3 V to 6 V

DD

V

Input voltage -0.3 V to V

I

Continuous total power dissipation See Dissipation Rating Table

T

Operating free-air temperature -40°C to 85°C

A

T

Junction temperature -40°C to 150°C

J

T

Storage temperature -65°C to 85°C

stg

Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(1)

UNIT

DD

DRB 260°C
DGN 235°C

PACKAGE DISSIPATION RATINGS

PACKAGE

DGN 2.13 W 17.1 mW/°C 1.36 W 1.11 W
DRB 2.7 W 21.8 mW/°C 1.7 W 1.4 W

(1) Derating factor based on high-k board layout.

TA≤ 25°C DERATING TA= 70°C TA= 85°C

POWER RATING FACTOR

(1)

POWER RATING POWER RATING

+ 0.3 V

2

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38 k

R

I

40 k

R

I

42 k

R

I

TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

RECOMMENDED OPERATION CONDITIONS

MIN TYP MAX UNIT

V

Supply voltage 2.5 5.5 V

DD

V

High-level input voltage SHUTDOWN 1.55 V

IH

V

Low-level input voltage SHUTDOWN 0.5 V

IL

T

Operating free-air temperature -40 85 °C

A

ELECTRICAL CHARACTERISTICS

TA= 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

OS

PSRR Power supply rejection ratio V
V

IC

CMRR Common mode rejection ratio dB

| IIH| High-level input current, shutdown V
| IIL| Low-level input current, shutdown V
I

Q

I

(SD)

Output offset voltage (measured
differentially)

Common mode input range V

Low-output swing V

High-output swing V

Quiescent current V
Supply current 0.01 1 µA

VI= 0 V differential, Gain = 1 V/V, V

= 2.5 V to 5.5 V -85 -60 dB

DD

= 2.5 V to 5.5 V 0.5 VDD-0.8 V

DD

V

= 5.5 V, VIC= 0.5 V to 4.7 V -63 -40

DD

V

= 2.5 V, VIC= 0.5 V to 1.7 V -63 -40

DD

RL= 4 Ω, Gain = 1 V/V,

= VDD, V

IN+

V

= 0 V, V

IN+

= 0 V or V

IN-

= V

IN-

DD

RL= 4 Ω, Gain = 1 V/V,

= VDD, V

IN+

V

= V

IN-

DD

= 5.5 V, VI= 5.8 V 58 100 µA

DD

= 5.5 V, VI= -0.3 V 3 100 µA

DD

= 2.5 V to 5.5 V, no load 4 5 mA

DD

V(SHUTDOWN) ≤ 0.5 V, V
RL= 4Ω

IN-

V

IN+

= 0 V or V

= 0 V

= 2.5 V to 5.5 V,

DD

= 5.5 V -9 0.3 9 mV

DD

V

= 5.5 V 0.45

DD

= 3.6 V 0.37 V

DD

V

= 2.5 V 0.26 0.4

DD

V

= 5.5 V 4.95

DD

= 3.6 V 3.18 V

DD

V

= 2.5 V 2 2.13

DD

Gain RL= 4Ω V/V
Resistance from shutdown to GND 100 kΩ

3

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TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

OPERATING CHARACTERISTICS

TA= 25°C, Gain = 1 V/V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

THD + N= 1%, f = 1 kHz, RL= 3 Ω V

P

THD+N f = 1 kHz, RL= 4 Ω PO= 0.7 W V

k

SVR

SNR Signal-to-noise ratio V

V

CMRR Common mode rejection ratio V
Z

Output power THD + N= 1%, f = 1 kHz, RL= 4 Ω V

O

THD + N= 1%, f = 1 kHz, RL= 8 Ω V

PO= 2 W V

f = 1 kHz, RL= 3 Ω PO= 1 W V

PO= 300 mW V

PO= 1.8 W V
Total harmonic distortion plus
noise

PO= 300 mW V

PO= 1 W V

f = 1 kHz, RL= 8 Ω PO= 0.5 W V

PO= 200 mW V

V

= 3.6 V, Inputs ac-grounded with

Supply ripple rejection ratio dB

Output voltage noise µV

n

Input impedance 38 40 44 kΩ

I

Start-up time from shutdown

DD

Ci= 2 µF, V

= 5 V, PO= 2 W, RL= 4 Ω 105 dB

DD

V

= 3.6 V, f = 20 Hz to 20 kHz,

DD

Inputs ac-grounded with Ci= 2 µF

= 3.6 V, VIC= 1 V

DD

V

= 3.6 V, No C

DD

V

= 3.6 V, C

DD

= 200 mV

(RIPPLE)

BYPASS

BYPASS

pp

pp

= 0.1 µF 27 ms

V

= 5 V 2.45

DD

= 3.6 V 1.22

DD

V

= 2.5 V 0.49

DD

V

= 5 V 2.22

DD

= 3.6 V 1.1 W

DD

V

= 2.5 V 0.47

DD

V

= 5 V 1.36

DD

= 3.6 V 0.72

DD

V

= 2.5 V 0.33

DD

= 5 V 0.045%

DD

= 3.6 V 0.05%

DD

= 2.5 V 0.06%

DD

= 5 V 0.03%

DD

= 3.6 V 0.03%

DD

= 2.5 V 0.04%

DD

= 5 V 0.02%

DD

= 3.6 V 0.02%

DD

= 2.5 V 0.03%

DD

f = 217 Hz -80
f = 20 Hz to 20 kHz -70

No weighting 15
A weighting 12
f = 217 Hz -65 dB

4 µs

RMS

4

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0

0.5

1

1.5

2

2.5

3

3.5

2.5 3 3.5 4 4.5 5
VDD - Supply Voltage - V

- Output Power - WP
O

f = 1 kHz
Gain = 1 V/V

PO = 3 Ω, THD 10%

PO = 4 Ω, THD 10%

PO = 3 Ω, THD 1%

PO = 4 Ω, THD 1%

PO = 8 Ω, THD 1%

PO = 8 Ω, THD 10%

RL - Load Resistance - Ω

- Output Power - WP
O

0

0.5

1

1.5

2

2.5

3

3.5

3 8 13 18 23 28

VDD = 5 V , THD 1%

VDD = 2.5 V , THD 10%

VDD = 2.5 V , THD 1%

VDD = 5 V , THD 10%

VDD = 3.6 V , THD 10%

VDD = 3.6 V , THD 1%

f = 1 kHz
Gain = 1 V/V

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

TYPICAL CHARACTERISTICS

Table of Graphs

P

O

P

D

Output power

Power dissipation vs Output power 3, 4

THD+N Total harmonic distortion + noise vs Frequency 8-12

K

SVR

K

SVR

Supply voltage rejection ratio vs Frequency 14, 15, 16, 17
Supply voltage rejection ratio vs Common-mode input voltage 18
GSM Power supply rejection vs Time 19
GSM Power supply rejection vs Frequency 20

CMRR Common-mode rejection ratio

Closed loop gain/phase vs Frequency 23
Open loop gain/phase vs Frequency 24

I

DD

Supply current

Start-up time vs Bypass capacitor 27

vs Supply voltage 1
vs Load resistance 2

vs Output power 5, 6, 7

vs Common-mode input voltage 13

vs Frequency 21
vs Common-mode input voltage 22

vs Supply voltage 25
vs Shutdown voltage 26

TPA6211A1

FIGURE

OUTPUT POWER OUTPUT POWER

vs vs

SUPPLY VOLTAGE LOAD RESISTANCE

Figure 1. Figure 2.

5

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0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0 0.3 0.6 0.9 1.2 1.5 1.8

VDD = 3.6 V

4 Ω

8 Ω

PO - Output Power - W

- Power Dissiaption - WP
D

0

0.2

0.4

0.6

0.8

1

1.2

1.4

0 0.3 0.6 0.9 1.2 1.5 1.8

VDD = 5 V

4 Ω

8 Ω

PO - Output Power - W

- Power Dissiaption - WP

D

0.01

10

0.02

0.05

0.1

0.2

0.5

1

2

5

20m 350m 100m 200m 500m 1 2

PO - Output Power - W

THD+N - Total Harmonic Distortion + Noise - %

RL = 3 Ω

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V

2.5 V

3.6 V
5 V

0.01

20

0.02

0.05

0.1

0.2

0.5

1

2

5

10

10m 320m 50m 100m 200m 500m 1 2

PO - Output Power - W

THD+N - Total Harmonic Distortion + Noise - %

2.5 V

3.6 V
5 V

RL = 4 Ω

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V

TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

POWER DISSIPATION POWER DISSIPATION

vs vs

OUTPUT POWER OUTPUT POWER

Figure 3. Figure 4.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

OUTPUT POWER OUTPUT POWER

6

Figure 5. Figure 6.

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0.005

10

0.01

0.02

0.05

0.1

0.2

0.5

1

2

5

20 20k50 100 200 500 1k 2k 5k 10k

f - Frequency - Hz

THD+N - Total Harmonic Distortion + Noise - %

1 W

2 W

VDD = 5 V ,
RL = 3 Ω,

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V ,
CI = 2 µF

0.01

20

0.02

0.05

0.1

0.2

0.5

1

2

5

10

10m 320m 50m 100m 200m 500m 1 2

PO - Output Power - W

THD+N - Total Harmonic Distortion + Noise - %

2.5 V

3.6 V

5 V

RL = 8 Ω

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V

0.001

10

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

1

2

5

20 20k50 100 200 500 1k 2k 5k 10k

0.5 W

0.1 W

1 W

f - Frequency - Hz

THD+N - Total Harmonic Distortion + Noise - %

VDD = 3.6 V ,
RL = 4 Ω,

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V ,
CI = 2 µF

0.005

10

0.01

0.02

0.05

0.1

0.2

0.5

1

2

5

20

20k

50 100 200 500

1k 2k 5k 10k

f - Frequency - Hz

THD+N - Total Harmonic Distortion + Noise - %

2 W

1.8 W

1 W

VDD = 5 V ,
RL = 4 Ω,

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V ,
CI = 2 µF

TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

OUTPUT POWER FREQUENCY

Figure 7. Figure 8.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 9. Figure 10.

7

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0.001

10

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

1

2

5

20 20k50 100 200 500 1k 2k 5k 10k

0.4 W

0.28 W

f - Frequency - Hz

THD+N - Total Harmonic Distortion + Noise - %

VDD = 2.5 V ,
RL = 4 Ω,

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V ,
CI = 2 µF

0.001

10

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

1

2

5

20 20k50 100 200 500 1k 2k 5k 10k

f - Frequency - Hz

THD+N - Total Harmonic Distortion + Noise - %

0.1 W

0.6 W

0.25 W

VDD = 3.6 V ,
RL = 8 Ω,

,

C

(BYPASS)

= 0 to 1 µF,

Gain = 1 V/V ,
CI = 2 µF

f - Frequency - Hz

+0

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

20 20k50 100 200 500 1k 2k 5k 10k

k

SVR

- Supply Voltage Rejection Ratio - dB

VDD = 3.6 V

VDD = 2.5 V

VDD = 5 V

RL = 4 Ω,

,

C

(BYPASS)

= 0.47 µF,

Gain = 1 V/V ,
CI = 2 µF,
Inputs ac Grounded

0.04

0.042

0.044

0.046

0.048

0.05

0.052

0.054

0.056

0.058

0.06

0 1 2 3 4 5

f = 1 kHz
PO = 200 mW,
RL = 1 kHz

VIC - Common Mode Input Voltage - V

THD+N - Total Harmonic Distortion + Noise - %

VDD = 3.6 V

VDD = 5 V

VDD = 2.5 V

TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 11. Figure 12.

TOTAL HARMONIC DISTORTION + NOISE SUPPLY VOLTAGE REJECTION RATIO

vs vs

COMMON MODE INPUT VOLTAGE FREQUENCY

8

Figure 13. Figure 14.

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f - Frequency - Hz

+0

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

20 20k50 100 200 500 1k 2k 5k 10k

k

SVR

- Supply Voltage Rejection Ratio - dB

VDD = 3.6 V

VDD = 2.5 V

RL = 4 Ω,

,

C

(BYPASS)

= 0.47 µF,

Gain = 5 V/V ,
CI = 2 µF,
Inputs ac Grounded

VDD = 5 V

f - Frequency - Hz

+0

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

20 20k50 100 200 500 1k 2k 5k 10k

k

SVR

- Supply Voltage Rejection Ratio - dB

RL = 4 Ω,

,

C

(BYPASS)

= 0.47 µF,

CI = 2 µF,
VDD = 2.5 V to 5 V
Inputs Floating

k

SVR

− Supply Voltage Rejection Ratio − dB

f − Frequency − Hz

+0

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

20 20k50 100 200 500 1k 2k 5k 10k

RL = 4 Ω,

,

C

I

= 2 µF,

Gain = 1 V/V ,
VDD = 3.6 V

C

(BYPASS)

= 0.47 µF

C

(BYPASS)

= 1 µF

C

(BYPASS)

= 0.1 µF

No C

(BYPASS)

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

0

0 1 2 3 4 5 6

VDD = 5 V

VDD = 3.6 V

VDD = 2.5 V

DC Common Mode Input − V

k

SVR

− Supply Voltage Rejection Ratio − dB

RL = 4 Ω,

,

C

I

= 2 µF,

Gain = 1 V/V ,
C

(BYPASS)

= 0.47 µF

VDD = 3.6 V ,
f = 217 Hz,
Inputs ac Grounded

TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

SUPPLY VOLTAGE REJECTION RATIO SUPPLY RIPPLE REJECTION RATIO

vs vs

FREQUENCY FREQUENCY

Figure 15. Figure 16.

SUPPLY VOLTAGE REJECTION RATIO SUPPLY VOLTAGE REJECTION RATIO

vs vs

FREQUENCY DC COMMON MODE INPUT

Figure 17. Figure 18.

9

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C1
Frequency
217 Hz
C1 − Duty
20%
C1 Pk−Pk
500 mV

Ch1 100 mV/div
Ch4 10 mV/div

2 ms/div

V

DD

V

OUT

Voltage − V

t − Time − ms

R

L

= 8 Ω

C

I

= 2.2 µF

C

(BYPASS)

= 0.47 µF

−180

−160

−140

−120

−100

0 400 800 1200 1600 2000

−150

−100

−50

0

f − Frequency − Hz

− Supply Voltage − dBVV
DD

VDD Shown in Figure 19,
RL = 8 Ω,
CI = 2.2 µF,
Inputs Grounded

− Output Voltage − dBV
V

O

C

(BYPASS)

= 0.47 µF

TPA6211A1

SLOS367B – AUGUST 2003 – REVISED AUGUST 2004

GSM POWER SUPPLY REJECTION

vs

TIME

Figure 19.

10

GSM POWER SUPPLY REJECTION

vs

FREQUENCY

Figure 20.