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1
2
3
4
8
7
6
5
V
O1
IN1−
BYPASS
GND
V
DD
V
O2
IN2−
SHUTDOWN
D OR DGN PACKAGE
(TOP VIEW)
Audio
Input
Bias
Control
8
1
7
4
V
O1
V
O2
V
DD
5
2
3
6
IN1−
BYPASS
SHUTDOWN
VDD/2
C
I
R
I
R
F
C
(BYP)
C
(S)
Audio
Input
C
I
R
I
IN2−
R
F
V
DD
From Shutdown
Control Circuit
−
+
−
+
C
(C)
C
(C)
150-mW STEREO AUDIO POWER AMPLIFIER
FEATURES DESCRIPTION
• 150-mW Stereo Output
• PC Power Supply Compatible
– Fully Specified for 3.3-V and
5-V Operation
– Operation to 2.5 V
• Pop Reduction Circuitry
• Internal Midrail Generation
• Thermal and Short-Circuit Protection
• Surface-Mount Packaging
– PowerPAD™ MSOP
– SOIC
• Pin Compatible With TPA122, LM4880, and
LM4881 (SOIC)
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
The TPA6111A2 is a stereo audio power amplifier
packaged in either an 8-pin SOIC or an 8-pin
PowerPAD™ MSOP package capable of delivering
150 mW of continuous RMS power per channel into
16-Ω loads. Amplifier gain is externally configured by
means of two resistors per input channel and does
not require external compensation for settings of 0 to
20 dB.
THD+N, when driving a 16-Ω load from 5 V, is 0.03%
at 1 kHz, and less than 1% across the audio band of
20 Hz to 20 kHz. For 32-Ω loads, the THD+N is
reduced to less than 0.02% at 1 kHz, and is less than
1% across the audio band of 20 Hz to 20 kHz. For
10-kΩ loads, the THD+N performance is 0.005% at 1
kHz, and less than 0.5% across the audio band of 20
Hz to 20 kHz.
TYPICAL APPLICATION CIRCUIT
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2000–2004, Texas Instruments Incorporated
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TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
SMALL OUTLINE
(1)
(1)
MSOP
(D) (DGN)
–40°C to 85°C TPA6111A2D TPA6111A2DGN TI AJA
(1) The D and DGN package is available in left-ended tape and reel only (e.g., TPA6111A2DR,
TPA6111A2DGNR).
Terminal Functions
TERMINAL
NAME NO.
BYPASS 3 I Tap to voltage divider for internal mid-supply bias supply. Connect to a 0.1-µF to 1-µF low ESR capacitor
GND 4 I GND is the ground connection.
IN1– 2 I IN1– is the inverting input for channel 1.
IN2– 6 I IN2– is the inverting input for channel 2.
SHUTDOWN 5 I Puts the device in a low quiescent current mode when held high
V
DD
V
O1
V
O2
I/O DESCRIPTION
for best performance.
8 I V
1 O V
7 O V
is the supply voltage terminal.
DD
is the audio output for channel 1.
O1
is the audio output for channel 2.
O2
MSOP
SYMBOLIZATION
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
V
V
T
T
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
Supply voltage 6 V
DD
Input voltage –0.3 V to V
I
Continuous total power dissipation internally limited
Operating junction temperature range –40°C to 150°C
J
Storage temperature range –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1)
UNIT
DD
DISSIPATION RATING TABLE
PACKAGE
D 725 mW 5.8 mW/°C 464 mW 377 mW
DGN 2.14 W
(1) See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report
(literature number SLMA002), for more information on the PowerPAD package. The thermal data was
measured on a PCB layout based on the information in the section entitled Texas Instruments
Recommended Board for PowerPAD on page 33 of the before-mentioned document.
TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C
POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING
(1)
17.1 mW/°C 1.37 W 1.11 W
+ 0.3 V
2
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TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
V
T
V
V
DC ELECTRICAL CHARACTERISTICS
at V
V
PSRR Power supply rejection ratio V
I
I
Z
AC OPERATING CHARACTERISTICS
V
P
THD+N Total harmonic distortion + noise PO= 40 mW, 20 Hz – 20 kHz 0.4%
B
SNR Signal-to-noise ratio PO= 50 mW, AV= 1 100 dB
V
Supply voltage 2.5 5.5 V
DD
Operating free-air temperature –40 85 °C
A
High-level input voltage (SHUTDOWN) 60% x V
IH
Low-level input voltage (SHUTDOWN) 25% x V
IL
= 3.3 V, TA= 25°C (unless otherwise noted)
DD
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output offset voltage 10 mV
OO
= 3.2 V to 3.4 V 70 dB
DD
DD
DD(SD)
i
DD
Supply current SHUTDOWN (pin 5) = 0 V 1.5 3 mA
Supply current in shutdown mode SHUTDOWN (pin 5) = V
DD
Input impedance > 1 MΩ
= 3.3 V, TA= 25°C, RL= 16 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
O
OM
Output power (each channel) THD ≤ 0.1%, f = 1 kHz 60 mW
Maximum output power BW G = 20 dB, THD < 5% > 20 kHz
Phase margin Open loop 96°
Supply ripple rejection f = 1 kHz, C
= 0.47 µF 71 dB
(BYP)
Channel/channel output separation f = 1 kHz, PO= 40 mW 89 dB
n
Noise output voltage AV= 1 11 µV(rms)
1 10 µA
V
V
DD
DC ELECTRICAL CHARACTERISTICS
at V
= 5.5 V, TA= 25°C
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
PSRR Power supply rejection ratio V
I
DD
I
DD(SD)
|IIH| High-level input current (SHUTDOWN) V
|IIL| Low-level input current (SHUTDOWN) V
Z
i
Output offset voltage 10 mV
OO
Supply current SHUTDOWN (pin 5) = 0 V 1.6 3.2 mA
Supply current in shutdown mode SHUTDOWN (pin 5) = V
Input impedance > 1 MΩ
= 4.9 V to 5.1 V 70 dB
DD
DD
= 5.5 V, VI= V
DD
= 5.5 V, VI= 0 V 1 µA
DD
DD
1 10 µA
1 µA
3
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TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
AC OPERATING CHARACTERISTICS
V
= 5 V, TA= 25°C, RL= 6 Ω
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
THD+N Total harmonic distortion + noise PO= 100 mW, 20 Hz – 20 kHz 0.6%
B
OM
SNR Signal-to-noise ratio PO= 100 mW, AV= 1 100 dB
V
n
AC OPERATING CHARACTERISTICS
V
DD
P
O
THD+N Total harmonic distortion + noise PO= 40 mW, 20 Hz – 20 kHz 0.4%
B
OM
SNR Signal-to-noise ratio PO= 90 mW, AV= 1 100 dB
V
n
Output power (each channel) THD ≤ 0.1%, f = 1 kHz 150 mW
Maximum output power BW G = 20 dB, THD < 5% > 20 kHz
Phase margin Open loop 96°
Supply ripple rejection ratio f = 1 kHz, C
= 0.47 µF 61 dB
(BYP)
Channel/channel output separation f = 1 kHz, PO= 100 mW 90 dB
Noise output voltage AV= 1 11.7 µV(rms)
= 3.3 V, TA= 25°C, RL= 32 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output power (each channel) THD ≤ 0.1%, f = 1 kHz 35 mW
Maximum output power BW G = 20 dB, THD < 2% > 20 kHz
Phase margin Open loop 96°
Supply ripple rejection f = 1 kHz, C
Channel/channel output separation f = 1 kHz, PO= 25 mW 75 dB
Noise output voltage AV= 1 11 µV(rms)
= 0.47 µF 71 dB
(BYP)
AC OPERATING CHARACTERISTICS
V
= 5 V, TA= 25°C, RL= 32 Ω
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
THD+N Total harmonic distortion + noise PO= 20 mW, 20 Hz – 20 kHz 2%
B
OM
SNR Signal-to-noise ratio PO= 90 mW, AV= 1 104 dB
V
n
Output power (each channel) THD ≤ 0.1%, f = 1 kHz 90 mW
Maximum output power BW G = 20 dB, THD < 2% > 20 kHz
Phase margin Open loop 97°
Supply ripple rejection f = 1 kHz, C
= 0.47 µF 61 dB
(BYP)
Channel/channel output separation f = 1 kHz, PO= 65 mW 98 dB
Noise output voltage AV= 1 11.7 µV(rms)
4
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0.001
10
0.01
0.1
1
20 20k100 1k 10k
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V ,
PO = 25 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
10 100
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V ,
RL = 32 Ω,
AV = −1 V/V ,
CB = 1 µF
50
PO − Output Power − mW
20 Hz
1 kHz
20 kHz
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
TYPICAL CHARACTERISTICS
Table of Graphs
THD+N Total harmonic distortion plus noise
Supply ripple rejection ratio vs Frequency 15, 16
V
I
DD
SNR Signal-to-noise ratio vs Voltage gain 32
Output noise voltage vs Frequency 17, 18
n
Crosstalk vs Frequency 19–24
Shutdown attenuation vs Frequency 25, 26
Open-loop gain and phase margin vs Frequency 27, 28
Output power vs Load resistance 29, 30
Supply current vs Supply voltage 31
Power dissipation/amplifier vs Load power 33, 34
vs Frequency 1, 3, 5, 6, 7, 9, 11, 13,
vs Output power 2, 4, 8, 10, 12, 14
TPA6111A2
FIGURE
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 1. Figure 2.
5
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20 20k100 1k 10k
0.001
10
0.01
0.05
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V ,
PO = 60 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
AV = −5 V/V
AV = −10 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V ,
RL = 32 Ω,
AV = −1 V/V ,
CB = 1 µF
100
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V ,
PO = 100 mW,
CB = 1 µF,
RL = 10 kΩ,
AV = −1 V/V
AV = −10 V/V
AV = −1 V/V
AV = −5 V/V
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V ,
PO = 100 mW,
CB = 1 µF,
RL = 10 kΩ
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 3. Figure 4.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
6
Figure 5. Figure 6.
www.ti.com
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V ,
PO = 60 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V ,
RL = 8 Ω,
AV = −1 V/V ,
CB = 1 µF
100
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V ,
PO = 150 mW,
CB = 1 µF,
RL = 8 kΩ
AV = −10 V/V
AV = −1 V/V
AV = −5 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V ,
RL = 8 Ω,
AV = −1 V/V ,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 kHz
100
20 Hz
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 7. Figure 8.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 9. Figure 10.
7
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20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V ,
PO = 40 mW,
CB = 1 µF,
RL = 16 Ω,
AV = −1 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V ,
RL =16 Ω,
AV = −1 V/V ,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 kHz
100
20 Hz
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V ,
PO = 100 mW,
CB = 1 µF,
RL = 16 Ω
AV = −10 V/V
AV = −1 V/V
AV = −5 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V ,
RL = 16 Ω,
AV = −1 V/V ,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
100
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 11. Figure 12.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
8
Figure 13. Figure 14.
www.ti.com
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
VDD = 3.3 V ,
RL = 16 Ω,
AV = −1 V/V
0.1 µF
− Supply Ripple Rejection Ratio − dB
0.47 µF
1 µF
K
SVR
Bypass = 1.65 V
− Supply Ripple Rejection Ratio − dBK
SVR
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
VDD = 5 V ,
RL = 16 Ω,
AV = −1 V/V
0.1 µF
Bypass = 2.5 V
1 µF
0.47 µF
100
10
1
20 20k100 1k 10k
f − Frequency − Hz
VDD = 3.3 V ,
BW = 10 Hz to 22 kHz
RL = 16 Ω
− Output Noise Voltage −
V
n
Vµ
AV = −1 V/V
AV = −10 V/V
(RMS)
100
10
1
20 20k100 1k 10k
f − Frequency − Hz
VDD = 5 V ,
BW = 10 Hz to 22 kHz
RL = 16 Ω,
AV = −1 V/V
AV = −10 V/V
− Output Noise Voltage −
V
n
Vµ
(RMS)
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
SUPPLY RIPPLE REJECTION RATIO SUPPLY RIPPLE REJECTION RATIO
vs vs
FREQUENCY FREQUENCY
Figure 15. Figure 16.
OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGE
vs vs
FREQUENCY FREQUENCY
Figure 17. Figure 18.
9
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−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
IN1− to VO2
IN2− to VO1
VDD = 3.3 V ,
PO = 25 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
IN1− to VO2
IN2− to VO1
VDD = 3.3 V ,
PO = 40 mW,
CB = 1 µF,
RL = 16 Ω,
AV = −1 V/V
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
IN1− to VO2
IN2− to VO1
VDD = 3.3 V ,
PO = 60 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
VDD = 5 V ,
PO = 60 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
IN1− to VO2
IN2− to VO1
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
CROSSTALK CROSSTALK
vs vs
FREQUENCY FREQUENCY
10
Figure 19. Figure 20.
CROSSTALK CROSSTALK
vs vs
FREQUENCY FREQUENCY
Figure 21. Figure 22.
www.ti.com
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
VDD = 5 V ,
PO = 100 mW,
CB = 1 µF,
RL = 16 Ω,
AV = −1 V/V
IN1− to VO2
IN2− to VO1
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
VDD = 5 V ,
PO = 150 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
IN1− to VO2
IN2− to VO1
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 100 1 k 10 k 1 M
Shutdown Attenuation − dB
f − Frequency − Hz
VDD = 3.3 V ,
RL = 16 Ω,
CB = 1 µF
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 100 1 k 10 k 1 M
Shutdown Attenuation − dB
f − Frequency − Hz
VDD = 5 V ,
RL = 16 Ω,
CB = 1 µF
CROSSTALK CROSSTALK
vs vs
FREQUENCY FREQUENCY
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
Figure 23. Figure 24.
SHUTDOWN ATTENUATION SHUTDOWN ATTENUATION
FREQUENCY FREQUENCY
Figure 25. Figure 26.
vs vs
11
www.ti.com
−40
−20
0
20
40
60
80
100
120
Open-Loop Gain − dB
− Phase Margin − Deg
1 k 10 k 100 k 1 M 10 M
−180
−150
−120
−90
−60
−30
0
30
60
90
120
150
180
f − Frequency − Hz
Phase
Gain
VDD = 3.3 V
RL = 10 kΩ
Φ
m
−40
−20
0
20
40
60
80
100
120
1 k 10 k 100 k 1 M 10 M
−180
−150
−120
−90
−60
−30
0
30
60
90
120
150
180
Open-Loop Gain − dB
f − Frequency − Hz
Phase
Gain
VDD = 5 V
RL = 10 kΩ
− Phase Margin − DegΦ
m
50
25
0
8 12 16 20 32 36 40
75
100
45 52 56 64
− Output Power − mW
RL − Load Resistance − Ω
VDD = 3.3 V ,
THD+N = 1%,
AV = −1 V/V
24 28 44 60
P
O
0
50
100
150
200
250
8 12 16 20 24 28 32 36 40 44 48 52 56 60 64
RL − Load Resistance − Ω
VDD = 5 V ,
THD+N = 1%,
AV = −1 V/V
− Output Power − mWP
O
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
OPEN-LOOP GAIN AND PHASE MARGIN OPEN-LOOP GAIN AND PHASE MARGIN
vs vs
FREQUENCY FREQUENCY
Figure 27. Figure 28.
OUTPUT POWER OUTPUT POWER
vs vs
LOAD RESISTANCE LOAD RESISTANCE
12
Figure 29. Figure 30.
www.ti.com
0
0.5
1
1.5
2
2.5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
− Supply Current − mAI
DD
VDD − Supply Voltage − V
0
20
40
60
80
100
120
1 2 3 4 5 6 7 8 9
10
SNR − Signal-to-Noise Ratio − dB
AV − Voltage Gain − V/V
VDD = 5 V
0
Power Dissipation/Amplifier − mW
Load Power − mW
80
40
20
0
80 120 180 200
10
30
50
14010020 6040
160
60
70
VDD = 3.3 V
8 Ω
16 Ω
64 Ω
32 Ω
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
SUPPLY CURRENT SIGNAL-TO-NOISE RATIO
vs vs
SUPPLY VOLTAGE VOLTAGE GAIN
Figure 31. Figure 32.
POWER DISSIPATION/AMPLIFIER
vs
LOAD POWER
Figure 33.
13
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0
Load Power − mW
180
100
60
0
80 120 180 200
40
80
120
14010020 6040
160
140
160
VDD = 5 V
8 Ω
16 Ω
64 Ω
32 Ω
20
Power Dissipation/Amplifier − mW
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
POWER DISSIPATION/AMPLIFIER
vs
LOAD POWER
Figure 34.
14
www.ti.com
Gain
R
F
R
I
Effective Impedance
RFR
I
RF R
I
f
c(lowpass)
1
2 R
F
C
F
f
c(highpass)
1
2 R
I
C
I
C
I
1
2 R
I
f
c(highpass)
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
APPLICATION INFORMATION
GAIN SETTING RESISTORS, R
The gain for the TPA6111A2 is set by resistors R
and R
F
i
and RIaccording to Equation 1 .
F
Given that the TPA6111A2 is a MOS amplifier, the input impedance is high. Consequently, input leakage
currents are not generally a concern, although noise in the circuit increases as the value of R
addition, a certain range of R
values is required for proper start-up operation of the amplifier. Taken together it
F
increases. In
F
is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ
and 20 kΩ. The effective impedance is calculated in Equation 2 .
As an example, consider an input resistance of 20 kΩ and a feedback resistor of 20 kΩ. The gain of the amplifier
would be –1 and the effective impedance at the inverting terminal would be 10 kΩ, which is within the
recommended range.
For high-performance applications, metal film resistors are recommended because they tend to have lower noise
levels than carbon resistors. For values of R
formed from R
and the inherent input capacitance of the MOS input structure. For this reason, a small
F
above 50 kΩ, the amplifier tends to become unstable due to a pole
F
compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a
low-pass filter network with the cutoff frequency defined in Equation 3 .
For example, if R
is 100 kΩ and C
F
is 5 pF, then f
F
c(lowpass)
is 318 kHz, which is well outside the audio range.
(1)
(2)
(3)
INPUT CAPACITOR, C
i
In the typical application, input capacitor CIis required to allow the amplifier to bias the input signal to the proper
dc level for optimum operation. In this case, C
and R
i
form a high-pass filter with the corner frequency
I
determined in Equation 4 .
The value of CIis important to consider, as it directly affects the bass (low-frequency) performance of the circuit.
Consider the example where R
is 20 kΩ and the specification calls for a flat bass response down to 20 Hz.
I
Equation 4 is reconfigured as Equation 5 .
In this example, CIis 0.40 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (R
the feedback resistor (R
) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
F
that reduces useful headroom, especially in high-gain applications (> 10). For this reason a low-leakage tantalum
or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications, as the dc level there is held at V
/2, which is likely higher
DD
than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
(4)
(5)
, CI) and
I
15
www.ti.com
1
C
(BYP)
230 kΩ
1
CIR
I
f
c
1
2 R
L
C
(C)
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
POWER SUPPLY DECOUPLING, C
The TPA6111A2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to
ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 µF, placed as close as possible to the device V
lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power
amplifier is recommended.
(S)
lead, works best. For filtering
DD
MIDRAIL BYPASS CAPACITOR, C
The midrail bypass capacitor, C
(BYP)
(BYP)
, serves several important functions. During start-up, C
(BYP)
determines the
rate at which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it
cannot be heard). The second function is to reduce noise produced by the power supply caused by coupling into
the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is
fed from a 230-kΩ source inside the amplifier. To keep the start-up pop as low as possible, the relationship
shown in Equation 6 should be maintained.
As an example, consider a circuit where C
Equation 6 results in: 6.25 ≤ 50 which satisfies the rule. Recommended values for bypass capacitor C
(BYP)
is 1 µF, C
is 1 µF, and RIis 20 kΩ. Inserting these values into
I
(BYP)
0.1 µF to 1 µF, ceramic or tantalum low-ESR, for the best THD and noise performance.
OUTPUT COUPLING CAPACITOR, C
In the typical single-supply single-ended (SE) configuration, an output coupling capacitor (C
(C)
) is required to block
C
the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling
capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by
Equation 7 .
The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the
low-frequency corner higher. Large values of C
the example where a C
of 68 µF is chosen and loads vary from 32 Ω to 47 kΩ. Table 1 summarizes the
(C)
are required to pass low frequencies into the load. Consider
(C)
frequency response characteristics of each configuration.
(6)
are
(7)
Table 1. Common Load Impedances vs Low Frequency
Output Characteristics in SE Mode
R
L
32 Ω 68 µF 73 Hz
10,000 Ω 68 µF 0.23 Hz
47,000 Ω 68 µF 0.05 Hz
C
C
LOWEST FREQUENCY
As Table 1 indicates, headphone response is adequate and drive into line level inputs (a home stereo for
example) is good.
16
www.ti.com
1
C
(BYP)
230 kΩ
1
CIR
I
1
RLC
(C)
TPA6111A2
SLOS313B – DECEMBER 2000 – REVISED JUNE 2004
The output coupling capacitor required in single-supply SE mode also places additional constraints on the
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following
relationship:
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of
the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves
like an ideal capacitor.
5-V VERSUS 3.3-V OPERATION
The TPA6111A2 was designed for operation over a supply range of 2.5 V to 5.5 V. This data sheet provides full
specifications for 5-V and 3.3-V operation, since these are considered to be the two most common standard
voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain
setting, or stability. The most important consideration is that of output power. Each amplifier in the TPA6111A2
can produce a maximum voltage swing of V
when V
subsequently reduces maximum output power into the load before distortion begins to become significant.
= 2.3 V as opposed when V
O(PP)
– 1 V. This means, for 3.3-V operation, clipping starts to occur
DD
= 4 V while operating at 5 V. The reduced voltage swing
O(PP)
(8)
17
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jul-2006
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
TPA6111A2D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA6111A2DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA6111A2DGN ACTIVE MSOP-
Power
DGN 8 80 Green (RoHS &
no Sb/Br)
PAD
TPA6111A2DGNG4 ACTIVE MSOP-
Power
DGN 8 80 Green (RoHS &
no Sb/Br)
PAD
TPA6111A2DGNR ACTIVE MSOP-
Power
DGN 8 2500 Green (RoHS &
no Sb/Br)
PAD
TPA6111A2DGNRG4 ACTIVE MSOP-
Power
DGN 8 2500 Green (RoHS &
no Sb/Br)
PAD
TPA6111A2DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
TPA6111A2DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
19-Mar-2008
*All dimensions are nominal
Device Package
TPA6111A2DGNR MSOP-
Power
TPA6111A2DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
Type
PAD
Package
Drawing
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA6111A2DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPA6111A2DR SOIC D 8 2500 340.5 338.1 20.6
Pack Materials-Page 2
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