TEXAS INSTRUMENTS TPA6012A4 Technical data

S001
APPLICATIONCIRCUIT
PGND
ROUT−
PV
DD
PV
DD
RIN–
V
DD
V
DD
V
DD
LIN–
LIN+
LOUT−
1
ROUT+
SE/BTL
VOLUME
AGND
BYPASS
FADE
SHUTDOWN
LOUT+
PGND
2
3
5
6
7
8
9
11
12
13
14
15
16
17
18
21
23
24
0.47 Fm
C
i
C
i
C
i
C
i
RightNegative
Differential
InputSignal
PowerSupply
RightPositive
Differential
InputSignal
LeftNegative
Differential
InputSignal
LeftPositive
Differential
InputSignal
PowerSupply
V
DD
100kW
100kW
InFromDAC
or
Potentiometer
(DCVoltage)
C
0.47 F
(BYP)
m
SystemControl
C
330 FOm
C
330 FOm
Right Speaker
Left Speaker
Headphones
1kW
1kW
C
10 FSm
0.47 Fm
0.47 Fm
0.47 Fm
0.47 Fm
0.47 Fm
0.47 Fm
NC
4,10,19,20,22
DCVOLUMECONTROL
Volume[Pin21] − V
Gain − dB
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10
20
VolumeUp VolumeDown
VDD=5.0V BTLOutput
R =NoLoad
L
GAIN(BTL)
vs
VOLUMEVOLTAGE
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3-W STEREO AUDIO POWER AMPLIFIER
WITH ADVANCED DC VOLUME CONTROL
Check for Samples :TPA6012A4
1

FEATURES

2
Advanced 32 Steps DC Volume Control – Steps From –40 dB to 18 dB – Fade Mode – –85-dB Mute Mode
3 W Into 3-Speakers
Differential Inputs
Headphone Mode
Pin-to-Pin Compatible With TPA6011A4 and TPA6013A4
24-Pin PowerPAD™ Package (PWP)

APPLICATIONS

LCD Monitors
Notebook PC
All-in-One PC
TPA6012A4
SLOS636 –OCTOBER 2009

DESCRIPTION

The TPA6012A4 is a stereo audio power amplifier that drives 3 W/channel of continuous RMS power into a 3-load. Advanced dc volume control minimizes external components and allows BTL (speaker) volume control and SE (headphone) volume control. LCD monitors and notebook benefit from the integrated feature set that minimizes external components without sacrificing functionality.
To simplify design, the speaker volume level is adjusted by applying a dc voltage to the VOLUME terminal. To ensure a smooth transition between active and shutdown modes, a fade mode ramps the volume up and down.
The 24-pin PowerPAD™ package (PWP) enchances thermal performance.
1
2PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Figure 1. Application Circuit and DC Volume Control
Copyright © 2009, Texas Instruments Incorporated
TPA6012A4
SLOS636 –OCTOBER 2009
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS
T
A
–40°C to 85°C TPA6012A4PWP
PACKAGE
24-PIN TSSOP (PWP)
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ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)
V
SS
V
I
T
A
T
J
T
stg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Supply voltage, VDD, PV
DD
Input voltage, RIN+, RIN–, LIN+,LIN– –0.3 V to VDD+0.3 V Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range –40°C to 85°C Operating junction temperature range –40°C to 150°C Storage temperature range –65°C to 85°C

DISSIPATION RATING TABLE

PACKAGE
PWP 2.7 mW 21.8 mW/°C 1.7 W 1.4 W
(1) All characterization is done using an external heatsink with θSA= 25°C/W. The resulting derating factor
is 22.2 mW/°C.
TA= 25°C DERATING FACTOR TA= 70°C TA= 85°C
POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING
(1)
UNIT
–0.3 V to 6 V
(1)
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TPA6012A4
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RECOMMENDED OPERATING CONDITIONS

V
SS
V
IH
V
IL
T
A
Supply voltage, VDD, PV
High-level input voltage
Low-level input voltage
DD
SE/BTL, FADE 0.8 x V SHUTDOWN 2 V SE/BTL, FADE 0.6 x V SHUTDOWN 0.8 V
Operating free-air temperature –40 85 °C

ELECTRICAL CHARACTERISTICS

TA= 25°C, VDD= PVDD= 5.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
| VOO| Output offset voltage (measured differentially)
PSRR Power supply rejection ratio VDD= PVDD= 4 V to 5.5 V, Gain = 0 dB –80 dB | IIH| 1 µA
| IIL| VDD= PVDD= 5 V, VI= 0 V 1 µA
I
DD
I
DD
I
DD(SD)
High-level input current (SE/BTL, FADE, VDD= PVDD= 5.5 V, SHUTDOWN, VOLUME) VI= VDD= PV
Low-level input current (SE/BTL, FADE, SHUTDOWN, VOLUME)
Supply current, no load mA
Supply current, max power into a 3-load SHUTDOWN = 2 V, RL= 3 , 1.5 A
Supply current, shutdown mode SHUTDOWN = 0 V 10 25 µA
VDD= 5.5 V, Gain = 0 dB, SE/BTL = 0 V 2 30 mV VDD= 5.5 V, Gain = 18 dB, SE/BTL = 0 V 2.6 50 mV
DD
VDD= PVDD= 5 V, SE/BTL = 0 V, SHUTDOWN = 2 V
VDD= PVDD= 5 V, SE/BTL = 5 V, SHUTDOWN = 2 V
VDD= 5 V = PVDD, SE/BTL = 0 V, PO= 2 W, stereo
SLOS636 –OCTOBER 2009
MIN MAX UNIT
4 5.5 V
DD
DD
6.7 9
4.5 6
V
V
RMS

OPERATING CHARACTERISTICS

TA= 25°C, VDD= PVDD= 5 V, RL= 3 , Gain = 6 dB, Stereo (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
THD = 1%, f = 1 kHz, RL= 16 (SE) 195 mW
P
O
Output power
THD+N Total harmonic distortion + noise PO= 0.9 W, RL= 8 (BTL), f = 20 Hz to 20 kHz <0.1%
V
OH
V
OL
V
(Bypass)
High-level output voltage RL= 8 , Measured between output and VDD= 5.5 V 700 mV Low-level output voltage 400 mV Bypass voltage (Nominally VDD/2) Measured at pin 17, No load, VDD= 5.5 V 2.65 2.75 2.85 V
Supply ripple rejection ratio f = 1 kHz, Gain = 0 dB, C
Crosstalk
Noise output voltage BTL 36 µV
Z
I
Input impedance (see Figure 20) VOLUME = 5 V 12 k
THD = 10%, f = 1 kHz, RL= 16 (SE) 235 mW THD = 1%, f = 1 kHz, RL= 3 (BTL) 2.0 THD = 10%, f = 1 kHz, VDD= 5.5 V, RL=3 (BTL) 3.2
PO= 0.1 W, RL= 16 (SE), f = 20 Hz to 20 kHz 0.03%
RL= 8 , Measured between output and GND, VDD= 5.5 V
(BYP)
= 1 µF
BTL (4Ω) –66 dB SE (32Ω) –60 dB BTL 110 dB SE 102 dB
f = 20 Hz to 20 kHz, Gain = 0 dB, C
= 1 µF
(BYP)
W
RMS
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2
3
4
5
6
7
8
9
11
10
12
24
23
22
21
20
19
18
17
16
14
15
13
PWP Package
(TopView)
P0110-02
PGND
ROUT−
PV
DD
PV
DD
NC RIN+ RIN–
V
DD
LIN–
LIN+
NC
LOUT−
ROUT+
SE/BTL
NC VOLUME NC NC
AGND BYPASS
FADE SHUTDOWN LOUT+ PGND
TPA6012A4
SLOS636 –OCTOBER 2009
Terminal Functions
TERMINAL
NAME NO.
BYPASS 17 I Tap to voltage divider for internal mid-supply bias generator used for analog reference FADE 16 I AGND 18 Analog power supply ground
LIN- 8 I Left channel negative input for fully differential input. LIN+ 9 I Left channel positive input for fully differential input. LOUT– 12 O Left channel negative audio output LOUT+ 14 O Left channel positive audio output. NC 4, – No connection
PGND 1, 13 – Power ground PV
DD
RIN+ 5 I Right channel positive input for fully differential input. RIN– 6 I Right channel negative input for fully differential input. ROUT– 2 O Right channel negative audio output ROUT+ 24 O Right channel positive audio output
SE/BTL 23 I SHUTDOWN 15 I Places the amplifier in shutdown mode if a TTL logic low is placed on this terminal
V
DD
DC VOLUME 21 I Terminal for dc volume control. DC voltage range is 0 to VDD.
I/O DESCRIPTION
Places the amplifier in fade mode if a logic low is placed on this terminal; normal operation if a logic high is placed on this terminal.
10, 19, 20, 22
3, 11 Supply voltage terminal for power stage
Output control. When this terminal is high, SE outputs are selected. When this terminal is low, BTL outputs are selected.
7 – Supply voltage terminal
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Power
Management
32-Step Volume Control
Output Control
RIN+
ROUT+
SHUTDOWN
ROUT-
PV
DD
PGND V
DD
BYPASS
AGND
LOUT-
LOUT+
RIN-
VOLUME
FADE
_
+
_
+
_
+
BYP
_
+
BYP
BYP
EN
SE/BTL
_
+
_
+
_
+
BYP
_
+
BYP
BYP
EN
SE/BTL
SE/BTL
LIN-
LIN+
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TPA6012A4
SLOS636 –OCTOBER 2009

FUNCTIONAL BLOCK DIAGRAM

NOTE: All resistor wipers are adjusted with 32 step volume control.
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TPA6012A4
SLOS636 –OCTOBER 2009
(1) For other values of VDD, scale the voltage values in the table by a factor of VDD/5. (2) Tested in production.
Table 1. DC Volume Control (BTL Mode, VDD= 5 V)
VOLUME (PIN 21)
FROM (V) TO (V)
0.00 0.26 –85
0.33 0.37 –40
0.44 0.48 –34
0.56 0.59 –31
0.67 0.70 –28
0.78 0.82 –25
0.89 0.93 –22
1.01 1.04 –19
1.12 1.16 –16
1.23 1.27 –13
1.35 1.38 –10
1.46 1.49 –7
1.57 1.60 –4
1.68 1.72 –2
1.79 1.83 0
1.91 1.94 2
2.02 2.06 4
2.13 2.17 6
2.25 2.28 8
2.36 2.39 10
2.47 2.50 11
2.58 2.61 12
2.70 2.73 13
2.81 2.83 14
2.92 2.95 14.5
3.04 3.06 15
3.15 3.17 15.5
3.26 3.29 16
3.38 3.40 16.5
3.49 3.51 17
3.60 3.63 17.5
3.71 5.00 18
GAIN OF AMPLIFIER
(1)
(Typ)
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(2)
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Table 2. DC Volume Control (SE Mode, VDD= 5 V)
VOLUME (PIN 21)
FROM (V) TO (V)
0.00 0.26 –85
0.33 0.37 –46
0.44 0.48 –40
0.56 0.59 –37
0.67 0.70 –34
0.78 0.82 –31
0.89 0.93 –28
1.01 1.04 –25
1.12 1.16 –22
1.23 1.27 –19
1.35 1.38 –16
1.46 1.49 –13
1.57 1.60 –10
1.68 1.72 –8
1.79 1.83 –6
1.91 1.94 –4
2.02 2.06 -2
2.13 2.17 0
2.25 2.28 2
2.36 2.39 4
2.47 2.50 5
2.58 2.61 6
2.70 2.73 7
2.81 2.83 8
2.92 2.95 8.5
3.04 3.06 9
3.15 3.17 9.5
3.26 3.29 10
3.38 3.40 10.5
3.49 3.51 11
3.60 3.63 11.5
3.71 5.00 12
(1) For other values of VDD, scale the voltage values in the table by a factor of VDD/5. (2) Tested in production. Remaining gain steps are specified by design.
GAIN OF AMPLIFIER
TPA6012A4
SLOS636 –OCTOBER 2009
(1)
(Typ)
(2)
(2)
(2)
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f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
20 100 1k 10k 20k
0.001
0.01
0.1
1
10
PO = 500 mW PO = 1 W PO = 1.5 W
VDD = 5.0 V RL = 3 BTL Output Gain = 6 dB
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
20 100 1k 10k 20k
0.001
0.01
0.1
1
10
PO = 250 mW PO = 1 W PO = 1.5 W
VDD = 5.0 V RL = 4 BTL Output Gain = 6 dB
TPA6012A4
SLOS636 –OCTOBER 2009

TYPICAL CHARACTERISTICS

Test conditions (unless otherwise noted) for typical operating performance:
VDD= 5.0 V, CIN= 1 µF, C

Table of Graphs

Gain (BTL) vs Volume voltage Figure 1
THD+N Total harmonic distortion plus noise (BTL)
THD+N Total harmonic distortion plus noise (SE) vs Output power Figure 10
P
D
P
D
Total power dissipation (BTL) vs Total output power Figure 12 Total power dissipation (SE) vs Total output power Figure 13 Crosstalk (BTL) vs Frequency Figure 14
Crosstalk (SE) vs Frequency Figure 15 PSRR Power supply rejection ratio (BTL) vs Frequency Figure 16 PSRR Power supply rejection ratio (SE) vs Frequency Figure 17 I
DD
I
DD
Supply current (BTL) vs Total output power Figure 18
Supply current (SE) vs Total output power Figure 19
Input impedance vs Gain Figure 20
vs Frequency Figure 2, Figure 3, Figure 4 vs Output power Figure 7, Figure 8, Figure 9 vs Frequency Figure 5, Figure 6
vs Output voltage Figure 11
= 1 µF, TA= 27°C, SHUTDOWN = V
BYPASS
DD
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TOTAL HARMONIC DISTORTION + NOISE (BTL) TOTAL HARMONIC DISTORTION + NOISE (BTL)
vs vs
FREQUENCY FREQUENCY
Figure 2. Figure 3.
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f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
20 100 1k 10k 20k
0.001
0.01
0.1
1
10
PO = 250 mW PO = 500 mW PO = 900 mW
VDD = 5.0 V RL = 8 BTL Output Gain = 6 dB
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
20 100 1k 10k 20k
0.001
0.01
0.1
1
10
Po = 10 mW Po = 40 mW Po = 80 mW
VDD = 5.0 V RL = 32 SE Output Gain = 0 dB
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
20 100 1k 10k 20k
0.001
0.01
0.1
1
10
VO = 500 mV
RMS
VO = 1.0 V
RMS
VO = 1.75 V
RMS
VDD = 5.0 V RL = 10 k SE Output Gain = 0 dB
PO − Output Power − W
THD+N − Total Harmonic Distortion + Noise − %
1m 10m 100m 1 4
0.01
0.1
1
10
100
VDD = 4.5 V VDD = 5.0 V VDD = 5.5 V
RL = 3 BTL Output Gain = 6 dB
PO − Output Power − W
THD+N − Total Harmonic Distortion + Noise − %
1m 10m 100m 1 3
0.01
0.1
1
10
100
VDD = 4.5 V VDD = 5.0 V VDD = 5.5 V
RL = 4 BTL Output Gain = 6 dB
PO − Output Power − W
THD+N − Total Harmonic Distortion + Noise − %
1m 10m 100m 1 2
0.01
0.1
1
10
100
VDD = 4.5 V VDD = 5.0 V VDD = 5.5 V
RL = 8 BTL Output Gain = 6 dB
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TPA6012A4
SLOS636 –OCTOBER 2009
TOTAL HARMONIC DISTORTION + NOISE (BTL) TOTAL HARMONIC DISTORTION + NOISE (SE)
vs vs
FREQUENCY FREQUENCY
Figure 4. Figure 5.
TOTAL HARMONIC DISTORTION + NOISE (SE) TOTAL HARMONIC DISTORTION + NOISE (BTL)
vs vs
FREQUENCY OUTPUT POWER
Figure 6. Figure 7.
TOTAL HARMONIC DISTORTION + NOISE (BTL) TOTAL HARMONIC DISTORTION + NOISE (BTL)
OUTPUT POWER OUTPUT POWER
Figure 8. Figure 9.
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vs vs
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